Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8944 |
1 |
|
|
T4 |
7 |
|
T8 |
5 |
|
T9 |
28 |
auto[1] |
10737 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9446 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
auto[1] |
10235 |
1 |
|
|
T4 |
4 |
|
T8 |
5 |
|
T9 |
36 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1105 |
1 |
|
|
T4 |
1 |
|
T9 |
5 |
|
T36 |
2 |
auto[0] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T4 |
1 |
|
T9 |
5 |
|
T36 |
3 |
auto[0] |
auto[1] |
auto[0] |
3546 |
1 |
|
|
T4 |
4 |
|
T8 |
2 |
|
T9 |
4 |
auto[0] |
auto[1] |
auto[1] |
3164 |
1 |
|
|
T4 |
1 |
|
T8 |
3 |
|
T9 |
14 |
auto[1] |
auto[0] |
auto[0] |
1125 |
1 |
|
|
T4 |
1 |
|
T9 |
9 |
|
T29 |
4 |
auto[1] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T4 |
1 |
|
T9 |
6 |
|
T36 |
2 |
auto[1] |
auto[1] |
auto[0] |
3670 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
4425 |
1 |
|
|
T4 |
1 |
|
T8 |
2 |
|
T9 |
11 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8826 |
1 |
|
|
T2 |
1 |
|
T4 |
7 |
|
T8 |
6 |
auto[1] |
10855 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T8 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9388 |
1 |
|
|
T4 |
6 |
|
T8 |
3 |
|
T9 |
25 |
auto[1] |
10293 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1090 |
1 |
|
|
T4 |
1 |
|
T9 |
5 |
|
T36 |
2 |
auto[0] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T4 |
2 |
|
T9 |
7 |
|
T36 |
1 |
auto[0] |
auto[1] |
auto[0] |
3497 |
1 |
|
|
T4 |
3 |
|
T8 |
3 |
|
T9 |
9 |
auto[0] |
auto[1] |
auto[1] |
3140 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T8 |
3 |
auto[1] |
auto[0] |
auto[0] |
1163 |
1 |
|
|
T9 |
3 |
|
T36 |
1 |
|
T74 |
1 |
auto[1] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T4 |
1 |
|
T9 |
10 |
|
T36 |
3 |
auto[1] |
auto[1] |
auto[0] |
3638 |
1 |
|
|
T4 |
2 |
|
T9 |
8 |
|
T34 |
8 |
auto[1] |
auto[1] |
auto[1] |
4530 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T8 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8810 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T8 |
6 |
auto[1] |
10871 |
1 |
|
|
T1 |
1 |
|
T4 |
5 |
|
T8 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9447 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T8 |
2 |
auto[1] |
10234 |
1 |
|
|
T1 |
1 |
|
T4 |
3 |
|
T8 |
8 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1096 |
1 |
|
|
T4 |
3 |
|
T9 |
7 |
|
T29 |
2 |
auto[0] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T9 |
4 |
|
T36 |
3 |
|
T74 |
1 |
auto[0] |
auto[1] |
auto[0] |
3451 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T8 |
1 |
auto[0] |
auto[1] |
auto[1] |
3157 |
1 |
|
|
T4 |
1 |
|
T8 |
5 |
|
T9 |
9 |
auto[1] |
auto[0] |
auto[0] |
1125 |
1 |
|
|
T4 |
1 |
|
T9 |
7 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T9 |
7 |
|
T36 |
3 |
|
T29 |
2 |
auto[1] |
auto[1] |
auto[0] |
3775 |
1 |
|
|
T4 |
2 |
|
T8 |
1 |
|
T9 |
11 |
auto[1] |
auto[1] |
auto[1] |
4422 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T8 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8920 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T8 |
5 |
auto[1] |
10761 |
1 |
|
|
T1 |
1 |
|
T4 |
7 |
|
T8 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9498 |
1 |
|
|
T1 |
1 |
|
T4 |
5 |
|
T8 |
2 |
auto[1] |
10183 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T8 |
8 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1184 |
1 |
|
|
T9 |
5 |
|
T36 |
2 |
|
T29 |
2 |
auto[0] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T9 |
8 |
|
T36 |
1 |
|
T74 |
1 |
auto[0] |
auto[1] |
auto[0] |
3437 |
1 |
|
|
T4 |
2 |
|
T8 |
1 |
|
T9 |
6 |
auto[0] |
auto[1] |
auto[1] |
3160 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T8 |
4 |
auto[1] |
auto[0] |
auto[0] |
1148 |
1 |
|
|
T4 |
3 |
|
T9 |
4 |
|
T74 |
2 |
auto[1] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T4 |
1 |
|
T9 |
8 |
|
T36 |
4 |
auto[1] |
auto[1] |
auto[0] |
3729 |
1 |
|
|
T1 |
1 |
|
T8 |
1 |
|
T9 |
9 |
auto[1] |
auto[1] |
auto[1] |
4479 |
1 |
|
|
T4 |
3 |
|
T8 |
4 |
|
T9 |
16 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8968 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T8 |
6 |
auto[1] |
10713 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T8 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9412 |
1 |
|
|
T4 |
6 |
|
T8 |
4 |
|
T9 |
30 |
auto[1] |
10269 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1128 |
1 |
|
|
T4 |
2 |
|
T9 |
4 |
|
T36 |
1 |
auto[0] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T4 |
1 |
|
T9 |
8 |
|
T36 |
1 |
auto[0] |
auto[1] |
auto[0] |
3548 |
1 |
|
|
T4 |
1 |
|
T8 |
1 |
|
T9 |
9 |
auto[0] |
auto[1] |
auto[1] |
3159 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T8 |
5 |
auto[1] |
auto[0] |
auto[0] |
1117 |
1 |
|
|
T9 |
7 |
|
T36 |
2 |
|
T74 |
1 |
auto[1] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T4 |
1 |
|
T9 |
6 |
|
T36 |
3 |
auto[1] |
auto[1] |
auto[0] |
3619 |
1 |
|
|
T4 |
3 |
|
T8 |
3 |
|
T9 |
10 |
auto[1] |
auto[1] |
auto[1] |
4479 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T8 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4876 |
1 |
|
|
T4 |
4 |
|
T9 |
25 |
|
T36 |
7 |
auto[1] |
14805 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8857 |
1 |
|
|
T4 |
6 |
|
T8 |
3 |
|
T9 |
25 |
auto[1] |
10824 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9474 |
1 |
|
|
T1 |
1 |
|
T4 |
8 |
|
T8 |
4 |
auto[1] |
10207 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T8 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1118 |
1 |
|
|
T4 |
1 |
|
T9 |
8 |
|
T29 |
2 |
auto[0] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T9 |
5 |
|
T36 |
1 |
|
T74 |
1 |
auto[0] |
auto[1] |
auto[0] |
3554 |
1 |
|
|
T4 |
4 |
|
T8 |
1 |
|
T9 |
7 |
auto[0] |
auto[1] |
auto[1] |
3066 |
1 |
|
|
T4 |
1 |
|
T8 |
2 |
|
T9 |
5 |
auto[1] |
auto[0] |
auto[0] |
1122 |
1 |
|
|
T4 |
1 |
|
T9 |
2 |
|
T36 |
4 |
auto[1] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T4 |
2 |
|
T9 |
10 |
|
T36 |
2 |
auto[1] |
auto[1] |
auto[0] |
3680 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T8 |
3 |
auto[1] |
auto[1] |
auto[1] |
4505 |
1 |
|
|
T2 |
1 |
|
T8 |
4 |
|
T9 |
13 |