Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8065 |
1 |
|
|
T4 |
6 |
|
T6 |
7 |
|
T7 |
8 |
auto[1] |
9912 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8639 |
1 |
|
|
T1 |
2 |
|
T4 |
6 |
|
T6 |
6 |
auto[1] |
9338 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
933 |
1 |
|
|
T43 |
2 |
|
T35 |
3 |
|
T37 |
1 |
auto[0] |
auto[0] |
auto[1] |
935 |
1 |
|
|
T4 |
1 |
|
T6 |
2 |
|
T43 |
1 |
auto[0] |
auto[1] |
auto[0] |
3289 |
1 |
|
|
T4 |
3 |
|
T6 |
3 |
|
T7 |
3 |
auto[0] |
auto[1] |
auto[1] |
2908 |
1 |
|
|
T4 |
2 |
|
T6 |
2 |
|
T7 |
5 |
auto[1] |
auto[0] |
auto[0] |
954 |
1 |
|
|
T1 |
1 |
|
T4 |
3 |
|
T6 |
2 |
auto[1] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T4 |
2 |
|
T6 |
4 |
|
T43 |
6 |
auto[1] |
auto[1] |
auto[0] |
3463 |
1 |
|
|
T1 |
1 |
|
T6 |
1 |
|
T7 |
4 |
auto[1] |
auto[1] |
auto[1] |
4193 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8096 |
1 |
|
|
T1 |
1 |
|
T4 |
5 |
|
T6 |
6 |
auto[1] |
9881 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8527 |
1 |
|
|
T1 |
3 |
|
T4 |
8 |
|
T6 |
6 |
auto[1] |
9450 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T6 |
14 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
921 |
1 |
|
|
T4 |
1 |
|
T43 |
4 |
|
T38 |
1 |
auto[0] |
auto[0] |
auto[1] |
954 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T43 |
2 |
auto[0] |
auto[1] |
auto[0] |
3221 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
2 |
auto[0] |
auto[1] |
auto[1] |
3000 |
1 |
|
|
T4 |
2 |
|
T6 |
3 |
|
T41 |
1 |
auto[1] |
auto[0] |
auto[0] |
958 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T6 |
2 |
auto[1] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T6 |
5 |
|
T43 |
2 |
|
T35 |
3 |
auto[1] |
auto[1] |
auto[0] |
3427 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
2 |
auto[1] |
auto[1] |
auto[1] |
4205 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T6 |
5 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8080 |
1 |
|
|
T1 |
2 |
|
T4 |
5 |
|
T6 |
7 |
auto[1] |
9897 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8495 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T4 |
7 |
auto[1] |
9482 |
1 |
|
|
T4 |
6 |
|
T6 |
12 |
|
T7 |
12 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
952 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
1 |
auto[0] |
auto[0] |
auto[1] |
972 |
1 |
|
|
T4 |
1 |
|
T6 |
3 |
|
T43 |
3 |
auto[0] |
auto[1] |
auto[0] |
3143 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
2 |
auto[0] |
auto[1] |
auto[1] |
3013 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
7 |
auto[1] |
auto[0] |
auto[0] |
946 |
1 |
|
|
T4 |
2 |
|
T6 |
2 |
|
T43 |
5 |
auto[1] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T4 |
1 |
|
T6 |
2 |
|
T37 |
3 |
auto[1] |
auto[1] |
auto[0] |
3454 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
2 |
auto[1] |
auto[1] |
auto[1] |
4243 |
1 |
|
|
T4 |
3 |
|
T6 |
6 |
|
T7 |
5 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8147 |
1 |
|
|
T1 |
2 |
|
T4 |
5 |
|
T6 |
8 |
auto[1] |
9830 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8534 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T4 |
7 |
auto[1] |
9443 |
1 |
|
|
T4 |
6 |
|
T6 |
13 |
|
T7 |
12 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
951 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T43 |
3 |
auto[0] |
auto[0] |
auto[1] |
953 |
1 |
|
|
T4 |
2 |
|
T6 |
2 |
|
T43 |
2 |
auto[0] |
auto[1] |
auto[0] |
3223 |
1 |
|
|
T1 |
2 |
|
T4 |
1 |
|
T6 |
4 |
auto[0] |
auto[1] |
auto[1] |
3020 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
6 |
auto[1] |
auto[0] |
auto[0] |
947 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
1 |
auto[1] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T4 |
1 |
|
T6 |
4 |
|
T43 |
3 |
auto[1] |
auto[1] |
auto[0] |
3413 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T6 |
1 |
auto[1] |
auto[1] |
auto[1] |
4197 |
1 |
|
|
T4 |
2 |
|
T6 |
6 |
|
T7 |
6 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8128 |
1 |
|
|
T4 |
6 |
|
T6 |
10 |
|
T7 |
10 |
auto[1] |
9849 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8466 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T6 |
7 |
auto[1] |
9511 |
1 |
|
|
T1 |
3 |
|
T4 |
5 |
|
T6 |
13 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
942 |
1 |
|
|
T4 |
3 |
|
T43 |
1 |
|
T37 |
2 |
auto[0] |
auto[0] |
auto[1] |
982 |
1 |
|
|
T6 |
4 |
|
T43 |
2 |
|
T35 |
1 |
auto[0] |
auto[1] |
auto[0] |
3235 |
1 |
|
|
T6 |
2 |
|
T7 |
7 |
|
T41 |
1 |
auto[0] |
auto[1] |
auto[1] |
2969 |
1 |
|
|
T4 |
3 |
|
T6 |
4 |
|
T7 |
3 |
auto[1] |
auto[0] |
auto[0] |
947 |
1 |
|
|
T4 |
1 |
|
T6 |
2 |
|
T43 |
3 |
auto[1] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
2 |
auto[1] |
auto[1] |
auto[0] |
3342 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T6 |
3 |
auto[1] |
auto[1] |
auto[1] |
4307 |
1 |
|
|
T1 |
2 |
|
T6 |
3 |
|
T7 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4124 |
1 |
|
|
T1 |
1 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
13853 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T4 |
7 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8150 |
1 |
|
|
T1 |
2 |
|
T4 |
4 |
|
T6 |
9 |
auto[1] |
9827 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T4 |
9 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8503 |
1 |
|
|
T1 |
3 |
|
T4 |
7 |
|
T6 |
13 |
auto[1] |
9474 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T6 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
970 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
1 |
auto[0] |
auto[0] |
auto[1] |
946 |
1 |
|
|
T6 |
2 |
|
T43 |
4 |
|
T37 |
1 |
auto[0] |
auto[1] |
auto[0] |
3219 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
4 |
auto[0] |
auto[1] |
auto[1] |
3015 |
1 |
|
|
T6 |
2 |
|
T7 |
2 |
|
T43 |
3 |
auto[1] |
auto[0] |
auto[0] |
916 |
1 |
|
|
T4 |
2 |
|
T6 |
4 |
|
T43 |
2 |
auto[1] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T4 |
2 |
|
T6 |
1 |
|
T43 |
2 |
auto[1] |
auto[1] |
auto[0] |
3398 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
4 |
auto[1] |
auto[1] |
auto[1] |
4221 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T6 |
2 |