Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9165 |
1 |
|
|
T2 |
1 |
|
T3 |
5 |
|
T6 |
8 |
auto[1] |
11474 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T6 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9762 |
1 |
|
|
T3 |
5 |
|
T6 |
10 |
|
T10 |
6 |
auto[1] |
10877 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1144 |
1 |
|
|
T3 |
2 |
|
T10 |
3 |
|
T16 |
3 |
auto[0] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T2 |
1 |
|
T10 |
2 |
|
T79 |
1 |
auto[0] |
auto[1] |
auto[0] |
3508 |
1 |
|
|
T3 |
2 |
|
T6 |
6 |
|
T10 |
1 |
auto[0] |
auto[1] |
auto[1] |
3347 |
1 |
|
|
T3 |
1 |
|
T6 |
2 |
|
T10 |
1 |
auto[1] |
auto[0] |
auto[0] |
1222 |
1 |
|
|
T10 |
2 |
|
T16 |
2 |
|
T59 |
3 |
auto[1] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T3 |
1 |
|
T10 |
1 |
|
T79 |
1 |
auto[1] |
auto[1] |
auto[0] |
3888 |
1 |
|
|
T3 |
1 |
|
T6 |
4 |
|
T14 |
14 |
auto[1] |
auto[1] |
auto[1] |
4770 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T6 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9463 |
1 |
|
|
T3 |
3 |
|
T6 |
4 |
|
T10 |
5 |
auto[1] |
11176 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9824 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
5 |
auto[1] |
10815 |
1 |
|
|
T3 |
3 |
|
T6 |
8 |
|
T10 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1209 |
1 |
|
|
T3 |
1 |
|
T10 |
2 |
|
T16 |
4 |
auto[0] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T3 |
1 |
|
T10 |
2 |
|
T79 |
2 |
auto[0] |
auto[1] |
auto[0] |
3707 |
1 |
|
|
T6 |
2 |
|
T10 |
1 |
|
T14 |
14 |
auto[0] |
auto[1] |
auto[1] |
3379 |
1 |
|
|
T3 |
1 |
|
T6 |
2 |
|
T14 |
11 |
auto[1] |
auto[0] |
auto[0] |
1174 |
1 |
|
|
T2 |
1 |
|
T10 |
1 |
|
T16 |
2 |
auto[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T3 |
1 |
|
T10 |
3 |
|
T16 |
6 |
auto[1] |
auto[1] |
auto[0] |
3734 |
1 |
|
|
T1 |
1 |
|
T3 |
4 |
|
T6 |
5 |
auto[1] |
auto[1] |
auto[1] |
4693 |
1 |
|
|
T6 |
6 |
|
T14 |
12 |
|
T15 |
20 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9424 |
1 |
|
|
T3 |
5 |
|
T6 |
7 |
|
T10 |
4 |
auto[1] |
11215 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9786 |
1 |
|
|
T3 |
6 |
|
T6 |
5 |
|
T10 |
5 |
auto[1] |
10853 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1217 |
1 |
|
|
T3 |
3 |
|
T10 |
2 |
|
T16 |
4 |
auto[0] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T10 |
1 |
|
T79 |
2 |
|
T16 |
4 |
auto[0] |
auto[1] |
auto[0] |
3658 |
1 |
|
|
T3 |
2 |
|
T6 |
1 |
|
T10 |
1 |
auto[0] |
auto[1] |
auto[1] |
3407 |
1 |
|
|
T6 |
6 |
|
T14 |
12 |
|
T15 |
10 |
auto[1] |
auto[0] |
auto[0] |
1224 |
1 |
|
|
T10 |
2 |
|
T16 |
5 |
|
T59 |
1 |
auto[1] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T2 |
1 |
|
T10 |
3 |
|
T16 |
2 |
auto[1] |
auto[1] |
auto[0] |
3687 |
1 |
|
|
T3 |
1 |
|
T6 |
4 |
|
T14 |
8 |
auto[1] |
auto[1] |
auto[1] |
4761 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T6 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9244 |
1 |
|
|
T2 |
1 |
|
T3 |
6 |
|
T6 |
7 |
auto[1] |
11395 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T6 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9864 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
9 |
auto[1] |
10775 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T6 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1179 |
1 |
|
|
T3 |
3 |
|
T10 |
2 |
|
T16 |
3 |
auto[0] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T2 |
1 |
|
T10 |
2 |
|
T79 |
1 |
auto[0] |
auto[1] |
auto[0] |
3635 |
1 |
|
|
T3 |
2 |
|
T6 |
3 |
|
T10 |
1 |
auto[0] |
auto[1] |
auto[1] |
3277 |
1 |
|
|
T3 |
1 |
|
T6 |
4 |
|
T14 |
8 |
auto[1] |
auto[0] |
auto[0] |
1195 |
1 |
|
|
T79 |
1 |
|
T16 |
2 |
|
T59 |
2 |
auto[1] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T10 |
4 |
|
T16 |
4 |
|
T59 |
2 |
auto[1] |
auto[1] |
auto[0] |
3855 |
1 |
|
|
T1 |
1 |
|
T6 |
6 |
|
T14 |
15 |
auto[1] |
auto[1] |
auto[1] |
4746 |
1 |
|
|
T3 |
2 |
|
T6 |
2 |
|
T10 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9412 |
1 |
|
|
T2 |
1 |
|
T3 |
5 |
|
T6 |
8 |
auto[1] |
11227 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T6 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9831 |
1 |
|
|
T3 |
7 |
|
T6 |
6 |
|
T10 |
7 |
auto[1] |
10808 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1186 |
1 |
|
|
T3 |
2 |
|
T10 |
4 |
|
T16 |
3 |
auto[0] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T2 |
1 |
|
T16 |
3 |
|
T59 |
2 |
auto[0] |
auto[1] |
auto[0] |
3609 |
1 |
|
|
T3 |
3 |
|
T6 |
3 |
|
T14 |
8 |
auto[0] |
auto[1] |
auto[1] |
3376 |
1 |
|
|
T6 |
5 |
|
T10 |
1 |
|
T14 |
11 |
auto[1] |
auto[0] |
auto[0] |
1163 |
1 |
|
|
T10 |
2 |
|
T16 |
5 |
|
T59 |
3 |
auto[1] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T3 |
1 |
|
T10 |
2 |
|
T79 |
2 |
auto[1] |
auto[1] |
auto[0] |
3873 |
1 |
|
|
T3 |
2 |
|
T6 |
3 |
|
T10 |
1 |
auto[1] |
auto[1] |
auto[1] |
4655 |
1 |
|
|
T1 |
1 |
|
T6 |
4 |
|
T14 |
18 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5126 |
1 |
|
|
T2 |
1 |
|
T3 |
3 |
|
T10 |
8 |
auto[1] |
15513 |
1 |
|
|
T1 |
1 |
|
T3 |
5 |
|
T6 |
15 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9302 |
1 |
|
|
T2 |
1 |
|
T3 |
6 |
|
T6 |
7 |
auto[1] |
11337 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T6 |
8 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9743 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
6 |
auto[1] |
10896 |
1 |
|
|
T3 |
2 |
|
T6 |
10 |
|
T10 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1146 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T10 |
3 |
auto[0] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T3 |
1 |
|
T16 |
1 |
|
T59 |
3 |
auto[0] |
auto[1] |
auto[0] |
3640 |
1 |
|
|
T3 |
4 |
|
T6 |
3 |
|
T10 |
1 |
auto[0] |
auto[1] |
auto[1] |
3340 |
1 |
|
|
T6 |
4 |
|
T14 |
8 |
|
T15 |
12 |
auto[1] |
auto[0] |
auto[0] |
1151 |
1 |
|
|
T10 |
2 |
|
T79 |
1 |
|
T16 |
4 |
auto[1] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T3 |
1 |
|
T10 |
3 |
|
T79 |
1 |
auto[1] |
auto[1] |
auto[0] |
3806 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T6 |
2 |
auto[1] |
auto[1] |
auto[1] |
4727 |
1 |
|
|
T6 |
6 |
|
T14 |
16 |
|
T15 |
19 |