Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8485 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
9 | 
 | 
T5 | 
5 | 
| auto[1] | 
10440 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
8 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9053 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
10 | 
| auto[1] | 
9872 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
7 | 
 | 
T5 | 
7 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1073 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1085 | 
1 | 
 | 
 | 
T4 | 
4 | 
 | 
T5 | 
1 | 
 | 
T59 | 
2 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3327 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
2 | 
 | 
T5 | 
2 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3000 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T10 | 
2 | 
 | 
T23 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1080 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
3 | 
 | 
T59 | 
3 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1387 | 
1 | 
 | 
 | 
T5 | 
3 | 
 | 
T10 | 
1 | 
 | 
T59 | 
1 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3573 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
2 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4400 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
3 | 
 | 
T5 | 
3 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8566 | 
1 | 
 | 
 | 
T2 | 
4 | 
 | 
T4 | 
8 | 
 | 
T5 | 
9 | 
| auto[1] | 
10359 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
1 | 
 | 
T4 | 
9 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8999 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
10 | 
| auto[1] | 
9926 | 
1 | 
 | 
 | 
T2 | 
3 | 
 | 
T4 | 
7 | 
 | 
T5 | 
6 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1054 | 
1 | 
 | 
 | 
T5 | 
3 | 
 | 
T10 | 
1 | 
 | 
T59 | 
4 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1100 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
3 | 
 | 
T59 | 
3 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3367 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
4 | 
 | 
T5 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3045 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
1 | 
 | 
T5 | 
2 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1067 | 
1 | 
 | 
 | 
T4 | 
5 | 
 | 
T5 | 
3 | 
 | 
T31 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1404 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T10 | 
1 | 
 | 
T59 | 
1 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3511 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T4 | 
1 | 
 | 
T5 | 
1 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4377 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
1 | 
 | 
T5 | 
1 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8559 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
5 | 
 | 
T5 | 
4 | 
| auto[1] | 
10366 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
4 | 
 | 
T4 | 
12 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8872 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
7 | 
| auto[1] | 
10053 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
10 | 
 | 
T5 | 
6 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1041 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
2 | 
 | 
T59 | 
3 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1080 | 
1 | 
 | 
 | 
T4 | 
1 | 
 | 
T5 | 
1 | 
 | 
T59 | 
3 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3384 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
1 | 
 | 
T5 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3054 | 
1 | 
 | 
 | 
T4 | 
1 | 
 | 
T14 | 
13 | 
 | 
T59 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1020 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
4 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1484 | 
1 | 
 | 
 | 
T4 | 
5 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3427 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
2 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4435 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
3 | 
 | 
T5 | 
3 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8603 | 
1 | 
 | 
 | 
T2 | 
3 | 
 | 
T4 | 
8 | 
 | 
T5 | 
5 | 
| auto[1] | 
10322 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
9 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8997 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
9 | 
 | 
T5 | 
6 | 
| auto[1] | 
9928 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
8 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1064 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1084 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
 | 
T59 | 
3 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3326 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
3 | 
 | 
T5 | 
2 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3129 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
1 | 
 | 
T23 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1038 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1439 | 
1 | 
 | 
 | 
T4 | 
4 | 
 | 
T5 | 
5 | 
 | 
T59 | 
3 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3569 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
 | 
T10 | 
2 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4276 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
1 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8560 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
7 | 
 | 
T5 | 
8 | 
| auto[1] | 
10365 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
10 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8955 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
6 | 
| auto[1] | 
9970 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
11 | 
 | 
T5 | 
8 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1077 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
 | 
T10 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1050 | 
1 | 
 | 
 | 
T4 | 
1 | 
 | 
T5 | 
3 | 
 | 
T31 | 
1 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3299 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T5 | 
2 | 
 | 
T23 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3134 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
3 | 
 | 
T5 | 
2 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1041 | 
1 | 
 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
 | 
T59 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1457 | 
1 | 
 | 
 | 
T4 | 
6 | 
 | 
T5 | 
3 | 
 | 
T59 | 
5 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3538 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
3 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4329 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
1 | 
 | 
T10 | 
2 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4625 | 
1 | 
 | 
 | 
T4 | 
10 | 
 | 
T5 | 
9 | 
 | 
T10 | 
2 | 
| auto[1] | 
14300 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
5 | 
 | 
T4 | 
7 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8370 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T4 | 
2 | 
 | 
T5 | 
9 | 
| auto[1] | 
10555 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
4 | 
 | 
T4 | 
15 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
8998 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
8 | 
 | 
T5 | 
7 | 
| auto[1] | 
9927 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
3 | 
 | 
T4 | 
9 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1067 | 
1 | 
 | 
 | 
T5 | 
3 | 
 | 
T10 | 
1 | 
 | 
T59 | 
3 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1037 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
2 | 
 | 
T59 | 
2 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3288 | 
1 | 
 | 
 | 
T5 | 
2 | 
 | 
T23 | 
1 | 
 | 
T14 | 
14 | 
| auto[0] | 
auto[1] | 
auto[1] | 
2978 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1073 | 
1 | 
 | 
 | 
T4 | 
4 | 
 | 
T5 | 
2 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1448 | 
1 | 
 | 
 | 
T4 | 
4 | 
 | 
T5 | 
2 | 
 | 
T59 | 
3 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3570 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T4 | 
4 | 
 | 
T10 | 
2 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4464 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
2 | 
 | 
T4 | 
3 |