| Name |
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| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.1604201474 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.1870281876 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.1165974938 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.1345946408 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.4215523048 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.1325557578 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.71125213 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.170226711 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.3948523622 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.478906218 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.3874215152 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.3043550442 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3274684894 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.2492391881 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_rw.3030724358 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_intr_test.3589536470 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.1761275928 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_tl_errors.3747466034 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.3794161470 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_rw.1986918434 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_intr_test.1437557114 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.3026138273 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_errors.1259111192 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.999190807 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.3630415163 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_rw.621812116 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_intr_test.2396367978 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.1142259982 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.944942927 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.1756709711 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_rw.2086081642 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.3325960095 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_tl_errors.2159273777 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.3090799007 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_rw.3357347994 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_intr_test.1580743311 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.423251412 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_tl_errors.3447020207 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.3918718776 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.3744191430 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_rw.3460369543 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_intr_test.2394757375 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.1819680644 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_tl_errors.1149563604 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.2059659999 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.2953154210 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_csr_rw.529927363 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_intr_test.896449944 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.3490934586 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_tl_errors.835712859 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.2675778859 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.3590518567 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_csr_rw.2468950503 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_intr_test.580553640 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.3007782875 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_tl_errors.215448954 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.194555333 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_csr_mem_rw_with_rand_reset.1584731361 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_csr_rw.3164332286 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_intr_test.1390543848 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_same_csr_outstanding.3984313579 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_tl_errors.495338634 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.4068522401 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.340853663 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_csr_rw.887690832 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_intr_test.383957906 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_same_csr_outstanding.3811851787 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_tl_errors.2226880729 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.2426799180 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.2595678358 |
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| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.1710564858 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2697632828 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2766729834 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.1598337556 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_smoke.4256973392 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all.3883306499 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup.3643894971 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup_reset.3538195391 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_aborted_low_power.2433053659 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_disable_rom_integrity_check.1709983912 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.3505986982 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_escalation_timeout.2417074901 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_glitch.2715628319 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_global_esc.3251588193 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_wakeup_race.870939823 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset.3240807521 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset_invalid.2074365070 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.4214963249 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.556081223 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.987163564 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.3763272505 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_smoke.3795499176 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all.1732865310 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.2858275789 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup.1771475196 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup_reset.3706940536 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_aborted_low_power.3044980477 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_disable_rom_integrity_check.2417152844 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.227327174 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_escalation_timeout.2685974423 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_glitch.4219681159 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_global_esc.4143515293 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_wakeup_race.1395427907 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset.2403155766 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset_invalid.2357213975 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.3342197082 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3915671301 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.731229343 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.3187333006 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_smoke.2614784070 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all.1417515739 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all_with_rand_reset.1191434935 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup.2806854472 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup_reset.166035596 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_aborted_low_power.3608785203 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.3214535780 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_escalation_timeout.402447840 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_glitch.1396190967 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_global_esc.1443726313 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_wakeup_race.4284266392 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset.2622413481 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset_invalid.30697627 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.3715069896 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1388244080 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2491733774 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.3171986090 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_smoke.4086411349 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all.422675605 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.3581797501 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup.1776654943 |
| /workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup_reset.2509667889 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_smoke.3626760041 |
|
|
Sep 24 08:42:06 AM UTC 24 |
Sep 24 08:42:08 AM UTC 24 |
30792867 ps |
| T2 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_wakeup_reset.522208656 |
|
|
Sep 24 08:42:07 AM UTC 24 |
Sep 24 08:42:09 AM UTC 24 |
103096451 ps |
| T3 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_reset.3813020338 |
|
|
Sep 24 08:42:06 AM UTC 24 |
Sep 24 08:42:09 AM UTC 24 |
59765840 ps |
| T4 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_lowpower_wakeup_race.1497865383 |
|
|
Sep 24 08:42:06 AM UTC 24 |
Sep 24 08:42:09 AM UTC 24 |
311508985 ps |
| T5 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_wakeup.2746572987 |
|
|
Sep 24 08:42:07 AM UTC 24 |
Sep 24 08:42:09 AM UTC 24 |
281197322 ps |
| T6 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.990823540 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
46517851 ps |
| T7 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_global_esc.1095056009 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
48561657 ps |
| T8 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_aborted_low_power.740763945 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
146928901 ps |
| T9 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_escalation_timeout.657454130 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
386990452 ps |
| T10 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.578723557 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
99643812 ps |
| T13 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_rstmgr_intersig_mubi.3225421831 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:10 AM UTC 24 |
53909716 ps |
| T17 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_glitch.3547744628 |
|
|
Sep 24 08:42:09 AM UTC 24 |
Sep 24 08:42:11 AM UTC 24 |
38698601 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_invalid.4232595943 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:25 AM UTC 24 |
42712972 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_smoke.2531612276 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
54390852 ps |
| T12 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_disable_rom_integrity_check.1560531360 |
|
|
Sep 24 08:42:09 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
67788124 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_reset_invalid.1710463727 |
|
|
Sep 24 08:42:09 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
113633378 ps |
| T14 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4078235510 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
997562069 ps |
| T36 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset.3420113263 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
223784425 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_lowpower_wakeup_race.665753455 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
283157727 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3293096801 |
|
|
Sep 24 08:42:08 AM UTC 24 |
Sep 24 08:42:12 AM UTC 24 |
820112486 ps |
| T20 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm.1821737157 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:13 AM UTC 24 |
339784653 ps |
| T15 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_aborted_low_power.4249290078 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:13 AM UTC 24 |
70586096 ps |
| T31 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup.2151816749 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:13 AM UTC 24 |
281842476 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rstmgr_intersig_mubi.2097865720 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:13 AM UTC 24 |
147232357 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup_reset.3048143073 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:13 AM UTC 24 |
121105208 ps |
| T11 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_esc_clk_rst_malfunc.261342606 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:14 AM UTC 24 |
39682826 ps |
| T34 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_glitch.4118719509 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:25 AM UTC 24 |
44287536 ps |
| T35 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_global_esc.162505980 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:15 AM UTC 24 |
97927891 ps |
| T21 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm.1588870712 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
647527854 ps |
| T18 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_glitch.2892628349 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:15 AM UTC 24 |
67060743 ps |
| T27 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_disable_rom_integrity_check.1405935851 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:15 AM UTC 24 |
66885745 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_escalation_timeout.3148147950 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:15 AM UTC 24 |
115980010 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset_invalid.1521002657 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:15 AM UTC 24 |
218718532 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3835763251 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:16 AM UTC 24 |
1429322945 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.2149175960 |
|
|
Sep 24 08:42:13 AM UTC 24 |
Sep 24 08:42:16 AM UTC 24 |
299778317 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3133651442 |
|
|
Sep 24 08:42:11 AM UTC 24 |
Sep 24 08:42:16 AM UTC 24 |
879152153 ps |
| T16 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_stress_all.942200063 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:16 AM UTC 24 |
2532572466 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_smoke.3785158707 |
|
|
Sep 24 08:42:15 AM UTC 24 |
Sep 24 08:42:16 AM UTC 24 |
63352542 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset.2223030038 |
|
|
Sep 24 08:42:15 AM UTC 24 |
Sep 24 08:42:17 AM UTC 24 |
130343716 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm.1962226018 |
|
|
Sep 24 08:42:14 AM UTC 24 |
Sep 24 08:42:17 AM UTC 24 |
411940059 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_lowpower_wakeup_race.366996572 |
|
|
Sep 24 08:42:15 AM UTC 24 |
Sep 24 08:42:17 AM UTC 24 |
408073337 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_aborted_low_power.1641229641 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:18 AM UTC 24 |
20652109 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.1302430112 |
|
|
Sep 24 08:42:17 AM UTC 24 |
Sep 24 08:42:18 AM UTC 24 |
39199410 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup_reset.1758604164 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:18 AM UTC 24 |
82352609 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all.1034912423 |
|
|
Sep 24 08:42:14 AM UTC 24 |
Sep 24 08:42:18 AM UTC 24 |
2772936689 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.1917302258 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:19 AM UTC 24 |
93931932 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup.262183259 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:19 AM UTC 24 |
136535969 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_global_esc.1550256688 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:20 AM UTC 24 |
40213513 ps |
| T19 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_glitch.3892892524 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:20 AM UTC 24 |
27925713 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_disable_rom_integrity_check.2956329249 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:20 AM UTC 24 |
89800943 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all.3770096002 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:28 AM UTC 24 |
1460241788 ps |
| T44 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset_invalid.39725699 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:20 AM UTC 24 |
124712411 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.3978377967 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:20 AM UTC 24 |
448175401 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_escalation_timeout.4190873966 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:21 AM UTC 24 |
623714943 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3322190430 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:21 AM UTC 24 |
870399101 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1529804666 |
|
|
Sep 24 08:42:16 AM UTC 24 |
Sep 24 08:42:21 AM UTC 24 |
1246264718 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm.1481888465 |
|
|
Sep 24 08:42:18 AM UTC 24 |
Sep 24 08:42:22 AM UTC 24 |
322425827 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_smoke.1261790754 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:22 AM UTC 24 |
28882978 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset.824358519 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:22 AM UTC 24 |
95716442 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_wakeup_race.426846026 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:22 AM UTC 24 |
86152459 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup.3823824 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:23 AM UTC 24 |
183271525 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_aborted_low_power.85768138 |
|
|
Sep 24 08:42:21 AM UTC 24 |
Sep 24 08:42:24 AM UTC 24 |
135701895 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_esc_clk_rst_malfunc.3358542421 |
|
|
Sep 24 08:42:22 AM UTC 24 |
Sep 24 08:42:24 AM UTC 24 |
31219648 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup_reset.4206859371 |
|
|
Sep 24 08:42:21 AM UTC 24 |
Sep 24 08:42:24 AM UTC 24 |
94544814 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.1647886377 |
|
|
Sep 24 08:42:22 AM UTC 24 |
Sep 24 08:42:24 AM UTC 24 |
52967422 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.1905300557 |
|
|
Sep 24 08:42:22 AM UTC 24 |
Sep 24 08:42:24 AM UTC 24 |
162382651 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_global_esc.86609311 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:25 AM UTC 24 |
25545300 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_escalation_timeout.1599551225 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:25 AM UTC 24 |
209091715 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_disable_rom_integrity_check.2101879785 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:25 AM UTC 24 |
61043122 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3956358444 |
|
|
Sep 24 08:42:22 AM UTC 24 |
Sep 24 08:42:26 AM UTC 24 |
1031628101 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset_invalid.3707888321 |
|
|
Sep 24 08:42:23 AM UTC 24 |
Sep 24 08:42:26 AM UTC 24 |
106772689 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_smoke.2127765384 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
134119960 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1461770517 |
|
|
Sep 24 08:42:22 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
978630985 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset.6651602 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
40925338 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup.2902783596 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
154472743 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_wakeup_race.2898404807 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
137309420 ps |
| T24 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all_with_rand_reset.1323049912 |
|
|
Sep 24 08:42:14 AM UTC 24 |
Sep 24 08:42:27 AM UTC 24 |
7185412992 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.3615163602 |
|
|
Sep 24 08:42:27 AM UTC 24 |
Sep 24 08:42:29 AM UTC 24 |
32178077 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup_reset.3625222762 |
|
|
Sep 24 08:42:26 AM UTC 24 |
Sep 24 08:42:29 AM UTC 24 |
342124648 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_aborted_low_power.4053530682 |
|
|
Sep 24 08:42:26 AM UTC 24 |
Sep 24 08:42:29 AM UTC 24 |
23667181 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.128380272 |
|
|
Sep 24 08:42:27 AM UTC 24 |
Sep 24 08:42:29 AM UTC 24 |
187609867 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_glitch.1747495060 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:30 AM UTC 24 |
51145742 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_global_esc.261181554 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:30 AM UTC 24 |
33445321 ps |
| T25 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_stress_all_with_rand_reset.2405089529 |
|
|
Sep 24 08:42:10 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
5115822706 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset.2403155766 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
91437752 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_escalation_timeout.3394917815 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
407064309 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_disable_rom_integrity_check.686698982 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
65080749 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset_invalid.842401105 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
120477135 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1524177654 |
|
|
Sep 24 08:42:27 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
1221466434 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.1796417234 |
|
|
Sep 24 08:42:28 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
427868283 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3377736417 |
|
|
Sep 24 08:42:27 AM UTC 24 |
Sep 24 08:42:31 AM UTC 24 |
1029290845 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all.1435942073 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:32 AM UTC 24 |
959944720 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_smoke.1145741640 |
|
|
Sep 24 08:42:30 AM UTC 24 |
Sep 24 08:42:32 AM UTC 24 |
46595205 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_lowpower_wakeup_race.3643705262 |
|
|
Sep 24 08:42:30 AM UTC 24 |
Sep 24 08:42:32 AM UTC 24 |
136323301 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all.1204161835 |
|
|
Sep 24 08:42:30 AM UTC 24 |
Sep 24 08:42:32 AM UTC 24 |
133130298 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset.386507268 |
|
|
Sep 24 08:42:30 AM UTC 24 |
Sep 24 08:42:33 AM UTC 24 |
76810526 ps |
| T30 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm.4052597722 |
|
|
Sep 24 08:42:29 AM UTC 24 |
Sep 24 08:42:33 AM UTC 24 |
661842034 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup.7081870 |
|
|
Sep 24 08:42:30 AM UTC 24 |
Sep 24 08:42:34 AM UTC 24 |
202482858 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup_reset.166035596 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
196815994 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_aborted_low_power.564878289 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:34 AM UTC 24 |
54479650 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_global_esc.3501610088 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:34 AM UTC 24 |
61142544 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_esc_clk_rst_malfunc.2853678149 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:34 AM UTC 24 |
31719774 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup_reset.1390371037 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:35 AM UTC 24 |
193512460 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.1060972578 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:35 AM UTC 24 |
65922314 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_escalation_timeout.2833242649 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:35 AM UTC 24 |
476898714 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.769961491 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:35 AM UTC 24 |
102126056 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.339360549 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
963425343 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_global_esc.4143515293 |
|
|
Sep 24 08:42:49 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
38530475 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_glitch.1574564569 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
34261550 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset_invalid.4293083940 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
235592583 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_smoke.4256973392 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
76778487 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_disable_rom_integrity_check.1539353452 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
60019434 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1868239692 |
|
|
Sep 24 08:42:32 AM UTC 24 |
Sep 24 08:42:36 AM UTC 24 |
1916262167 ps |
| T26 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all_with_rand_reset.3888677507 |
|
|
Sep 24 08:42:20 AM UTC 24 |
Sep 24 08:42:37 AM UTC 24 |
4252156429 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all_with_rand_reset.1540648686 |
|
|
Sep 24 08:42:25 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
24648855794 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset.1802489249 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
21290816 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_smoke.2614784070 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:50 AM UTC 24 |
53718684 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_lowpower_wakeup_race.4036518795 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
48821492 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup_reset.3538195391 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
39444838 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_aborted_low_power.4142810751 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
53531213 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_stress_all.3420418844 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
468093728 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.1598337556 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:38 AM UTC 24 |
65447119 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup.3643894971 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:39 AM UTC 24 |
308917346 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.2289555667 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:39 AM UTC 24 |
30724559 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_global_esc.548558260 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
43615236 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_glitch.2562938809 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
78234339 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_escalation_timeout.1056851427 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
208631953 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_disable_rom_integrity_check.2726275374 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
58463172 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.1710564858 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
137527333 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset_invalid.933267838 |
|
|
Sep 24 08:42:38 AM UTC 24 |
Sep 24 08:42:40 AM UTC 24 |
172051545 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2697632828 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:41 AM UTC 24 |
738077119 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all_with_rand_reset.1145521186 |
|
|
Sep 24 08:42:29 AM UTC 24 |
Sep 24 08:42:42 AM UTC 24 |
2725740957 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2766729834 |
|
|
Sep 24 08:42:36 AM UTC 24 |
Sep 24 08:42:42 AM UTC 24 |
866800966 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_smoke.3795499176 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:43 AM UTC 24 |
56866406 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup_reset.3706940536 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:43 AM UTC 24 |
105238132 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_aborted_low_power.2433053659 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:43 AM UTC 24 |
31897912 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.3505986982 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:43 AM UTC 24 |
30068085 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_wakeup_race.870939823 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
167725924 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup.1771475196 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
223015859 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset.3240807521 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
78765009 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_global_esc.3251588193 |
|
|
Sep 24 08:42:42 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
43263560 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.4214963249 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
153186460 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_escalation_timeout.2417074901 |
|
|
Sep 24 08:42:42 AM UTC 24 |
Sep 24 08:42:44 AM UTC 24 |
114281019 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.3763272505 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:45 AM UTC 24 |
114489797 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_glitch.2715628319 |
|
|
Sep 24 08:42:43 AM UTC 24 |
Sep 24 08:42:45 AM UTC 24 |
80398107 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup.2806854472 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
991590840 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_disable_rom_integrity_check.1709983912 |
|
|
Sep 24 08:42:43 AM UTC 24 |
Sep 24 08:42:46 AM UTC 24 |
86965779 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.556081223 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:46 AM UTC 24 |
947844013 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset_invalid.2074365070 |
|
|
Sep 24 08:42:44 AM UTC 24 |
Sep 24 08:42:46 AM UTC 24 |
112355939 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.987163564 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:46 AM UTC 24 |
1052305312 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all.3883306499 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:47 AM UTC 24 |
1344584872 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_stress_all_with_rand_reset.3568898260 |
|
|
Sep 24 08:42:34 AM UTC 24 |
Sep 24 08:42:49 AM UTC 24 |
3299521831 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.227327174 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
31041126 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_aborted_low_power.3044980477 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
51008012 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.3342197082 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
271042191 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_glitch.4219681159 |
|
|
Sep 24 08:42:49 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
67404547 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.3187333006 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
51512057 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_escalation_timeout.2685974423 |
|
|
Sep 24 08:42:49 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
378286627 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_wakeup_race.1395427907 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:51 AM UTC 24 |
271078282 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all_with_rand_reset.3907296907 |
|
|
Sep 24 08:42:41 AM UTC 24 |
Sep 24 08:42:52 AM UTC 24 |
2120723370 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset.1382102655 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
151175658 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_disable_rom_integrity_check.2417152844 |
|
|
Sep 24 08:42:50 AM UTC 24 |
Sep 24 08:42:53 AM UTC 24 |
57340049 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset_invalid.2357213975 |
|
|
Sep 24 08:42:50 AM UTC 24 |
Sep 24 08:42:53 AM UTC 24 |
112117827 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.731229343 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:53 AM UTC 24 |
1024742506 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3915671301 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:54 AM UTC 24 |
738752769 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_smoke.4086411349 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
30534888 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset.2622413481 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
62423573 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all.1732865310 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
1905961901 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.3214535780 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
28653801 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_aborted_low_power.3608785203 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
29112341 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_wakeup_race.4284266392 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
204582530 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_global_esc.1443726313 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
22967896 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.3171986090 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
194573845 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup.1776654943 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
256691907 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup_reset.2509667889 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
487840156 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_escalation_timeout.402447840 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
400492181 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.3715069896 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:56 AM UTC 24 |
168958632 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1388244080 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:57 AM UTC 24 |
2013165098 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_smoke.408369307 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
31871883 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2491733774 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:42:57 AM UTC 24 |
2893747474 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.2858275789 |
|
|
Sep 24 08:42:48 AM UTC 24 |
Sep 24 08:42:58 AM UTC 24 |
4362666898 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_glitch.1396190967 |
|
|
Sep 24 08:42:56 AM UTC 24 |
Sep 24 08:42:58 AM UTC 24 |
39007574 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_disable_rom_integrity_check.2664598226 |
|
|
Sep 24 08:42:56 AM UTC 24 |
Sep 24 08:42:58 AM UTC 24 |
73212222 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup_reset.202860696 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
132241759 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset_invalid.30697627 |
|
|
Sep 24 08:42:56 AM UTC 24 |
Sep 24 08:42:58 AM UTC 24 |
172877283 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_smoke.2197612371 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
42985028 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_smoke.3747824479 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
59113878 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset.3425126439 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
86269264 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all.1417515739 |
|
|
Sep 24 08:42:54 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
3891116870 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup.843160333 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
488831847 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_lowpower_wakeup_race.3167968986 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
90314285 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup.4258830181 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
51052963 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_glitch.3509139138 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
48904378 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_aborted_low_power.3405946722 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
70969330 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_glitch.2711772430 |
|
|
Sep 24 08:43:00 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
40061197 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.1695932098 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
36220174 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_global_esc.1787149264 |
|
|
Sep 24 08:43:00 AM UTC 24 |
Sep 24 08:43:01 AM UTC 24 |
47925338 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.1799891156 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
183628153 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_disable_rom_integrity_check.2884353158 |
|
|
Sep 24 08:43:00 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
73595802 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.2708338077 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
1064085629 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset_invalid.3095672774 |
|
|
Sep 24 08:43:00 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
134657753 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.4281619327 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
171061218 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_escalation_timeout.1490814317 |
|
|
Sep 24 08:43:00 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
394706070 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup_reset.847727916 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:02 AM UTC 24 |
593177092 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2910786958 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:03 AM UTC 24 |
1293472944 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_smoke.492425681 |
|
|
Sep 24 08:43:01 AM UTC 24 |
Sep 24 08:43:03 AM UTC 24 |
29798130 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.575020285 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:04 AM UTC 24 |
844343785 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all.455616511 |
|
|
Sep 24 08:43:01 AM UTC 24 |
Sep 24 08:43:04 AM UTC 24 |
961271527 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all.422675605 |
|
|
Sep 24 08:42:59 AM UTC 24 |
Sep 24 08:43:05 AM UTC 24 |
4398708366 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all_with_rand_reset.1191434935 |
|
|
Sep 24 08:42:50 AM UTC 24 |
Sep 24 08:43:06 AM UTC 24 |
4508426380 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.3581797501 |
|
|
Sep 24 08:42:56 AM UTC 24 |
Sep 24 08:43:06 AM UTC 24 |
5292474096 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset.551207238 |
|
|
Sep 24 08:43:04 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
67664991 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_lowpower_wakeup_race.2074829982 |
|
|
Sep 24 08:43:04 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
356499732 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_glitch.848757558 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
115041358 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_global_esc.2163713935 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
59978536 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3079842582 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
842415885 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_esc_clk_rst_malfunc.271659298 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
34694280 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_aborted_low_power.1130294970 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
45858092 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rstmgr_intersig_mubi.1141969346 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
276864160 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.2541552662 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
265357815 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_escalation_timeout.1229929473 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
422308915 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_disable_rom_integrity_check.2578032144 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:07 AM UTC 24 |
68034703 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_global_esc.3805479469 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
76358375 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset_invalid.2970026875 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:08 AM UTC 24 |
104418705 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup.1672678279 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:08 AM UTC 24 |
316392771 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup_reset.2433901732 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:08 AM UTC 24 |
334480797 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1198201224 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:09 AM UTC 24 |
1153872883 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_aborted_low_power.1147696884 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
56276135 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_lowpower_wakeup_race.2085063742 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:10 AM UTC 24 |
284714980 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2387484484 |
|
|
Sep 24 08:43:08 AM UTC 24 |
Sep 24 08:43:12 AM UTC 24 |
824622997 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.3118808334 |
|
|
Sep 24 08:43:01 AM UTC 24 |
Sep 24 08:43:12 AM UTC 24 |
5883937933 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.3944640501 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:13 AM UTC 24 |
146617306 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_esc_clk_rst_malfunc.1760065002 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
29517347 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_ctrl_config_regwen.1191931575 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
87284004 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.1512372350 |
|
|
Sep 24 08:43:30 AM UTC 24 |
Sep 24 08:43:32 AM UTC 24 |
157646630 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.211307230 |
|
|
Sep 24 08:43:05 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
5965902654 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_escalation_timeout.1545958134 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
114135553 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.1704430615 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
51705322 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset_invalid.1150368984 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
298742777 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.1611326219 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
155698783 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.2562060551 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
34424954 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_disable_rom_integrity_check.2488503033 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
61592808 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.1724753537 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:14 AM UTC 24 |
435561880 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.4072689092 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:15 AM UTC 24 |
218328939 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3439651690 |
|
|
Sep 24 08:43:30 AM UTC 24 |
Sep 24 08:43:32 AM UTC 24 |
40343653 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.4027771549 |
|
|
Sep 24 08:43:12 AM UTC 24 |
Sep 24 08:43:15 AM UTC 24 |
1939660785 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.123847231 |
|
|
Sep 24 08:43:14 AM UTC 24 |
Sep 24 08:43:15 AM UTC 24 |
30212624 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3819276702 |
|
|
Sep 24 08:43:11 AM UTC 24 |
Sep 24 08:43:16 AM UTC 24 |
905642582 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.3628385321 |
|
|
Sep 24 08:43:14 AM UTC 24 |
Sep 24 08:43:16 AM UTC 24 |
171314739 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_23/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.3016813324 |
|
|
Sep 24 08:43:14 AM UTC 24 |
Sep 24 08:43:16 AM UTC 24 |
78681588 ps |