Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9619 | 
1 | 
 | 
 | 
T3 | 
10 | 
 | 
T4 | 
10 | 
 | 
T5 | 
1 | 
| auto[1] | 
11628 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
9 | 
 | 
T4 | 
8 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10094 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
8 | 
 | 
T4 | 
6 | 
| auto[1] | 
11153 | 
1 | 
 | 
 | 
T3 | 
11 | 
 | 
T4 | 
12 | 
 | 
T5 | 
1 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1273 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
2 | 
 | 
T34 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1302 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
2 | 
 | 
T33 | 
2 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3685 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
2 | 
 | 
T8 | 
12 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3359 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T4 | 
4 | 
 | 
T5 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1271 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T10 | 
1 | 
 | 
T33 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1664 | 
1 | 
 | 
 | 
T3 | 
5 | 
 | 
T4 | 
4 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3865 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
2 | 
 | 
T4 | 
2 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4828 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T8 | 
13 | 
 | 
T10 | 
4 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9552 | 
1 | 
 | 
 | 
T3 | 
8 | 
 | 
T4 | 
10 | 
 | 
T5 | 
2 | 
| auto[1] | 
11695 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
11 | 
 | 
T4 | 
8 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10269 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
11 | 
 | 
T4 | 
4 | 
| auto[1] | 
10978 | 
1 | 
 | 
 | 
T3 | 
8 | 
 | 
T4 | 
14 | 
 | 
T5 | 
1 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1243 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T33 | 
2 | 
 | 
T16 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1267 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T4 | 
4 | 
 | 
T10 | 
1 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3805 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3237 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
 | 
T8 | 
12 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1301 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
1 | 
 | 
T33 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1699 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
3 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3920 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
5 | 
 | 
T8 | 
15 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4775 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
4 | 
 | 
T8 | 
14 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9667 | 
1 | 
 | 
 | 
T3 | 
9 | 
 | 
T4 | 
4 | 
 | 
T5 | 
2 | 
| auto[1] | 
11580 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
10 | 
 | 
T4 | 
14 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10149 | 
1 | 
 | 
 | 
T3 | 
11 | 
 | 
T4 | 
5 | 
 | 
T5 | 
1 | 
| auto[1] | 
11098 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
8 | 
 | 
T4 | 
13 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1276 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T10 | 
1 | 
 | 
T33 | 
2 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1237 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T10 | 
1 | 
 | 
T33 | 
1 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3774 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3380 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1238 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
2 | 
 | 
T33 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1759 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
6 | 
 | 
T33 | 
2 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3861 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
1 | 
 | 
T8 | 
10 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4722 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
2 | 
 | 
T4 | 
5 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9558 | 
1 | 
 | 
 | 
T3 | 
9 | 
 | 
T4 | 
7 | 
 | 
T5 | 
1 | 
| auto[1] | 
11689 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
10 | 
 | 
T4 | 
11 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10059 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
10 | 
 | 
T4 | 
10 | 
| auto[1] | 
11188 | 
1 | 
 | 
 | 
T3 | 
9 | 
 | 
T4 | 
8 | 
 | 
T5 | 
1 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1221 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
1 | 
 | 
T33 | 
1 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1290 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
3 | 
 | 
T10 | 
1 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3693 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3354 | 
1 | 
 | 
 | 
T8 | 
8 | 
 | 
T10 | 
4 | 
 | 
T37 | 
13 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1265 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
2 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1734 | 
1 | 
 | 
 | 
T3 | 
5 | 
 | 
T4 | 
2 | 
 | 
T33 | 
4 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3880 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
1 | 
 | 
T4 | 
4 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4810 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9636 | 
1 | 
 | 
 | 
T3 | 
14 | 
 | 
T4 | 
8 | 
 | 
T8 | 
25 | 
| auto[1] | 
11611 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
5 | 
 | 
T4 | 
10 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10038 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
8 | 
 | 
T4 | 
7 | 
| auto[1] | 
11209 | 
1 | 
 | 
 | 
T3 | 
11 | 
 | 
T4 | 
11 | 
 | 
T5 | 
1 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1266 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T33 | 
1 | 
 | 
T34 | 
2 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1333 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T4 | 
4 | 
 | 
T16 | 
3 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3633 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
3 | 
 | 
T8 | 
10 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3404 | 
1 | 
 | 
 | 
T3 | 
5 | 
 | 
T4 | 
1 | 
 | 
T8 | 
15 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1252 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
1 | 
 | 
T10 | 
2 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1659 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
3 | 
 | 
T33 | 
3 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3887 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4813 | 
1 | 
 | 
 | 
T4 | 
3 | 
 | 
T5 | 
1 | 
 | 
T8 | 
10 | 
 
Summary for Variable capture_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for capture_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
5510 | 
1 | 
 | 
 | 
T3 | 
12 | 
 | 
T4 | 
8 | 
 | 
T10 | 
2 | 
| auto[1] | 
15737 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
7 | 
 | 
T4 | 
10 | 
Summary for Variable enable_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for enable_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9597 | 
1 | 
 | 
 | 
T3 | 
10 | 
 | 
T4 | 
6 | 
 | 
T5 | 
1 | 
| auto[1] | 
11650 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
9 | 
 | 
T4 | 
12 | 
Summary for Variable wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for wakeup_cp
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
9972 | 
1 | 
 | 
 | 
T3 | 
5 | 
 | 
T4 | 
8 | 
 | 
T5 | 
1 | 
| auto[1] | 
11275 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
14 | 
 | 
T4 | 
10 | 
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for wakeup_cross
Bins
| enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
auto[0] | 
auto[0] | 
1247 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T10 | 
1 | 
 | 
T33 | 
2 | 
| auto[0] | 
auto[0] | 
auto[1] | 
1305 | 
1 | 
 | 
 | 
T3 | 
4 | 
 | 
T4 | 
3 | 
 | 
T33 | 
4 | 
| auto[0] | 
auto[1] | 
auto[0] | 
3648 | 
1 | 
 | 
 | 
T4 | 
2 | 
 | 
T5 | 
1 | 
 | 
T8 | 
19 | 
| auto[0] | 
auto[1] | 
auto[1] | 
3397 | 
1 | 
 | 
 | 
T3 | 
2 | 
 | 
T4 | 
1 | 
 | 
T8 | 
7 | 
| auto[1] | 
auto[0] | 
auto[0] | 
1244 | 
1 | 
 | 
 | 
T3 | 
1 | 
 | 
T4 | 
2 | 
 | 
T10 | 
1 | 
| auto[1] | 
auto[0] | 
auto[1] | 
1714 | 
1 | 
 | 
 | 
T3 | 
3 | 
 | 
T4 | 
3 | 
 | 
T34 | 
2 | 
| auto[1] | 
auto[1] | 
auto[0] | 
3833 | 
1 | 
 | 
 | 
T4 | 
4 | 
 | 
T8 | 
12 | 
 | 
T10 | 
3 | 
| auto[1] | 
auto[1] | 
auto[1] | 
4859 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T3 | 
5 | 
 | 
T4 | 
3 |