Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.46 99.40 99.31 100.00 99.83 99.46 98.77


Total tests in report: 620
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
83.28 83.28 95.35 95.35 79.67 79.67 90.16 90.16 94.33 94.33 88.96 88.96 51.23 51.23 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.2270378388
89.10 5.81 97.26 1.91 84.52 4.86 91.24 1.09 97.67 3.33 92.46 3.50 71.43 20.20 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst.1424451969
91.99 2.89 97.38 0.12 93.75 9.23 92.17 0.92 97.83 0.17 93.94 1.48 76.85 5.42 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_reset.2092557022
94.05 2.06 98.09 0.71 95.70 1.94 92.50 0.34 98.67 0.83 94.62 0.67 84.73 7.88 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_mem_rw_with_rand_reset.996474257
95.97 1.92 98.69 0.60 96.32 0.62 95.60 3.10 99.50 0.83 98.25 3.63 87.44 2.71 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.1150474249
97.14 1.17 99.11 0.42 96.53 0.21 98.91 3.31 99.83 0.33 98.79 0.54 89.66 2.22 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_cnsty.3134513764
97.75 0.61 99.11 0.00 97.22 0.69 98.91 0.00 99.83 0.00 98.79 0.00 92.61 2.96 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_intg_err.3641131235
98.31 0.57 99.11 0.00 97.29 0.07 98.91 0.00 99.83 0.00 98.92 0.13 95.81 3.20 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.4195467782
98.59 0.27 99.11 0.00 98.68 1.39 98.91 0.00 99.83 0.00 98.92 0.00 96.06 0.25 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_errors.3352402920
98.77 0.18 99.11 0.00 98.68 0.00 99.50 0.59 99.83 0.00 98.92 0.00 96.55 0.49 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_cnsty.2829450701
98.93 0.16 99.11 0.00 98.68 0.00 99.50 0.00 99.83 0.00 98.92 0.00 97.54 0.99 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.2598703028
99.07 0.14 99.40 0.30 99.03 0.35 99.66 0.17 99.83 0.00 98.92 0.00 97.54 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_alert_test.803473715
99.19 0.13 99.40 0.00 99.03 0.00 99.66 0.00 99.83 0.00 99.19 0.27 98.03 0.49 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_stress_all.2702430243
99.26 0.07 99.40 0.00 99.03 0.00 99.83 0.17 99.83 0.00 99.19 0.00 98.28 0.25 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.3595536411
99.31 0.05 99.40 0.00 99.10 0.07 99.83 0.00 99.83 0.00 99.19 0.00 98.52 0.25 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_intg_err.656933019
99.35 0.04 99.40 0.00 99.10 0.00 99.83 0.00 99.83 0.00 99.19 0.00 98.77 0.25 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst_reset_race.3170856604
99.38 0.03 99.40 0.00 99.10 0.00 100.00 0.17 99.83 0.00 99.19 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_cnsty.3020728328
99.41 0.02 99.40 0.00 99.10 0.00 100.00 0.00 99.83 0.00 99.33 0.13 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_rw.1840115872
99.43 0.02 99.40 0.00 99.10 0.00 100.00 0.00 99.83 0.00 99.46 0.13 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_por_stretcher.3203420342
99.44 0.01 99.40 0.00 99.17 0.07 100.00 0.00 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_errors.512822093
99.45 0.01 99.40 0.00 99.24 0.07 100.00 0.00 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_intg_err.2174112076
99.46 0.01 99.40 0.00 99.31 0.07 100.00 0.00 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_intg_err.1253559133

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_aliasing.1824290042
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_bit_bash.1591104159
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_hw_reset.3801711770
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_same_csr_outstanding.470190467
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_intg_err.369504169
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_aliasing.1080665555
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_bit_bash.2504676599
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_hw_reset.3900474841
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_mem_rw_with_rand_reset.2320603240
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_rw.3655191832
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_same_csr_outstanding.4165444020
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_errors.2918117981
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_intg_err.1576318068
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_mem_rw_with_rand_reset.1035898424
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_rw.2734278282
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_same_csr_outstanding.1178348808
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_errors.1492435044
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_intg_err.1195498757
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_mem_rw_with_rand_reset.381208375
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_rw.1765408470
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_same_csr_outstanding.836129337
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_errors.1337923072
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_intg_err.2409995608
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_mem_rw_with_rand_reset.1027894000
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_rw.3748801426
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_same_csr_outstanding.335621469
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_tl_errors.2130433448
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_tl_intg_err.687045721
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_mem_rw_with_rand_reset.2557152317
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_rw.4055343423
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_same_csr_outstanding.1167807311
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_errors.2854206088
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_intg_err.1527593792
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_mem_rw_with_rand_reset.1367252075
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_rw.3545850409
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_same_csr_outstanding.3275617851
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_errors.2117370334
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_mem_rw_with_rand_reset.1983863756
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_rw.2291239373
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_same_csr_outstanding.3786219898
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_errors.4208611560
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_intg_err.588031253
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_mem_rw_with_rand_reset.3922457290
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_rw.2670538415
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_same_csr_outstanding.957442322
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_errors.2102841605
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_intg_err.943010128
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_mem_rw_with_rand_reset.3977511975
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_rw.2319951145
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_same_csr_outstanding.3693091635
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_errors.2030946296
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_intg_err.579795586
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_mem_rw_with_rand_reset.4101543331
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_rw.2379052754
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_same_csr_outstanding.3565705177
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_errors.2196419230
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_mem_rw_with_rand_reset.2200789391
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_rw.739424492
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_same_csr_outstanding.1147537870
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_errors.1842461436
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_aliasing.15864985
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_bit_bash.2636480926
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_hw_reset.4199833678
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_mem_rw_with_rand_reset.121629865
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_rw.927446180
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_same_csr_outstanding.2081316510
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_errors.2258683661
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_aliasing.3073287808
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_bit_bash.3120201152
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_hw_reset.3690402988
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_mem_rw_with_rand_reset.1786785321
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_rw.3235114156
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_same_csr_outstanding.1325279146
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_intg_err.4218970401
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_aliasing.1277144892
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_bit_bash.3982051935
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_hw_reset.3059722662
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_mem_rw_with_rand_reset.2244182375
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_rw.4191178055
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_same_csr_outstanding.368655230
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_errors.2120315116
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_intg_err.1531370889
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_mem_rw_with_rand_reset.3136474553
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_rw.1325810208
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_same_csr_outstanding.2310258182
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_errors.2797715266
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_intg_err.2165751697
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_mem_rw_with_rand_reset.1187169871
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_rw.186406747
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_same_csr_outstanding.4100606752
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_errors.2655014567
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_intg_err.2266029846
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_mem_rw_with_rand_reset.1043038319
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_rw.40414161
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_same_csr_outstanding.2990110336
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_tl_errors.4269440770
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_tl_intg_err.677593101
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_csr_mem_rw_with_rand_reset.3806656537
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/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_stress_all.1601828800
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst.1870689067
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst_reset_race.3260196035
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_alert_test.360534171
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_cnsty.2021540711
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_shadow_attack.3678241938
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_por_stretcher.335301355
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_reset.3960707734
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sec_cm_scan_intersig_mubi.2077283174
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_smoke.3910698750
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_stress_all.218129129
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst.1127101290
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst_reset_race.2120401116
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_alert_test.1847029175
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_cnsty.850362214
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_shadow_attack.1660712669
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_por_stretcher.3997868011
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_reset.1739196183
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sec_cm_scan_intersig_mubi.2335765707
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_smoke.4189435033
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_stress_all.281182500
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst.3048210107
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst_reset_race.1512098635
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_alert_test.4279925403
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_cnsty.4180405725
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_shadow_attack.564504301
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_por_stretcher.3804848103
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_reset.4285701384
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sec_cm_scan_intersig_mubi.2025329624
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_smoke.237079196
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_stress_all.4281782735
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst.937807228
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst_reset_race.3119524177
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_alert_test.1875562972
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_cnsty.919568505
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.1739016172
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.1079684887
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.1330669883
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.941079818
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.4180329076
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.2765562176
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.675497122
/workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.2772490203



Total test records in report: 620
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_por_stretcher.3203420342 Aug 23 06:03:42 AM UTC 24 Aug 23 06:03:44 AM UTC 24 220693911 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_smoke.784237246 Aug 23 06:03:42 AM UTC 24 Aug 23 06:03:44 AM UTC 24 112946095 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.2598703028 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:45 AM UTC 24 154831418 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_shadow_attack.2360371929 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:45 AM UTC 24 302615667 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst_reset_race.3170856604 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:46 AM UTC 24 266900379 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_alert_test.803473715 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:46 AM UTC 24 77276304 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_por_stretcher.370164843 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:46 AM UTC 24 166000101 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst.1424451969 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:46 AM UTC 24 451289717 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.2270378388 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:47 AM UTC 24 107943578 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm_scan_intersig_mubi.783035644 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:47 AM UTC 24 144449571 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst_reset_race.1349824215 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:47 AM UTC 24 167910436 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_shadow_attack.552330138 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:47 AM UTC 24 301158293 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_alert_test.1537943038 Aug 23 06:03:46 AM UTC 24 Aug 23 06:03:48 AM UTC 24 71372879 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst.958115328 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:48 AM UTC 24 368618161 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_por_stretcher.4251583198 Aug 23 06:03:46 AM UTC 24 Aug 23 06:03:48 AM UTC 24 217792336 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_smoke.73134606 Aug 23 06:03:46 AM UTC 24 Aug 23 06:03:48 AM UTC 24 196532897 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_reset.2092557022 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:49 AM UTC 24 630002538 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst_reset_race.2281361695 Aug 23 06:03:47 AM UTC 24 Aug 23 06:03:49 AM UTC 24 117117858 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm_scan_intersig_mubi.1865118749 Aug 23 06:03:47 AM UTC 24 Aug 23 06:03:49 AM UTC 24 108194577 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_reset.3015322781 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:49 AM UTC 24 1403840449 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst.3048210107 Aug 23 06:04:04 AM UTC 24 Aug 23 06:04:07 AM UTC 24 137944432 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst.1844921708 Aug 23 06:03:47 AM UTC 24 Aug 23 06:03:50 AM UTC 24 139907398 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.3595536411 Aug 23 06:03:43 AM UTC 24 Aug 23 06:03:50 AM UTC 24 1273920334 ps
T71 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_alert_test.1537666767 Aug 23 06:03:48 AM UTC 24 Aug 23 06:03:50 AM UTC 24 68487470 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_shadow_attack.2986423539 Aug 23 06:03:48 AM UTC 24 Aug 23 06:03:50 AM UTC 24 302123902 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_smoke.780160468 Aug 23 06:03:48 AM UTC 24 Aug 23 06:03:51 AM UTC 24 201161250 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_cnsty.3134513764 Aug 23 06:03:45 AM UTC 24 Aug 23 06:03:51 AM UTC 24 1273199531 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_por_stretcher.278791756 Aug 23 06:03:49 AM UTC 24 Aug 23 06:03:51 AM UTC 24 88202365 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst_reset_race.1462168681 Aug 23 06:03:49 AM UTC 24 Aug 23 06:03:52 AM UTC 24 189153511 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm_scan_intersig_mubi.872505283 Aug 23 06:03:50 AM UTC 24 Aug 23 06:03:52 AM UTC 24 141780298 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_reset.2580355843 Aug 23 06:03:47 AM UTC 24 Aug 23 06:03:52 AM UTC 24 849403998 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst.1577422683 Aug 23 06:03:49 AM UTC 24 Aug 23 06:03:52 AM UTC 24 132827792 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_shadow_attack.1758650947 Aug 23 06:03:51 AM UTC 24 Aug 23 06:03:53 AM UTC 24 301868092 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_alert_test.1533744669 Aug 23 06:03:52 AM UTC 24 Aug 23 06:03:53 AM UTC 24 66532823 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_por_stretcher.991451008 Aug 23 06:03:52 AM UTC 24 Aug 23 06:03:54 AM UTC 24 135523647 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_smoke.325980603 Aug 23 06:03:52 AM UTC 24 Aug 23 06:03:54 AM UTC 24 202483721 ps
T143 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm_scan_intersig_mubi.619788738 Aug 23 06:03:53 AM UTC 24 Aug 23 06:03:55 AM UTC 24 99203374 ps
T144 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst_reset_race.705372629 Aug 23 06:03:53 AM UTC 24 Aug 23 06:03:55 AM UTC 24 175856586 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_cnsty.2829450701 Aug 23 06:03:47 AM UTC 24 Aug 23 06:03:55 AM UTC 24 1950506023 ps
T83 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst.93916009 Aug 23 06:03:53 AM UTC 24 Aug 23 06:03:55 AM UTC 24 124738875 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_reset.1560049476 Aug 23 06:03:49 AM UTC 24 Aug 23 06:03:55 AM UTC 24 1352924040 ps
T145 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_shadow_attack.45213204 Aug 23 06:03:54 AM UTC 24 Aug 23 06:03:56 AM UTC 24 302442751 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_cnsty.842269245 Aug 23 06:03:51 AM UTC 24 Aug 23 06:03:57 AM UTC 24 1271533729 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_reset.1097534694 Aug 23 06:03:52 AM UTC 24 Aug 23 06:03:57 AM UTC 24 851579847 ps
T146 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_alert_test.1093290418 Aug 23 06:03:55 AM UTC 24 Aug 23 06:03:57 AM UTC 24 57815736 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_por_stretcher.3288503197 Aug 23 06:03:56 AM UTC 24 Aug 23 06:03:58 AM UTC 24 199993729 ps
T135 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst_reset_race.3260196035 Aug 23 06:03:56 AM UTC 24 Aug 23 06:03:58 AM UTC 24 187231967 ps
T66 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.1150474249 Aug 23 06:03:46 AM UTC 24 Aug 23 06:03:59 AM UTC 24 8406436930 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_cnsty.4148029829 Aug 23 06:03:53 AM UTC 24 Aug 23 06:03:59 AM UTC 24 1270467324 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_smoke.685145625 Aug 23 06:03:56 AM UTC 24 Aug 23 06:03:59 AM UTC 24 261333896 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_sec_cm_scan_intersig_mubi.3838074969 Aug 23 06:03:57 AM UTC 24 Aug 23 06:03:59 AM UTC 24 150320194 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_shadow_attack.1345611515 Aug 23 06:03:58 AM UTC 24 Aug 23 06:04:00 AM UTC 24 302108973 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst.1870689067 Aug 23 06:03:57 AM UTC 24 Aug 23 06:04:00 AM UTC 24 150606555 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_reset.1143302370 Aug 23 06:03:56 AM UTC 24 Aug 23 06:04:01 AM UTC 24 812536491 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_alert_test.4221767545 Aug 23 06:04:00 AM UTC 24 Aug 23 06:04:01 AM UTC 24 68191154 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_por_stretcher.335301355 Aug 23 06:04:00 AM UTC 24 Aug 23 06:04:01 AM UTC 24 75442038 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_smoke.3910698750 Aug 23 06:04:00 AM UTC 24 Aug 23 06:04:02 AM UTC 24 259250616 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst_reset_race.2120401116 Aug 23 06:04:01 AM UTC 24 Aug 23 06:04:03 AM UTC 24 113570823 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sec_cm_scan_intersig_mubi.2077283174 Aug 23 06:04:01 AM UTC 24 Aug 23 06:04:03 AM UTC 24 166573600 ps
T67 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm.231936428 Aug 23 06:03:48 AM UTC 24 Aug 23 06:04:03 AM UTC 24 8296978972 ps
T44 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_cnsty.1103814112 Aug 23 06:03:57 AM UTC 24 Aug 23 06:04:04 AM UTC 24 1270087222 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst.1127101290 Aug 23 06:04:01 AM UTC 24 Aug 23 06:04:04 AM UTC 24 382571224 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_shadow_attack.3678241938 Aug 23 06:04:02 AM UTC 24 Aug 23 06:04:04 AM UTC 24 302654584 ps
T147 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_alert_test.360534171 Aug 23 06:04:03 AM UTC 24 Aug 23 06:04:05 AM UTC 24 77321356 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_smoke.4189435033 Aug 23 06:04:03 AM UTC 24 Aug 23 06:04:05 AM UTC 24 197790955 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/2.rstmgr_stress_all.1348499685 Aug 23 06:03:48 AM UTC 24 Aug 23 06:04:06 AM UTC 24 5390444363 ps
T149 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst_reset_race.1512098635 Aug 23 06:04:04 AM UTC 24 Aug 23 06:04:06 AM UTC 24 60911689 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_por_stretcher.3997868011 Aug 23 06:04:04 AM UTC 24 Aug 23 06:04:06 AM UTC 24 120415344 ps
T150 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_sec_cm_scan_intersig_mubi.2335765707 Aug 23 06:04:04 AM UTC 24 Aug 23 06:04:06 AM UTC 24 105999535 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_reset.3960707734 Aug 23 06:04:00 AM UTC 24 Aug 23 06:04:07 AM UTC 24 1982886094 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_alert_test.1847029175 Aug 23 06:04:07 AM UTC 24 Aug 23 06:04:08 AM UTC 24 61953462 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_por_stretcher.3804848103 Aug 23 06:04:07 AM UTC 24 Aug 23 06:04:08 AM UTC 24 169154777 ps
T131 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_shadow_attack.1660712669 Aug 23 06:04:06 AM UTC 24 Aug 23 06:04:09 AM UTC 24 302320291 ps
T132 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_smoke.237079196 Aug 23 06:04:07 AM UTC 24 Aug 23 06:04:09 AM UTC 24 225982654 ps
T68 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm.1310925720 Aug 23 06:03:55 AM UTC 24 Aug 23 06:04:09 AM UTC 24 8455230891 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm.2864917844 Aug 23 06:03:43 AM UTC 24 Aug 23 06:04:10 AM UTC 24 16799585935 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_reset.1739196183 Aug 23 06:04:04 AM UTC 24 Aug 23 06:04:10 AM UTC 24 1442963894 ps
T133 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst_reset_race.3119524177 Aug 23 06:04:08 AM UTC 24 Aug 23 06:04:10 AM UTC 24 181706810 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sec_cm_scan_intersig_mubi.2025329624 Aug 23 06:04:09 AM UTC 24 Aug 23 06:04:11 AM UTC 24 174989045 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_cnsty.2021540711 Aug 23 06:04:02 AM UTC 24 Aug 23 06:04:11 AM UTC 24 2449599309 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst.937807228 Aug 23 06:04:09 AM UTC 24 Aug 23 06:04:11 AM UTC 24 119649922 ps
T151 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_shadow_attack.564504301 Aug 23 06:04:10 AM UTC 24 Aug 23 06:04:12 AM UTC 24 301614188 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_reset.4285701384 Aug 23 06:04:08 AM UTC 24 Aug 23 06:04:13 AM UTC 24 920995073 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_stress_all.281182500 Aug 23 06:04:06 AM UTC 24 Aug 23 06:04:12 AM UTC 24 1295701244 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_stress_all.416498071 Aug 23 06:03:51 AM UTC 24 Aug 23 06:04:13 AM UTC 24 5095445988 ps
T152 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_alert_test.4279925403 Aug 23 06:04:11 AM UTC 24 Aug 23 06:04:13 AM UTC 24 73192485 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.1079684887 Aug 23 06:04:11 AM UTC 24 Aug 23 06:04:13 AM UTC 24 112943548 ps
T153 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.4180329076 Aug 23 06:04:11 AM UTC 24 Aug 23 06:04:14 AM UTC 24 115120431 ps
T154 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.2772490203 Aug 23 06:04:12 AM UTC 24 Aug 23 06:04:14 AM UTC 24 64072035 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_cnsty.850362214 Aug 23 06:04:05 AM UTC 24 Aug 23 06:04:14 AM UTC 24 2444351057 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/4.rstmgr_stress_all.2702430243 Aug 23 06:03:54 AM UTC 24 Aug 23 06:04:15 AM UTC 24 6720248761 ps
T155 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.941079818 Aug 23 06:04:13 AM UTC 24 Aug 23 06:04:15 AM UTC 24 144248976 ps
T156 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.1739016172 Aug 23 06:04:13 AM UTC 24 Aug 23 06:04:15 AM UTC 24 301858313 ps
T136 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.675497122 Aug 23 06:04:12 AM UTC 24 Aug 23 06:04:16 AM UTC 24 459027396 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_alert_test.1875562972 Aug 23 06:04:14 AM UTC 24 Aug 23 06:04:16 AM UTC 24 62454355 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_por_stretcher.360185409 Aug 23 06:04:15 AM UTC 24 Aug 23 06:04:17 AM UTC 24 189872802 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/0.rstmgr_stress_all.1528296283 Aug 23 06:03:43 AM UTC 24 Aug 23 06:04:17 AM UTC 24 9018277738 ps
T142 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst_reset_race.965866448 Aug 23 06:04:15 AM UTC 24 Aug 23 06:04:17 AM UTC 24 144656924 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_smoke.868022647 Aug 23 06:04:15 AM UTC 24 Aug 23 06:04:17 AM UTC 24 225857964 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.1330669883 Aug 23 06:04:12 AM UTC 24 Aug 23 06:04:18 AM UTC 24 1110753617 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_sec_cm_scan_intersig_mubi.891074347 Aug 23 06:04:16 AM UTC 24 Aug 23 06:04:18 AM UTC 24 103648069 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.4195467782 Aug 23 06:03:45 AM UTC 24 Aug 23 06:04:18 AM UTC 24 7991850639 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_stress_all.4281782735 Aug 23 06:04:10 AM UTC 24 Aug 23 06:04:18 AM UTC 24 2254583382 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/5.rstmgr_stress_all.1601828800 Aug 23 06:03:59 AM UTC 24 Aug 23 06:04:19 AM UTC 24 5002867154 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_shadow_attack.2849222613 Aug 23 06:04:16 AM UTC 24 Aug 23 06:04:19 AM UTC 24 301860871 ps
T45 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_cnsty.4180405725 Aug 23 06:04:10 AM UTC 24 Aug 23 06:04:19 AM UTC 24 2455585120 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_alert_test.1796629989 Aug 23 06:04:17 AM UTC 24 Aug 23 06:04:19 AM UTC 24 82111343 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst.947836907 Aug 23 06:04:16 AM UTC 24 Aug 23 06:04:19 AM UTC 24 285444925 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_cnsty.919568505 Aug 23 06:04:13 AM UTC 24 Aug 23 06:04:20 AM UTC 24 1284504714 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_por_stretcher.1214818238 Aug 23 06:04:18 AM UTC 24 Aug 23 06:04:20 AM UTC 24 173981730 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst_reset_race.2775752351 Aug 23 06:04:18 AM UTC 24 Aug 23 06:04:21 AM UTC 24 236664934 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_smoke.3279825382 Aug 23 06:04:18 AM UTC 24 Aug 23 06:04:21 AM UTC 24 249664846 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm.47047216 Aug 23 06:03:51 AM UTC 24 Aug 23 06:04:21 AM UTC 24 16514160023 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_alert_test.3157049970 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:21 AM UTC 24 61898728 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_shadow_attack.3913149155 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:21 AM UTC 24 301910478 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_sec_cm_scan_intersig_mubi.743298773 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:21 AM UTC 24 100987403 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_reset.2064824080 Aug 23 06:04:15 AM UTC 24 Aug 23 06:04:21 AM UTC 24 1667253762 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_smoke.3940992851 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:22 AM UTC 24 188289384 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/6.rstmgr_stress_all.218129129 Aug 23 06:04:02 AM UTC 24 Aug 23 06:04:22 AM UTC 24 5144912190 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst.253381103 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:22 AM UTC 24 334784954 ps
T173 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_por_stretcher.2277990558 Aug 23 06:04:20 AM UTC 24 Aug 23 06:04:23 AM UTC 24 190121892 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst_reset_race.2963824368 Aug 23 06:04:20 AM UTC 24 Aug 23 06:04:23 AM UTC 24 97458071 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_cnsty.301382348 Aug 23 06:04:16 AM UTC 24 Aug 23 06:04:23 AM UTC 24 1266419342 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst.287480263 Aug 23 06:04:20 AM UTC 24 Aug 23 06:04:24 AM UTC 24 135910678 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_alert_test.2170851643 Aug 23 06:04:22 AM UTC 24 Aug 23 06:04:24 AM UTC 24 68695570 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_reset.859939109 Aug 23 06:04:18 AM UTC 24 Aug 23 06:04:24 AM UTC 24 1424370339 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_sec_cm_scan_intersig_mubi.2839418310 Aug 23 06:04:22 AM UTC 24 Aug 23 06:04:24 AM UTC 24 147537017 ps
T178 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_shadow_attack.2838608955 Aug 23 06:04:22 AM UTC 24 Aug 23 06:04:24 AM UTC 24 301400955 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_por_stretcher.1037152101 Aug 23 06:04:23 AM UTC 24 Aug 23 06:04:25 AM UTC 24 118244359 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst_reset_race.1495566939 Aug 23 06:04:23 AM UTC 24 Aug 23 06:04:25 AM UTC 24 230577543 ps
T181 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_smoke.1232119974 Aug 23 06:04:23 AM UTC 24 Aug 23 06:04:25 AM UTC 24 243897746 ps
T182 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_reset.351533034 Aug 23 06:04:20 AM UTC 24 Aug 23 06:04:26 AM UTC 24 915251422 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_sec_cm_scan_intersig_mubi.1338131427 Aug 23 06:04:24 AM UTC 24 Aug 23 06:04:26 AM UTC 24 104941777 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_alert_test.1126590088 Aug 23 06:04:24 AM UTC 24 Aug 23 06:04:26 AM UTC 24 94455224 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst.3832102057 Aug 23 06:04:23 AM UTC 24 Aug 23 06:04:26 AM UTC 24 386235790 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_shadow_attack.529982553 Aug 23 06:04:24 AM UTC 24 Aug 23 06:04:26 AM UTC 24 303623085 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_por_stretcher.3649062180 Aug 23 06:04:25 AM UTC 24 Aug 23 06:04:27 AM UTC 24 97361147 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_cnsty.3020728328 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:27 AM UTC 24 2268928817 ps
T188 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_smoke.953733587 Aug 23 06:04:25 AM UTC 24 Aug 23 06:04:27 AM UTC 24 120952836 ps
T189 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst_reset_race.3859467168 Aug 23 06:04:25 AM UTC 24 Aug 23 06:04:28 AM UTC 24 276359144 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_shadow_attack.2661781487 Aug 23 06:04:26 AM UTC 24 Aug 23 06:04:29 AM UTC 24 302696261 ps
T191 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_sec_cm_scan_intersig_mubi.2242855946 Aug 23 06:04:26 AM UTC 24 Aug 23 06:04:29 AM UTC 24 168747082 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_reset.2702281163 Aug 23 06:04:23 AM UTC 24 Aug 23 06:04:29 AM UTC 24 1452955118 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_alert_test.574900794 Aug 23 06:04:27 AM UTC 24 Aug 23 06:04:29 AM UTC 24 68701702 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_por_stretcher.3287857577 Aug 23 06:04:28 AM UTC 24 Aug 23 06:04:29 AM UTC 24 95206710 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst.4162960428 Aug 23 06:04:26 AM UTC 24 Aug 23 06:04:29 AM UTC 24 307525272 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_cnsty.639792573 Aug 23 06:04:22 AM UTC 24 Aug 23 06:04:30 AM UTC 24 1961380554 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_smoke.1783915849 Aug 23 06:04:28 AM UTC 24 Aug 23 06:04:30 AM UTC 24 256483646 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.2765562176 Aug 23 06:04:13 AM UTC 24 Aug 23 06:04:30 AM UTC 24 4044138085 ps
T197 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst_reset_race.2630103355 Aug 23 06:04:29 AM UTC 24 Aug 23 06:04:31 AM UTC 24 80111254 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst.2700880395 Aug 23 06:04:29 AM UTC 24 Aug 23 06:04:32 AM UTC 24 153856213 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_alert_test.1347537214 Aug 23 06:04:30 AM UTC 24 Aug 23 06:04:32 AM UTC 24 86115128 ps
T200 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_leaf_rst_shadow_attack.4081198464 Aug 23 06:04:30 AM UTC 24 Aug 23 06:04:32 AM UTC 24 304330367 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_sec_cm_scan_intersig_mubi.2136421521 Aug 23 06:04:30 AM UTC 24 Aug 23 06:04:32 AM UTC 24 170958009 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_smoke.3675302432 Aug 23 06:04:30 AM UTC 24 Aug 23 06:04:32 AM UTC 24 114659123 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_cnsty.3369255610 Aug 23 06:04:24 AM UTC 24 Aug 23 06:04:32 AM UTC 24 2246597586 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_reset.1360786576 Aug 23 06:04:25 AM UTC 24 Aug 23 06:04:32 AM UTC 24 1888831458 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_por_stretcher.1371138083 Aug 23 06:04:31 AM UTC 24 Aug 23 06:04:33 AM UTC 24 106240996 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_cnsty.3884915349 Aug 23 06:04:26 AM UTC 24 Aug 23 06:04:33 AM UTC 24 1263914183 ps
T204 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst_reset_race.3105841685 Aug 23 06:04:31 AM UTC 24 Aug 23 06:04:33 AM UTC 24 161194542 ps
T205 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst.840375643 Aug 23 06:04:31 AM UTC 24 Aug 23 06:04:34 AM UTC 24 365541554 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_reset.1913537471 Aug 23 06:04:29 AM UTC 24 Aug 23 06:04:34 AM UTC 24 876329773 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_sec_cm_scan_intersig_mubi.3805977451 Aug 23 06:04:32 AM UTC 24 Aug 23 06:04:34 AM UTC 24 151942587 ps
T208 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_shadow_attack.2344613810 Aug 23 06:04:32 AM UTC 24 Aug 23 06:04:34 AM UTC 24 303610369 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/12.rstmgr_stress_all.1829279352 Aug 23 06:04:22 AM UTC 24 Aug 23 06:04:35 AM UTC 24 3449723606 ps
T209 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/17.rstmgr_smoke.209590946 Aug 23 06:04:33 AM UTC 24 Aug 23 06:04:36 AM UTC 24 199702542 ps
T210 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_alert_test.2958854649 Aug 23 06:04:33 AM UTC 24 Aug 23 06:04:35 AM UTC 24 77025563 ps
T211 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/17.rstmgr_por_stretcher.4173031781 Aug 23 06:04:33 AM UTC 24 Aug 23 06:04:36 AM UTC 24 152540842 ps
T212 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/17.rstmgr_sw_rst_reset_race.3309888215 Aug 23 06:04:33 AM UTC 24 Aug 23 06:04:36 AM UTC 24 163359882 ps
T213 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/11.rstmgr_stress_all.3449069738 Aug 23 06:04:19 AM UTC 24 Aug 23 06:04:36 AM UTC 24 3644805940 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/15.rstmgr_stress_all.4014714032 Aug 23 06:04:30 AM UTC 24 Aug 23 06:04:36 AM UTC 24 1631329246 ps
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T223 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_sec_cm_scan_intersig_mubi.3097064192 Aug 23 06:04:37 AM UTC 24 Aug 23 06:04:39 AM UTC 24 153166317 ps
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T225 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/17.rstmgr_reset.2323896165 Aug 23 06:04:33 AM UTC 24 Aug 23 06:04:40 AM UTC 24 1377010115 ps
T226 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_alert_test.4114423879 Aug 23 06:04:38 AM UTC 24 Aug 23 06:04:40 AM UTC 24 63906168 ps
T227 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_sw_rst.4045636554 Aug 23 06:04:37 AM UTC 24 Aug 23 06:04:40 AM UTC 24 152568176 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_shadow_attack.3341675900 Aug 23 06:04:38 AM UTC 24 Aug 23 06:04:40 AM UTC 24 302246498 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_smoke.3834454130 Aug 23 06:04:38 AM UTC 24 Aug 23 06:04:41 AM UTC 24 251898226 ps
T230 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_por_stretcher.3231951637 Aug 23 06:04:39 AM UTC 24 Aug 23 06:04:41 AM UTC 24 89778008 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_cnsty.1093182182 Aug 23 06:04:32 AM UTC 24 Aug 23 06:04:41 AM UTC 24 2456501144 ps
T231 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst_reset_race.1366086734 Aug 23 06:04:39 AM UTC 24 Aug 23 06:04:41 AM UTC 24 101278239 ps
T232 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/16.rstmgr_stress_all.3110149380 Aug 23 06:04:32 AM UTC 24 Aug 23 06:04:42 AM UTC 24 2505547586 ps
T233 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_reset.2799402267 Aug 23 06:04:37 AM UTC 24 Aug 23 06:04:42 AM UTC 24 931208925 ps
T234 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_sec_cm_scan_intersig_mubi.3131767860 Aug 23 06:04:40 AM UTC 24 Aug 23 06:04:43 AM UTC 24 174454857 ps
T235 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_shadow_attack.617529227 Aug 23 06:04:40 AM UTC 24 Aug 23 06:04:43 AM UTC 24 302452088 ps
T236 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst.40375551 Aug 23 06:04:40 AM UTC 24 Aug 23 06:04:43 AM UTC 24 111832797 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/17.rstmgr_leaf_rst_cnsty.1247862254 Aug 23 06:04:35 AM UTC 24 Aug 23 06:04:43 AM UTC 24 1968288998 ps
T237 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_alert_test.3104561059 Aug 23 06:04:42 AM UTC 24 Aug 23 06:04:43 AM UTC 24 67827417 ps
T238 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_por_stretcher.463944090 Aug 23 06:04:42 AM UTC 24 Aug 23 06:04:43 AM UTC 24 120823972 ps
T239 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst_reset_race.3766365944 Aug 23 06:04:42 AM UTC 24 Aug 23 06:04:43 AM UTC 24 77613178 ps
T240 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_smoke.1076280913 Aug 23 06:04:42 AM UTC 24 Aug 23 06:04:44 AM UTC 24 254481392 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_sec_cm_scan_intersig_mubi.2466651573 Aug 23 06:04:43 AM UTC 24 Aug 23 06:04:45 AM UTC 24 101869553 ps
T242 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_shadow_attack.4145779201 Aug 23 06:04:43 AM UTC 24 Aug 23 06:04:45 AM UTC 24 302150805 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_stress_all.879357125 Aug 23 06:04:40 AM UTC 24 Aug 23 06:04:45 AM UTC 24 818699818 ps
T244 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_alert_test.13324971 Aug 23 06:04:44 AM UTC 24 Aug 23 06:04:46 AM UTC 24 57827459 ps
T245 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_por_stretcher.951769861 Aug 23 06:04:44 AM UTC 24 Aug 23 06:04:46 AM UTC 24 158121348 ps
T246 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst.2537775390 Aug 23 06:04:43 AM UTC 24 Aug 23 06:04:46 AM UTC 24 420910028 ps
T247 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_smoke.3613409256 Aug 23 06:04:44 AM UTC 24 Aug 23 06:04:46 AM UTC 24 246659502 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_cnsty.83024512 Aug 23 06:04:40 AM UTC 24 Aug 23 06:04:46 AM UTC 24 1272043271 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_cnsty.126045209 Aug 23 06:04:37 AM UTC 24 Aug 23 06:04:47 AM UTC 24 2236962227 ps
T249 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_sec_cm_scan_intersig_mubi.1061750745 Aug 23 06:04:45 AM UTC 24 Aug 23 06:04:47 AM UTC 24 153915509 ps
T250 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/19.rstmgr_reset.661217224 Aug 23 06:04:39 AM UTC 24 Aug 23 06:04:47 AM UTC 24 1830294440 ps
T251 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst_reset_race.1105640337 Aug 23 06:04:45 AM UTC 24 Aug 23 06:04:47 AM UTC 24 219944109 ps
T252 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst.2784614531 Aug 23 06:04:45 AM UTC 24 Aug 23 06:04:48 AM UTC 24 137456022 ps
T253 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_alert_test.1043299447 Aug 23 06:04:46 AM UTC 24 Aug 23 06:04:48 AM UTC 24 66697972 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_shadow_attack.275165327 Aug 23 06:04:46 AM UTC 24 Aug 23 06:04:48 AM UTC 24 302999349 ps
T255 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_reset.652675834 Aug 23 06:04:44 AM UTC 24 Aug 23 06:04:48 AM UTC 24 660752779 ps
T256 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_reset.462979578 Aug 23 06:04:42 AM UTC 24 Aug 23 06:04:49 AM UTC 24 1814417379 ps
T257 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_por_stretcher.2607915358 Aug 23 06:04:47 AM UTC 24 Aug 23 06:04:49 AM UTC 24 162207821 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst_reset_race.3849214112 Aug 23 06:04:48 AM UTC 24 Aug 23 06:04:49 AM UTC 24 88579357 ps
T259 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_smoke.918673648 Aug 23 06:04:47 AM UTC 24 Aug 23 06:04:49 AM UTC 24 123817366 ps
T260 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst.4267968386 Aug 23 06:04:48 AM UTC 24 Aug 23 06:04:50 AM UTC 24 293874982 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_alert_test.1754753450 Aug 23 06:04:49 AM UTC 24 Aug 23 06:04:50 AM UTC 24 65152172 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_sec_cm_scan_intersig_mubi.1243060303 Aug 23 06:04:49 AM UTC 24 Aug 23 06:04:51 AM UTC 24 152487219 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_shadow_attack.4277037892 Aug 23 06:04:49 AM UTC 24 Aug 23 06:04:51 AM UTC 24 302455625 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_cnsty.3178046632 Aug 23 06:04:43 AM UTC 24 Aug 23 06:04:51 AM UTC 24 1965704311 ps
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T265 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_por_stretcher.4235895743 Aug 23 06:04:50 AM UTC 24 Aug 23 06:04:52 AM UTC 24 203083888 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_smoke.1842928964 Aug 23 06:04:50 AM UTC 24 Aug 23 06:04:52 AM UTC 24 126527030 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst_reset_race.4190303939 Aug 23 06:04:50 AM UTC 24 Aug 23 06:04:52 AM UTC 24 243866887 ps
T58 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_cnsty.634054090 Aug 23 06:04:46 AM UTC 24 Aug 23 06:04:53 AM UTC 24 1272881021 ps
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T269 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_reset.3556508904 Aug 23 06:04:47 AM UTC 24 Aug 23 06:04:53 AM UTC 24 1305911238 ps
T270 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_leaf_rst_shadow_attack.2634020809 Aug 23 06:04:51 AM UTC 24 Aug 23 06:04:53 AM UTC 24 302202419 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst.795040253 Aug 23 06:04:51 AM UTC 24 Aug 23 06:04:53 AM UTC 24 125246039 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_alert_test.1097183807 Aug 23 06:04:52 AM UTC 24 Aug 23 06:04:54 AM UTC 24 72981871 ps
T273 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_por_stretcher.3672061459 Aug 23 06:04:52 AM UTC 24 Aug 23 06:04:54 AM UTC 24 133782945 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_smoke.3651514993 Aug 23 06:04:52 AM UTC 24 Aug 23 06:04:54 AM UTC 24 195415317 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_sec_cm_scan_intersig_mubi.642318719 Aug 23 06:04:53 AM UTC 24 Aug 23 06:04:55 AM UTC 24 101409254 ps
T276 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/13.rstmgr_stress_all.1840173772 Aug 23 06:04:24 AM UTC 24 Aug 23 06:04:55 AM UTC 24 9100066682 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst_reset_race.713881133 Aug 23 06:04:53 AM UTC 24 Aug 23 06:04:55 AM UTC 24 136498610 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_reset.1362256067 Aug 23 06:04:50 AM UTC 24 Aug 23 06:04:55 AM UTC 24 1081617642 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_alert_test.2986313560 Aug 23 06:04:55 AM UTC 24 Aug 23 06:04:56 AM UTC 24 104541557 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst.1167066140 Aug 23 06:04:53 AM UTC 24 Aug 23 06:04:56 AM UTC 24 371288968 ps
T281 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/24.rstmgr_leaf_rst_shadow_attack.306550300 Aug 23 06:04:55 AM UTC 24 Aug 23 06:04:57 AM UTC 24 301620087 ps
T282 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_cnsty.900875267 Aug 23 06:04:49 AM UTC 24 Aug 23 06:04:57 AM UTC 24 1966913003 ps
T283 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_leaf_rst_cnsty.3829172985 Aug 23 06:04:51 AM UTC 24 Aug 23 06:04:57 AM UTC 24 1264576881 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/18.rstmgr_stress_all.4010005392 Aug 23 06:04:38 AM UTC 24 Aug 23 06:04:57 AM UTC 24 4246524956 ps
T285 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/25.rstmgr_por_stretcher.2616555103 Aug 23 06:04:56 AM UTC 24 Aug 23 06:04:57 AM UTC 24 201023528 ps
T286 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/23.rstmgr_stress_all.2327406762 Aug 23 06:04:51 AM UTC 24 Aug 23 06:04:58 AM UTC 24 1750868703 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_22/rstmgr-sim-vcs/coverage/default/25.rstmgr_sw_rst_reset_race.4250641173 Aug 23 06:04:56 AM UTC 24 Aug 23 06:04:58 AM UTC 24 232981243 ps
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