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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.46 99.40 99.31 100.00 99.83 99.46 98.77


Total test records in report: 584
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html

T295 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_leaf_rst_shadow_attack.2884942956 Oct 09 06:04:39 AM UTC 24 Oct 09 06:04:42 AM UTC 24 301525123 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_por_stretcher.2635800082 Oct 09 06:04:40 AM UTC 24 Oct 09 06:04:42 AM UTC 24 201574858 ps
T50 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_cnsty.3240286536 Oct 09 06:04:33 AM UTC 24 Oct 09 06:04:42 AM UTC 24 1971298809 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_reset.2210423986 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:42 AM UTC 24 797125057 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_stress_all.2025565173 Oct 09 06:04:31 AM UTC 24 Oct 09 06:04:42 AM UTC 24 2714127848 ps
T299 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_sec_cm_scan_intersig_mubi.1173424221 Oct 09 06:04:39 AM UTC 24 Oct 09 06:04:42 AM UTC 24 147401448 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_smoke.2643554985 Oct 09 06:04:40 AM UTC 24 Oct 09 06:04:42 AM UTC 24 118489599 ps
T138 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_reset.1300873077 Oct 09 06:04:34 AM UTC 24 Oct 09 06:04:43 AM UTC 24 1997218904 ps
T139 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_stress_all.2549046372 Oct 09 06:04:08 AM UTC 24 Oct 09 06:04:43 AM UTC 24 10571201701 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_leaf_rst_cnsty.709840541 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:43 AM UTC 24 1957704777 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_reset.695671944 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:43 AM UTC 24 723586154 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_sw_rst_reset_race.799970824 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:43 AM UTC 24 118856742 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_sec_cm_scan_intersig_mubi.748559506 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:44 AM UTC 24 105158871 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_leaf_rst_cnsty.4104027735 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:44 AM UTC 24 1278213579 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_alert_test.519013282 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:44 AM UTC 24 98274526 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_leaf_rst_shadow_attack.2412974853 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:44 AM UTC 24 302695392 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_sw_rst.735179862 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:44 AM UTC 24 268497327 ps
T309 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_smoke.1280672215 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:44 AM UTC 24 120826322 ps
T310 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_por_stretcher.3593851233 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:45 AM UTC 24 83108291 ps
T140 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_stress_all.3708075998 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:45 AM UTC 24 7115513274 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_sec_cm_scan_intersig_mubi.3044357694 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:45 AM UTC 24 104024277 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_sw_rst_reset_race.2537506058 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:45 AM UTC 24 102106582 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_por_stretcher.1831911620 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:45 AM UTC 24 97859791 ps
T141 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_stress_all.1117758308 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:45 AM UTC 24 10875206532 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_sw_rst_reset_race.2242636841 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:45 AM UTC 24 97998612 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_alert_test.1426993717 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:46 AM UTC 24 82665215 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_leaf_rst_cnsty.1869316574 Oct 09 06:04:39 AM UTC 24 Oct 09 06:04:46 AM UTC 24 1268169455 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_leaf_rst_shadow_attack.440673228 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:46 AM UTC 24 302776262 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_smoke.1231363950 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:46 AM UTC 24 119705111 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_sec_cm_scan_intersig_mubi.3283867481 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:47 AM UTC 24 150233201 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_reset.2292832220 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:47 AM UTC 24 933289026 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_sw_rst.873448103 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:47 AM UTC 24 368699451 ps
T322 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_stress_all.3609325284 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:47 AM UTC 24 4997397472 ps
T323 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_alert_test.1482772902 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:47 AM UTC 24 87285157 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_leaf_rst_shadow_attack.173532087 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:47 AM UTC 24 302233826 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_leaf_rst_cnsty.1534872045 Oct 09 06:04:37 AM UTC 24 Oct 09 06:04:47 AM UTC 24 2458094005 ps
T326 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_smoke.2122193664 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:47 AM UTC 24 112653888 ps
T327 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_stress_all.390890757 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:48 AM UTC 24 4746699842 ps
T328 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_por_stretcher.1494714033 Oct 09 06:04:45 AM UTC 24 Oct 09 06:04:48 AM UTC 24 183078779 ps
T329 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_leaf_rst_cnsty.2385591606 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:48 AM UTC 24 1271622351 ps
T330 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_sw_rst_reset_race.1018483971 Oct 09 06:04:45 AM UTC 24 Oct 09 06:04:48 AM UTC 24 113489829 ps
T331 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_leaf_rst_shadow_attack.4131312699 Oct 09 06:04:46 AM UTC 24 Oct 09 06:04:48 AM UTC 24 303361661 ps
T332 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_sw_rst.3645995633 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:48 AM UTC 24 468500320 ps
T333 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_sec_cm_scan_intersig_mubi.3671044204 Oct 09 06:04:46 AM UTC 24 Oct 09 06:04:48 AM UTC 24 144485635 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_reset.990326633 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:49 AM UTC 24 970252665 ps
T335 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_alert_test.923792119 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:49 AM UTC 24 85660696 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_por_stretcher.3598146039 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:49 AM UTC 24 103239364 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_sw_rst.4011316921 Oct 09 06:04:45 AM UTC 24 Oct 09 06:04:49 AM UTC 24 513579844 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_alert_test.2358899003 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:50 AM UTC 24 91703673 ps
T339 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_reset.4245879489 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:50 AM UTC 24 1442374129 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_leaf_rst_shadow_attack.614417577 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:50 AM UTC 24 303025872 ps
T341 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_sec_cm_scan_intersig_mubi.1507366668 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:50 AM UTC 24 105656434 ps
T342 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_stress_all.4057216037 Oct 09 06:04:43 AM UTC 24 Oct 09 06:04:50 AM UTC 24 1153784820 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_smoke.3545713983 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:50 AM UTC 24 253829361 ps
T344 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_sw_rst_reset_race.3660612881 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:50 AM UTC 24 122865788 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_stress_all.555721211 Oct 09 06:04:39 AM UTC 24 Oct 09 06:04:50 AM UTC 24 2305303761 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_sw_rst.4015522444 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:51 AM UTC 24 371081613 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_sw_rst_reset_race.3004732344 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 129788425 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_por_stretcher.717559284 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 189280326 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_alert_test.1990534451 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 67230367 ps
T350 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_smoke.933905397 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 112910060 ps
T351 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_por_stretcher.1587552170 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 217443814 ps
T352 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_sec_cm_scan_intersig_mubi.2925948701 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:51 AM UTC 24 174202148 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_leaf_rst_shadow_attack.3171435815 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:52 AM UTC 24 301653274 ps
T354 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_reset.2600406278 Oct 09 06:04:45 AM UTC 24 Oct 09 06:04:52 AM UTC 24 1117917807 ps
T355 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_sw_rst_reset_race.3293360254 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:52 AM UTC 24 209483453 ps
T356 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_smoke.4114183561 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:52 AM UTC 24 246249587 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_reset.519349821 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:52 AM UTC 24 785156655 ps
T358 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/28.rstmgr_leaf_rst_cnsty.857594074 Oct 09 06:04:42 AM UTC 24 Oct 09 06:04:52 AM UTC 24 2447054634 ps
T359 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_sw_rst.131213597 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:52 AM UTC 24 289946156 ps
T360 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_sec_cm_scan_intersig_mubi.164469202 Oct 09 06:04:50 AM UTC 24 Oct 09 06:04:53 AM UTC 24 183405614 ps
T361 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_alert_test.513358894 Oct 09 06:04:50 AM UTC 24 Oct 09 06:04:53 AM UTC 24 79950602 ps
T362 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_por_stretcher.4104395208 Oct 09 06:04:51 AM UTC 24 Oct 09 06:04:53 AM UTC 24 221275841 ps
T363 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_smoke.2386637821 Oct 09 06:04:51 AM UTC 24 Oct 09 06:04:53 AM UTC 24 128288955 ps
T364 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_leaf_rst_shadow_attack.1943235222 Oct 09 06:04:50 AM UTC 24 Oct 09 06:04:53 AM UTC 24 301958455 ps
T365 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_sw_rst.3835331357 Oct 09 06:04:50 AM UTC 24 Oct 09 06:04:53 AM UTC 24 146246576 ps
T366 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_leaf_rst_cnsty.1951615664 Oct 09 06:04:44 AM UTC 24 Oct 09 06:04:54 AM UTC 24 2464096010 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_sw_rst_reset_race.3002556081 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:54 AM UTC 24 76619112 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_leaf_rst_cnsty.2125447190 Oct 09 06:04:46 AM UTC 24 Oct 09 06:04:54 AM UTC 24 1968677651 ps
T369 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_alert_test.822044443 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:54 AM UTC 24 77898965 ps
T370 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_leaf_rst_shadow_attack.1537589876 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:54 AM UTC 24 329241515 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_sec_cm_scan_intersig_mubi.385394978 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:55 AM UTC 24 103157879 ps
T372 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_por_stretcher.1104898563 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:55 AM UTC 24 137943418 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_smoke.3635021191 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:55 AM UTC 24 115743512 ps
T374 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_reset.835192033 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:55 AM UTC 24 1275574095 ps
T375 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_stress_all.3655560648 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:55 AM UTC 24 3775972381 ps
T376 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_sw_rst.743211257 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:55 AM UTC 24 264620487 ps
T377 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_sw_rst_reset_race.875755426 Oct 09 06:04:53 AM UTC 24 Oct 09 06:04:56 AM UTC 24 100450405 ps
T378 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_sec_cm_scan_intersig_mubi.2081017583 Oct 09 06:04:53 AM UTC 24 Oct 09 06:04:56 AM UTC 24 103445685 ps
T379 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_alert_test.1433024542 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 71150388 ps
T380 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_leaf_rst_shadow_attack.1068441313 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 302110948 ps
T381 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_leaf_rst_cnsty.2275749088 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:56 AM UTC 24 1958080342 ps
T382 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_leaf_rst_cnsty.1523786683 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:56 AM UTC 24 1269125227 ps
T383 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_por_stretcher.75383097 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 182411913 ps
T384 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_sw_rst_reset_race.3077482550 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 104403446 ps
T385 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_sec_cm_scan_intersig_mubi.4239603867 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 105912097 ps
T386 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_smoke.1001840303 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:56 AM UTC 24 253625566 ps
T387 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_sw_rst.2044871701 Oct 09 06:04:53 AM UTC 24 Oct 09 06:04:57 AM UTC 24 393575256 ps
T388 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_leaf_rst_shadow_attack.4224872786 Oct 09 06:05:25 AM UTC 24 Oct 09 06:05:30 AM UTC 24 301245182 ps
T389 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_sw_rst.3939071291 Oct 09 06:04:54 AM UTC 24 Oct 09 06:04:57 AM UTC 24 289375591 ps
T390 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_alert_test.3363166803 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:58 AM UTC 24 78648300 ps
T391 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_por_stretcher.1907292100 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:58 AM UTC 24 159566601 ps
T392 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_leaf_rst_shadow_attack.3084704395 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:58 AM UTC 24 302527854 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_reset.337223330 Oct 09 06:04:49 AM UTC 24 Oct 09 06:04:58 AM UTC 24 2186722213 ps
T394 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_smoke.2963243194 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:58 AM UTC 24 115575335 ps
T395 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_sw_rst_reset_race.3500842669 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:58 AM UTC 24 157194814 ps
T396 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_stress_all.992783444 Oct 09 06:04:50 AM UTC 24 Oct 09 06:04:58 AM UTC 24 1709883345 ps
T397 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/30.rstmgr_stress_all.1729319538 Oct 09 06:04:47 AM UTC 24 Oct 09 06:04:58 AM UTC 24 2407209326 ps
T398 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/27.rstmgr_stress_all.3917394826 Oct 09 06:04:41 AM UTC 24 Oct 09 06:04:59 AM UTC 24 4466159440 ps
T399 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_sw_rst.1706693454 Oct 09 06:04:55 AM UTC 24 Oct 09 06:04:59 AM UTC 24 308195564 ps
T400 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_sec_cm_scan_intersig_mubi.3843514226 Oct 09 06:04:57 AM UTC 24 Oct 09 06:04:59 AM UTC 24 100746916 ps
T401 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_reset.1361795094 Oct 09 06:04:52 AM UTC 24 Oct 09 06:04:59 AM UTC 24 1568915175 ps
T402 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_leaf_rst_shadow_attack.3790901249 Oct 09 06:04:57 AM UTC 24 Oct 09 06:04:59 AM UTC 24 301992890 ps
T403 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_stress_all.3583436670 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:59 AM UTC 24 6732787773 ps
T404 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_leaf_rst_cnsty.3791486676 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:31 AM UTC 24 1975468615 ps
T405 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_alert_test.2135268977 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:00 AM UTC 24 62745727 ps
T406 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/33.rstmgr_leaf_rst_cnsty.778309972 Oct 09 06:04:50 AM UTC 24 Oct 09 06:05:00 AM UTC 24 2247599346 ps
T407 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_reset.3614809365 Oct 09 06:04:52 AM UTC 24 Oct 09 06:05:00 AM UTC 24 1603885047 ps
T408 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_reset.1955941142 Oct 09 06:04:55 AM UTC 24 Oct 09 06:05:00 AM UTC 24 708367203 ps
T409 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_leaf_rst_cnsty.3340996288 Oct 09 06:04:53 AM UTC 24 Oct 09 06:05:00 AM UTC 24 1263800227 ps
T410 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_por_stretcher.221813931 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:00 AM UTC 24 142997659 ps
T411 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_leaf_rst_cnsty.1455226788 Oct 09 06:04:52 AM UTC 24 Oct 09 06:05:00 AM UTC 24 1963834846 ps
T412 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_leaf_rst_shadow_attack.2727770123 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:01 AM UTC 24 301700696 ps
T413 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_sec_cm_scan_intersig_mubi.3258737409 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:01 AM UTC 24 168743033 ps
T414 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_smoke.3210671762 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:01 AM UTC 24 197535809 ps
T415 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_sw_rst_reset_race.1197484162 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:01 AM UTC 24 260858188 ps
T416 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_reset.1684745417 Oct 09 06:04:54 AM UTC 24 Oct 09 06:05:01 AM UTC 24 1743622070 ps
T417 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_stress_all.207470845 Oct 09 06:04:28 AM UTC 24 Oct 09 06:05:02 AM UTC 24 10712696221 ps
T418 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_stress_all.3078769316 Oct 09 06:04:25 AM UTC 24 Oct 09 06:05:02 AM UTC 24 11367377671 ps
T419 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_stress_all.670980851 Oct 09 06:04:55 AM UTC 24 Oct 09 06:05:03 AM UTC 24 1315170401 ps
T420 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/36.rstmgr_leaf_rst_cnsty.1463282140 Oct 09 06:04:55 AM UTC 24 Oct 09 06:05:03 AM UTC 24 1977336659 ps
T421 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_reset.2467487863 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:05 AM UTC 24 1403008492 ps
T422 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/35.rstmgr_stress_all.3666095714 Oct 09 06:04:54 AM UTC 24 Oct 09 06:05:05 AM UTC 24 2472850147 ps
T423 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/31.rstmgr_stress_all.376943362 Oct 09 06:04:47 AM UTC 24 Oct 09 06:05:05 AM UTC 24 4777148650 ps
T424 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_leaf_rst_cnsty.3181817375 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:05 AM UTC 24 2252422790 ps
T425 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_stress_all.1839661954 Oct 09 06:04:18 AM UTC 24 Oct 09 06:05:05 AM UTC 24 14373394194 ps
T426 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/40.rstmgr_por_stretcher.1769663375 Oct 09 06:05:00 AM UTC 24 Oct 09 06:05:05 AM UTC 24 137573203 ps
T427 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/40.rstmgr_smoke.4199794454 Oct 09 06:05:00 AM UTC 24 Oct 09 06:05:05 AM UTC 24 109278714 ps
T428 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.3609582283 Oct 09 06:04:12 AM UTC 24 Oct 09 06:05:07 AM UTC 24 15837981186 ps
T429 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_stress_all.1499617041 Oct 09 06:04:33 AM UTC 24 Oct 09 06:05:09 AM UTC 24 10735236363 ps
T430 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_alert_test.2767252807 Oct 09 06:05:08 AM UTC 24 Oct 09 06:05:10 AM UTC 24 67440718 ps
T431 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/34.rstmgr_stress_all.1181400032 Oct 09 06:04:52 AM UTC 24 Oct 09 06:05:11 AM UTC 24 5189328727 ps
T432 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/37.rstmgr_stress_all.1303934233 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:12 AM UTC 24 3263856888 ps
T433 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/32.rstmgr_stress_all.4057712131 Oct 09 06:04:49 AM UTC 24 Oct 09 06:05:13 AM UTC 24 5115203796 ps
T434 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_por_stretcher.2563757598 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:15 AM UTC 24 158280257 ps
T435 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_sw_rst_reset_race.3080292014 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:15 AM UTC 24 86652821 ps
T436 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_sec_cm_scan_intersig_mubi.1146415790 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:15 AM UTC 24 107658086 ps
T437 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/38.rstmgr_leaf_rst_cnsty.1895529708 Oct 09 06:04:57 AM UTC 24 Oct 09 06:05:17 AM UTC 24 2447847374 ps
T438 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_reset.1918084558 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:19 AM UTC 24 1463960083 ps
T439 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_stress_all.3357478874 Oct 09 06:04:36 AM UTC 24 Oct 09 06:05:21 AM UTC 24 13823026310 ps
T440 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/29.rstmgr_stress_all.1416864472 Oct 09 06:04:44 AM UTC 24 Oct 09 06:05:25 AM UTC 24 12132677013 ps
T441 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/40.rstmgr_leaf_rst_cnsty.676394979 Oct 09 06:05:01 AM UTC 24 Oct 09 06:05:25 AM UTC 24 1274157182 ps
T442 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_stress_all.3770607503 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:25 AM UTC 24 166499384 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_leaf_rst_shadow_attack.289683627 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:26 AM UTC 24 302322110 ps
T444 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/41.rstmgr_alert_test.3809121862 Oct 09 06:05:04 AM UTC 24 Oct 09 06:05:26 AM UTC 24 60362150 ps
T445 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/43.rstmgr_sec_cm_scan_intersig_mubi.181740383 Oct 09 06:05:14 AM UTC 24 Oct 09 06:05:26 AM UTC 24 181111805 ps
T446 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/41.rstmgr_leaf_rst_shadow_attack.85311364 Oct 09 06:05:03 AM UTC 24 Oct 09 06:05:26 AM UTC 24 301375966 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/43.rstmgr_sw_rst.261398404 Oct 09 06:05:13 AM UTC 24 Oct 09 06:05:26 AM UTC 24 120038428 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_sw_rst.749718789 Oct 09 06:05:06 AM UTC 24 Oct 09 06:05:26 AM UTC 24 314781024 ps
T449 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/42.rstmgr_smoke.1792669020 Oct 09 06:05:04 AM UTC 24 Oct 09 06:05:26 AM UTC 24 203867713 ps
T450 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/43.rstmgr_reset.1367816927 Oct 09 06:05:11 AM UTC 24 Oct 09 06:05:29 AM UTC 24 904069696 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_sw_rst.3897746276 Oct 09 06:05:25 AM UTC 24 Oct 09 06:05:32 AM UTC 24 452566534 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_sec_cm_scan_intersig_mubi.3955218476 Oct 09 06:05:25 AM UTC 24 Oct 09 06:05:30 AM UTC 24 143284894 ps
T453 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_sec_cm_scan_intersig_mubi.1740261642 Oct 09 06:05:28 AM UTC 24 Oct 09 06:05:31 AM UTC 24 144446149 ps
T454 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_sw_rst.3671813693 Oct 09 06:05:28 AM UTC 24 Oct 09 06:05:32 AM UTC 24 311365240 ps
T455 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/41.rstmgr_leaf_rst_cnsty.100100553 Oct 09 06:05:03 AM UTC 24 Oct 09 06:05:33 AM UTC 24 2454934871 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_alert_test.3454677818 Oct 09 06:05:26 AM UTC 24 Oct 09 06:05:35 AM UTC 24 69491980 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_leaf_rst_shadow_attack.2457223778 Oct 09 06:05:33 AM UTC 24 Oct 09 06:05:35 AM UTC 24 302738532 ps
T458 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_por_stretcher.1585122646 Oct 09 06:05:27 AM UTC 24 Oct 09 06:05:35 AM UTC 24 100813610 ps
T459 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_smoke.1191496727 Oct 09 06:05:26 AM UTC 24 Oct 09 06:05:36 AM UTC 24 194583042 ps
T460 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_por_stretcher.2753900897 Oct 09 06:05:31 AM UTC 24 Oct 09 06:05:36 AM UTC 24 99783747 ps
T461 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_leaf_rst_cnsty.3542770192 Oct 09 06:05:25 AM UTC 24 Oct 09 06:05:36 AM UTC 24 1972804882 ps
T462 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_sw_rst_reset_race.3174683568 Oct 09 06:05:27 AM UTC 24 Oct 09 06:05:36 AM UTC 24 237167123 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_smoke.514977998 Oct 09 06:05:31 AM UTC 24 Oct 09 06:05:36 AM UTC 24 183235127 ps
T464 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_sw_rst_reset_race.3951062205 Oct 09 06:05:21 AM UTC 24 Oct 09 06:05:36 AM UTC 24 138915212 ps
T465 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_sw_rst_reset_race.2880188097 Oct 09 06:05:31 AM UTC 24 Oct 09 06:05:36 AM UTC 24 201443286 ps
T466 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_leaf_rst_cnsty.3469262627 Oct 09 06:05:28 AM UTC 24 Oct 09 06:05:37 AM UTC 24 1947673657 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_sec_cm_scan_intersig_mubi.1574693951 Oct 09 06:05:32 AM UTC 24 Oct 09 06:05:37 AM UTC 24 145939392 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_reset.2923666953 Oct 09 06:05:31 AM UTC 24 Oct 09 06:05:38 AM UTC 24 735946797 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_reset.220480800 Oct 09 06:05:27 AM UTC 24 Oct 09 06:05:39 AM UTC 24 987446640 ps
T470 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_alert_test.2685576586 Oct 09 06:05:38 AM UTC 24 Oct 09 06:05:40 AM UTC 24 75330224 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_leaf_rst_shadow_attack.2675192232 Oct 09 06:05:38 AM UTC 24 Oct 09 06:05:41 AM UTC 24 302284008 ps
T472 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_sec_cm_scan_intersig_mubi.524988475 Oct 09 06:05:38 AM UTC 24 Oct 09 06:05:41 AM UTC 24 111034082 ps
T473 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_smoke.3640987343 Oct 09 06:05:39 AM UTC 24 Oct 09 06:05:41 AM UTC 24 197650969 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_leaf_rst_cnsty.732873822 Oct 09 06:05:32 AM UTC 24 Oct 09 06:05:41 AM UTC 24 1281783670 ps
T475 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_sw_rst.170489380 Oct 09 06:05:32 AM UTC 24 Oct 09 06:05:41 AM UTC 24 310481635 ps
T476 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_sw_rst.3058582703 Oct 09 06:05:38 AM UTC 24 Oct 09 06:05:42 AM UTC 24 322293256 ps
T477 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/41.rstmgr_stress_all.776281140 Oct 09 06:05:03 AM UTC 24 Oct 09 06:05:42 AM UTC 24 5446789360 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/39.rstmgr_alert_test.2702657236 Oct 09 06:05:00 AM UTC 24 Oct 09 06:05:45 AM UTC 24 64206410 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_stress_all.3817206834 Oct 09 06:05:26 AM UTC 24 Oct 09 06:05:45 AM UTC 24 3155722512 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_por_stretcher.1278533283 Oct 09 06:05:36 AM UTC 24 Oct 09 06:05:45 AM UTC 24 211493683 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_leaf_rst_shadow_attack.70291769 Oct 09 06:05:42 AM UTC 24 Oct 09 06:05:45 AM UTC 24 303610535 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_leaf_rst_cnsty.3892919826 Oct 09 06:05:38 AM UTC 24 Oct 09 06:05:47 AM UTC 24 1968995096 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_reset.2406792687 Oct 09 06:05:36 AM UTC 24 Oct 09 06:05:49 AM UTC 24 1072293888 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_leaf_rst_cnsty.61567088 Oct 09 06:05:42 AM UTC 24 Oct 09 06:05:49 AM UTC 24 1269380942 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_alert_test.2483266936 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:50 AM UTC 24 73619018 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_por_stretcher.561118913 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:50 AM UTC 24 178492823 ps
T487 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_smoke.2006897972 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:50 AM UTC 24 116070006 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_sec_cm_scan_intersig_mubi.2128086610 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:50 AM UTC 24 99607334 ps
T489 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_sw_rst_reset_race.2559614058 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:50 AM UTC 24 148022719 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_sw_rst.2131185433 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:51 AM UTC 24 143693875 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_por_stretcher.6135220 Oct 09 06:05:20 AM UTC 24 Oct 09 06:05:55 AM UTC 24 172784288 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_reset.3362366491 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:55 AM UTC 24 1516211502 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/46.rstmgr_alert_test.464147599 Oct 09 06:05:36 AM UTC 24 Oct 09 06:05:55 AM UTC 24 60121378 ps
T494 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_alert_test.1459186240 Oct 09 06:05:42 AM UTC 24 Oct 09 06:05:55 AM UTC 24 82313215 ps
T495 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_sw_rst_reset_race.982832819 Oct 09 06:05:36 AM UTC 24 Oct 09 06:05:56 AM UTC 24 179786403 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_smoke.4189091714 Oct 09 06:05:36 AM UTC 24 Oct 09 06:05:56 AM UTC 24 258652211 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_sw_rst_reset_race.3614806495 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:56 AM UTC 24 263321032 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_sw_rst.3952214638 Oct 09 06:05:41 AM UTC 24 Oct 09 06:05:57 AM UTC 24 254734253 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/44.rstmgr_reset.1967443960 Oct 09 06:05:20 AM UTC 24 Oct 09 06:05:59 AM UTC 24 1299214575 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/47.rstmgr_stress_all.3125345404 Oct 09 06:05:38 AM UTC 24 Oct 09 06:06:00 AM UTC 24 5980832748 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_leaf_rst_shadow_attack.1500469283 Oct 09 06:05:41 AM UTC 24 Oct 09 06:06:00 AM UTC 24 301577474 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/43.rstmgr_smoke.3310211651 Oct 09 06:05:09 AM UTC 24 Oct 09 06:06:02 AM UTC 24 126318029 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_leaf_rst_cnsty.299477890 Oct 09 06:05:41 AM UTC 24 Oct 09 06:06:03 AM UTC 24 2256805936 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_por_stretcher.3384249560 Oct 09 06:05:40 AM UTC 24 Oct 09 06:06:05 AM UTC 24 124989879 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_alert_test.2647773743 Oct 09 06:05:30 AM UTC 24 Oct 09 06:06:05 AM UTC 24 64828932 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_leaf_rst_shadow_attack.1925665506 Oct 09 06:05:30 AM UTC 24 Oct 09 06:06:05 AM UTC 24 301610527 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/39.rstmgr_leaf_rst_shadow_attack.950244895 Oct 09 06:05:00 AM UTC 24 Oct 09 06:06:06 AM UTC 24 301905374 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/49.rstmgr_stress_all.1230960639 Oct 09 06:05:42 AM UTC 24 Oct 09 06:06:08 AM UTC 24 6095114801 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/39.rstmgr_stress_all.2533883524 Oct 09 06:05:00 AM UTC 24 Oct 09 06:06:08 AM UTC 24 4929945278 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/45.rstmgr_stress_all.1613627923 Oct 09 06:05:30 AM UTC 24 Oct 09 06:06:10 AM UTC 24 1638376013 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/43.rstmgr_por_stretcher.2413154789 Oct 09 06:05:10 AM UTC 24 Oct 09 06:06:12 AM UTC 24 201776488 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/48.rstmgr_stress_all.1257574877 Oct 09 06:05:41 AM UTC 24 Oct 09 06:06:18 AM UTC 24 9605154621 ps
T61 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_rw.706583748 Oct 09 06:05:46 AM UTC 24 Oct 09 06:05:51 AM UTC 24 72940416 ps
T62 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_intg_err.470355979 Oct 09 06:05:48 AM UTC 24 Oct 09 06:05:53 AM UTC 24 843406362 ps
T63 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_errors.4213370472 Oct 09 06:05:48 AM UTC 24 Oct 09 06:05:54 AM UTC 24 672494174 ps
T64 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_bit_bash.3624685872 Oct 09 06:05:46 AM UTC 24 Oct 09 06:05:54 AM UTC 24 1168490134 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_hw_reset.1156618755 Oct 09 06:05:44 AM UTC 24 Oct 09 06:05:55 AM UTC 24 96566895 ps
T101 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_rw.1960890973 Oct 09 06:05:53 AM UTC 24 Oct 09 06:05:55 AM UTC 24 76747330 ps
T66 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_mem_rw_with_rand_reset.2418957449 Oct 09 06:05:47 AM UTC 24 Oct 09 06:05:56 AM UTC 24 212616315 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_aliasing.1335340937 Oct 09 06:05:47 AM UTC 24 Oct 09 06:05:57 AM UTC 24 154740350 ps
T70 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_errors.170478271 Oct 09 06:05:42 AM UTC 24 Oct 09 06:05:57 AM UTC 24 348123516 ps
T71 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_intg_err.4009928320 Oct 09 06:05:44 AM UTC 24 Oct 09 06:05:58 AM UTC 24 913920811 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_same_csr_outstanding.1773589282 Oct 09 06:05:55 AM UTC 24 Oct 09 06:06:00 AM UTC 24 111939017 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_bit_bash.283588277 Oct 09 06:05:54 AM UTC 24 Oct 09 06:06:00 AM UTC 24 492496566 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_mem_rw_with_rand_reset.2997732163 Oct 09 06:06:10 AM UTC 24 Oct 09 06:06:12 AM UTC 24 167156827 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_rw.4270476530 Oct 09 06:05:57 AM UTC 24 Oct 09 06:06:00 AM UTC 24 80658443 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_tl_intg_err.684313293 Oct 09 06:06:02 AM UTC 24 Oct 09 06:06:13 AM UTC 24 1188742278 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_mem_rw_with_rand_reset.4176687807 Oct 09 06:05:57 AM UTC 24 Oct 09 06:06:00 AM UTC 24 104237553 ps
T117 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_same_csr_outstanding.785799963 Oct 09 06:05:57 AM UTC 24 Oct 09 06:06:00 AM UTC 24 87202254 ps
T118 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_same_csr_outstanding.731446766 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:00 AM UTC 24 133824917 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_mem_rw_with_rand_reset.2071963782 Oct 09 06:05:57 AM UTC 24 Oct 09 06:06:00 AM UTC 24 147191586 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_same_csr_outstanding.1370322815 Oct 09 06:05:57 AM UTC 24 Oct 09 06:06:00 AM UTC 24 159167006 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_hw_reset.2551380906 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:00 AM UTC 24 94450677 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_hw_reset.202878059 Oct 09 06:05:52 AM UTC 24 Oct 09 06:06:01 AM UTC 24 83199514 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_rw.2901936710 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:01 AM UTC 24 64246152 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_mem_rw_with_rand_reset.2827712495 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:01 AM UTC 24 101824286 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_same_csr_outstanding.2139944513 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:01 AM UTC 24 145194433 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_mem_rw_with_rand_reset.2984371133 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:01 AM UTC 24 164958092 ps
T95 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_errors.1121683862 Oct 09 06:05:51 AM UTC 24 Oct 09 06:06:01 AM UTC 24 237874464 ps
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