Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.46 99.40 99.31 100.00 99.83 99.46 98.77


Total tests in report: 584
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
83.16 83.16 95.13 95.13 79.04 79.04 89.78 89.78 94.27 94.27 90.71 90.71 50.00 50.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.682474159
89.09 5.93 97.24 2.10 84.46 5.41 91.03 1.26 97.81 3.54 92.33 1.62 71.67 21.67 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst.1932800308
92.02 2.93 97.36 0.12 93.62 9.16 91.91 0.88 97.81 0.00 92.60 0.27 78.82 7.14 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_reset.335634765
94.31 2.29 98.26 0.90 96.04 2.43 92.33 0.42 98.99 1.18 93.27 0.67 86.95 8.13 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_intg_err.470355979
95.84 1.53 98.68 0.42 96.53 0.49 95.18 2.85 99.33 0.34 96.90 3.63 88.42 1.48 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.307553777
97.08 1.24 99.10 0.42 96.88 0.35 98.74 3.56 99.66 0.34 97.71 0.81 90.39 1.97 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.2371912370
97.82 0.74 99.10 0.00 98.27 1.39 98.91 0.17 99.83 0.17 97.71 0.00 93.10 2.71 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_errors.4213370472
98.23 0.41 99.10 0.00 98.27 0.00 98.91 0.00 99.83 0.00 97.71 0.00 95.57 2.46 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.2741547785
98.48 0.25 99.10 0.00 98.27 0.00 99.41 0.50 99.83 0.00 97.71 0.00 96.55 0.99 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_cnsty.3641951
98.67 0.19 99.10 0.00 98.33 0.07 99.41 0.00 99.83 0.00 98.52 0.81 96.80 0.25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_stress_all.326153895
98.83 0.16 99.10 0.00 98.33 0.00 99.41 0.00 99.83 0.00 98.52 0.00 97.78 0.99 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.2480390612
98.97 0.14 99.40 0.30 98.68 0.35 99.58 0.17 99.83 0.00 98.52 0.00 97.78 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_alert_test.4133223582
99.06 0.09 99.40 0.00 98.68 0.00 99.58 0.00 99.83 0.00 99.06 0.54 97.78 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_reset.3653374895
99.13 0.08 99.40 0.00 98.68 0.00 99.92 0.34 99.83 0.00 99.19 0.13 97.78 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_cnsty.3950325626
99.21 0.08 99.40 0.00 98.89 0.21 99.92 0.00 99.83 0.00 99.19 0.00 98.03 0.25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_intg_err.2682793730
99.27 0.06 99.40 0.00 98.89 0.00 99.92 0.00 99.83 0.00 99.33 0.13 98.28 0.25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_por_stretcher.1192992588
99.31 0.04 99.40 0.00 98.89 0.00 99.92 0.00 99.83 0.00 99.33 0.00 98.52 0.25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_intg_err.1822410026
99.36 0.04 99.40 0.00 98.89 0.00 99.92 0.00 99.83 0.00 99.33 0.00 98.77 0.25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.1200154984
99.39 0.03 99.40 0.00 99.10 0.21 99.92 0.00 99.83 0.00 99.33 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_errors.170478271
99.41 0.02 99.40 0.00 99.24 0.14 99.92 0.00 99.83 0.00 99.33 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_intg_err.2190133344
99.44 0.02 99.40 0.00 99.24 0.00 99.92 0.00 99.83 0.00 99.46 0.13 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_rw.2258172992
99.45 0.01 99.40 0.00 99.24 0.00 100.00 0.08 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_cnsty.4243328785
99.46 0.01 99.40 0.00 99.31 0.07 100.00 0.00 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_intg_err.2270584439

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_aliasing.1335340937
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_bit_bash.3624685872
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_hw_reset.1156618755
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_mem_rw_with_rand_reset.2418957449
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_rw.706583748
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_intg_err.4009928320
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_aliasing.3669461174
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_bit_bash.336936358
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_hw_reset.2738080948
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_mem_rw_with_rand_reset.2984371133
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_same_csr_outstanding.731446766
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_mem_rw_with_rand_reset.1260635320
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_rw.3032594555
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_same_csr_outstanding.2158658086
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_errors.3456047929
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_intg_err.2191694342
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_mem_rw_with_rand_reset.3113859937
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_rw.2580544648
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_same_csr_outstanding.1723313982
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_errors.3747339853
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_intg_err.1965208206
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_mem_rw_with_rand_reset.1427548541
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_rw.2698743682
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_same_csr_outstanding.2186048639
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_tl_errors.678781014
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_mem_rw_with_rand_reset.2033403449
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_rw.2553709646
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_same_csr_outstanding.1533635319
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_errors.3529188204
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_mem_rw_with_rand_reset.2424081672
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_rw.3001606166
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_same_csr_outstanding.971025570
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_errors.1854164385
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_intg_err.2119230960
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_mem_rw_with_rand_reset.4242430782
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_rw.837875805
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_same_csr_outstanding.3611452694
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_errors.673108457
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_intg_err.3857759091
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_mem_rw_with_rand_reset.2997732163
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_rw.2724874090
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_same_csr_outstanding.280745274
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_errors.3641973637
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_intg_err.70784713
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_mem_rw_with_rand_reset.2365992541
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_rw.462085479
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_same_csr_outstanding.1339592222
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_errors.1865186581
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_intg_err.1023986711
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_mem_rw_with_rand_reset.2732649505
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_rw.3568578211
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_same_csr_outstanding.4108939866
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_errors.291787024
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_intg_err.1215292101
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_mem_rw_with_rand_reset.1933669781
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_rw.3023953915
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_same_csr_outstanding.2294609611
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_errors.690943058
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_intg_err.587252108
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_aliasing.457368475
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_bit_bash.3391208643
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_hw_reset.2551380906
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_mem_rw_with_rand_reset.2827712495
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_rw.2901936710
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_same_csr_outstanding.2139944513
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_errors.1121683862
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_aliasing.2101451529
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_bit_bash.283588277
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_hw_reset.202878059
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_mem_rw_with_rand_reset.2805561176
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_rw.1960890973
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_same_csr_outstanding.1773589282
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_errors.513520966
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_intg_err.2467440746
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_aliasing.2243438632
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_bit_bash.1061685806
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_hw_reset.333765813
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_mem_rw_with_rand_reset.4176687807
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_rw.3449047306
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_same_csr_outstanding.1370322815
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_errors.771141427
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_mem_rw_with_rand_reset.2071963782
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_rw.4270476530
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_same_csr_outstanding.785799963
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_errors.2132808457
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_intg_err.3618837286
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_mem_rw_with_rand_reset.3728883163
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_rw.2379344478
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_same_csr_outstanding.1135486020
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_errors.2551253856
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_mem_rw_with_rand_reset.3339871691
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_rw.1873814266
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_same_csr_outstanding.1394913594
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_csr_mem_rw_with_rand_reset.607100961
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_csr_rw.2530090190
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_same_csr_outstanding.3031110508
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_tl_errors.3842095385
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/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.208259481
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.3253926957
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.3178963521
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.4208997591
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.469845273
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.3609582283
/workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.4178650874



Total test records in report: 584
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_por_stretcher.1192992588 Oct 09 06:03:49 AM UTC 24 Oct 09 06:03:51 AM UTC 24 114749756 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_smoke.965890684 Oct 09 06:03:49 AM UTC 24 Oct 09 06:03:52 AM UTC 24 239622011 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst_reset_race.2240826745 Oct 09 06:03:50 AM UTC 24 Oct 09 06:03:53 AM UTC 24 121701735 ps
T4 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.2480390612 Oct 09 06:03:50 AM UTC 24 Oct 09 06:03:53 AM UTC 24 136357096 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_shadow_attack.2234631742 Oct 09 06:03:51 AM UTC 24 Oct 09 06:03:54 AM UTC 24 302708565 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst.1945927585 Oct 09 06:03:50 AM UTC 24 Oct 09 06:03:54 AM UTC 24 428197325 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_reset.3136715391 Oct 09 06:03:49 AM UTC 24 Oct 09 06:03:55 AM UTC 24 1143379031 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_alert_test.4133223582 Oct 09 06:03:53 AM UTC 24 Oct 09 06:03:55 AM UTC 24 62022612 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_por_stretcher.2601536742 Oct 09 06:03:53 AM UTC 24 Oct 09 06:03:56 AM UTC 24 154694851 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.682474159 Oct 09 06:03:53 AM UTC 24 Oct 09 06:03:56 AM UTC 24 234331593 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm_scan_intersig_mubi.2066722376 Oct 09 06:03:54 AM UTC 24 Oct 09 06:03:57 AM UTC 24 181690345 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst_reset_race.3822558645 Oct 09 06:03:54 AM UTC 24 Oct 09 06:03:57 AM UTC 24 231905644 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_por_stretcher.3886478052 Oct 09 06:03:56 AM UTC 24 Oct 09 06:03:58 AM UTC 24 82401716 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_shadow_attack.815370116 Oct 09 06:03:54 AM UTC 24 Oct 09 06:03:58 AM UTC 24 306918000 ps
T47 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_alert_test.410200846 Oct 09 06:03:56 AM UTC 24 Oct 09 06:03:58 AM UTC 24 66914181 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_smoke.3612941374 Oct 09 06:03:56 AM UTC 24 Oct 09 06:03:58 AM UTC 24 119606067 ps
T60 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst.1932800308 Oct 09 06:03:54 AM UTC 24 Oct 09 06:03:59 AM UTC 24 397866348 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst_reset_race.410449555 Oct 09 06:03:57 AM UTC 24 Oct 09 06:03:59 AM UTC 24 103328327 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_stress_all.609821409 Oct 09 06:03:52 AM UTC 24 Oct 09 06:03:59 AM UTC 24 1606502364 ps
T79 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm_scan_intersig_mubi.1814267403 Oct 09 06:03:57 AM UTC 24 Oct 09 06:03:59 AM UTC 24 146499906 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_shadow_attack.3307007407 Oct 09 06:03:57 AM UTC 24 Oct 09 06:04:00 AM UTC 24 301449297 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.2371912370 Oct 09 06:03:51 AM UTC 24 Oct 09 06:04:00 AM UTC 24 1979594089 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_alert_test.4291349554 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:00 AM UTC 24 60907666 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst.513277759 Oct 09 06:03:57 AM UTC 24 Oct 09 06:04:00 AM UTC 24 396750677 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_por_stretcher.3873024901 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:01 AM UTC 24 167400344 ps
T37 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst_reset_race.3572837273 Oct 09 06:03:59 AM UTC 24 Oct 09 06:04:01 AM UTC 24 113030516 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_reset.335634765 Oct 09 06:03:54 AM UTC 24 Oct 09 06:04:01 AM UTC 24 1384135025 ps
T39 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_smoke.602749952 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:01 AM UTC 24 230874827 ps
T40 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst.1750575685 Oct 09 06:03:59 AM UTC 24 Oct 09 06:04:02 AM UTC 24 336402293 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_por_stretcher.1788249997 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:02 AM UTC 24 181371905 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_alert_test.681139703 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:02 AM UTC 24 71744032 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm_scan_intersig_mubi.630589315 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:02 AM UTC 24 143452231 ps
T80 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_smoke.113406480 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:02 AM UTC 24 120746701 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_shadow_attack.2875778046 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:03 AM UTC 24 302204543 ps
T149 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst_reset_race.634854902 Oct 09 06:04:01 AM UTC 24 Oct 09 06:04:03 AM UTC 24 63980672 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_cnsty.3641951 Oct 09 06:03:57 AM UTC 24 Oct 09 06:04:03 AM UTC 24 1281417239 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_shadow_attack.2096599640 Oct 09 06:04:02 AM UTC 24 Oct 09 06:04:04 AM UTC 24 302160278 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm_scan_intersig_mubi.3068817637 Oct 09 06:04:01 AM UTC 24 Oct 09 06:04:04 AM UTC 24 176526861 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_reset.2166242675 Oct 09 06:03:57 AM UTC 24 Oct 09 06:04:04 AM UTC 24 1256086439 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_cnsty.4243328785 Oct 09 06:03:54 AM UTC 24 Oct 09 06:04:04 AM UTC 24 1980763024 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_shadow_attack.867216351 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:11 AM UTC 24 301833592 ps
T81 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst.37198878 Oct 09 06:04:01 AM UTC 24 Oct 09 06:04:05 AM UTC 24 139196069 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_alert_test.30084728 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:05 AM UTC 24 62743455 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_por_stretcher.4269692149 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:05 AM UTC 24 73823388 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst_reset_race.1455376344 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:05 AM UTC 24 166949825 ps
T82 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_smoke.3272042143 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:05 AM UTC 24 211242339 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_sec_cm_scan_intersig_mubi.3601728780 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:06 AM UTC 24 170946906 ps
T98 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_reset.132723908 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:06 AM UTC 24 1693584801 ps
T83 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst.1161547721 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:07 AM UTC 24 357292613 ps
T17 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_por_stretcher.1026521262 Oct 09 06:04:05 AM UTC 24 Oct 09 06:04:07 AM UTC 24 184000347 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_alert_test.3281147370 Oct 09 06:04:04 AM UTC 24 Oct 09 06:04:07 AM UTC 24 66155428 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_shadow_attack.1826484723 Oct 09 06:04:04 AM UTC 24 Oct 09 06:04:07 AM UTC 24 300865491 ps
T99 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_reset.3889544932 Oct 09 06:04:01 AM UTC 24 Oct 09 06:04:07 AM UTC 24 780127472 ps
T163 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_smoke.2640265692 Oct 09 06:04:04 AM UTC 24 Oct 09 06:04:07 AM UTC 24 128153737 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst_reset_race.2297691724 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:08 AM UTC 24 72109176 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_stress_all.3287044574 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:08 AM UTC 24 1721674313 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_alert_test.1169968838 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:08 AM UTC 24 54771725 ps
T165 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_shadow_attack.1562207050 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:08 AM UTC 24 308625711 ps
T166 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_sec_cm_scan_intersig_mubi.430733308 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:08 AM UTC 24 98913100 ps
T87 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_smoke.2009564286 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:09 AM UTC 24 197111353 ps
T86 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst.950452547 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:09 AM UTC 24 265485393 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_cnsty.3836803449 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:09 AM UTC 24 2440419955 ps
T52 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_reset.3496102788 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:13 AM UTC 24 904201470 ps
T18 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_por_stretcher.553258031 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:09 AM UTC 24 138996389 ps
T53 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_reset.2210137018 Oct 09 06:04:05 AM UTC 24 Oct 09 06:04:10 AM UTC 24 776707913 ps
T54 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_reset.1846890231 Oct 09 06:04:03 AM UTC 24 Oct 09 06:04:10 AM UTC 24 1575243758 ps
T55 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_alert_test.2090656895 Oct 09 06:04:08 AM UTC 24 Oct 09 06:04:10 AM UTC 24 71701073 ps
T56 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_sec_cm_scan_intersig_mubi.679969522 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:10 AM UTC 24 145244196 ps
T57 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.307553777 Oct 09 06:03:56 AM UTC 24 Oct 09 06:04:10 AM UTC 24 8579316821 ps
T58 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_smoke.3646686729 Oct 09 06:04:08 AM UTC 24 Oct 09 06:04:10 AM UTC 24 203064150 ps
T59 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst_reset_race.2013449108 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:10 AM UTC 24 237775819 ps
T74 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_stress_all.1306213156 Oct 09 06:04:02 AM UTC 24 Oct 09 06:04:11 AM UTC 24 1751968131 ps
T75 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst_reset_race.2891990754 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:11 AM UTC 24 97705686 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_por_stretcher.2008254576 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:11 AM UTC 24 138778799 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_cnsty.2160182541 Oct 09 06:04:01 AM UTC 24 Oct 09 06:04:11 AM UTC 24 2452919863 ps
T76 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_stress_all.326153895 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:11 AM UTC 24 2658138655 ps
T77 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst.207061441 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:12 AM UTC 24 545532012 ps
T78 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_sec_cm_scan_intersig_mubi.1686188869 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:12 AM UTC 24 145791655 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.3253926957 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:13 AM UTC 24 153984445 ps
T88 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst.3545263957 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:12 AM UTC 24 151077705 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_cnsty.3950325626 Oct 09 06:04:04 AM UTC 24 Oct 09 06:04:12 AM UTC 24 1985217762 ps
T167 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_alert_test.3768293013 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:12 AM UTC 24 97492217 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.469845273 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:13 AM UTC 24 196939297 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_shadow_attack.1615334487 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:13 AM UTC 24 301874195 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.2741547785 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:13 AM UTC 24 158569977 ps
T45 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_cnsty.2904757281 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:13 AM UTC 24 1272617671 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.4208997591 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:14 AM UTC 24 101362794 ps
T171 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_por_stretcher.2036304911 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:14 AM UTC 24 99036874 ps
T172 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst_reset_race.2384862936 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:14 AM UTC 24 72827253 ps
T173 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_alert_test.3237616848 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:14 AM UTC 24 69163328 ps
T89 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.4178650874 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:14 AM UTC 24 105612854 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.208259481 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:15 AM UTC 24 302242787 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_smoke.3683412593 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:15 AM UTC 24 250231464 ps
T100 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.3178963521 Oct 09 06:04:10 AM UTC 24 Oct 09 06:04:16 AM UTC 24 960779411 ps
T175 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_por_stretcher.2531587650 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:16 AM UTC 24 209620209 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_alert_test.1031814485 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:16 AM UTC 24 77484167 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst_reset_race.1204667162 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:16 AM UTC 24 99166247 ps
T177 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_sec_cm_scan_intersig_mubi.3034295706 Oct 09 06:04:13 AM UTC 24 Oct 09 06:04:16 AM UTC 24 188622695 ps
T46 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_cnsty.1063575147 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:16 AM UTC 24 1268657807 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_shadow_attack.4156284620 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:16 AM UTC 24 302824164 ps
T179 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_smoke.1842977786 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:16 AM UTC 24 118485057 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/8.rstmgr_reset.1631799147 Oct 09 06:04:09 AM UTC 24 Oct 09 06:04:17 AM UTC 24 1440831380 ps
T180 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst.18505796 Oct 09 06:04:13 AM UTC 24 Oct 09 06:04:17 AM UTC 24 114359057 ps
T181 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst.2677620758 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:17 AM UTC 24 143158048 ps
T182 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_alert_test.3209364199 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:17 AM UTC 24 55021630 ps
T183 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_sec_cm_scan_intersig_mubi.878093896 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:17 AM UTC 24 169238217 ps
T28 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_cnsty.1245919803 Oct 09 06:04:07 AM UTC 24 Oct 09 06:04:18 AM UTC 24 2448047916 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_por_stretcher.3077956076 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:18 AM UTC 24 121572778 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_shadow_attack.4140770771 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:18 AM UTC 24 303901062 ps
T68 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm.2328123189 Oct 09 06:04:00 AM UTC 24 Oct 09 06:04:18 AM UTC 24 9741530380 ps
T186 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_smoke.714363691 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:18 AM UTC 24 117699777 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_reset.3392612998 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:19 AM UTC 24 1106207892 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_alert_test.3722579877 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:19 AM UTC 24 85743375 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_sec_cm_scan_intersig_mubi.605367097 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:19 AM UTC 24 107622616 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_smoke.1576200945 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:19 AM UTC 24 114355842 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_cnsty.3657297881 Oct 09 06:04:12 AM UTC 24 Oct 09 06:04:19 AM UTC 24 1272125555 ps
T190 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst_reset_race.204027308 Oct 09 06:04:16 AM UTC 24 Oct 09 06:04:19 AM UTC 24 170071860 ps
T191 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_shadow_attack.2631136620 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:19 AM UTC 24 302077576 ps
T192 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst.2798725788 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:20 AM UTC 24 331859983 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_por_stretcher.3423363635 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:20 AM UTC 24 184610970 ps
T194 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_sec_cm_scan_intersig_mubi.3808119356 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:20 AM UTC 24 153997846 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/5.rstmgr_stress_all.3525211490 Oct 09 06:04:04 AM UTC 24 Oct 09 06:04:20 AM UTC 24 3397549785 ps
T195 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst_reset_race.3658989233 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:20 AM UTC 24 182825153 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_shadow_attack.270332726 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:21 AM UTC 24 302565707 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst.257893025 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:21 AM UTC 24 351027770 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_alert_test.2023425224 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:21 AM UTC 24 92621636 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_por_stretcher.2300585837 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:21 AM UTC 24 159205582 ps
T51 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_cnsty.2021150261 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:22 AM UTC 24 1272287618 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst_reset_race.1230012464 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:22 AM UTC 24 155405006 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_cnsty.2759602265 Oct 09 06:04:13 AM UTC 24 Oct 09 06:04:22 AM UTC 24 1968128619 ps
T200 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_smoke.1498186062 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:22 AM UTC 24 107697840 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_sec_cm_scan_intersig_mubi.1332655232 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:22 AM UTC 24 151164703 ps
T202 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_shadow_attack.3113885787 Oct 09 06:04:20 AM UTC 24 Oct 09 06:04:22 AM UTC 24 301245490 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm.1971054852 Oct 09 06:03:53 AM UTC 24 Oct 09 06:04:23 AM UTC 24 17738705598 ps
T203 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_alert_test.207125439 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:23 AM UTC 24 55940333 ps
T204 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_sec_cm_scan_intersig_mubi.1326087155 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:23 AM UTC 24 155205344 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_reset.3653374895 Oct 09 06:04:16 AM UTC 24 Oct 09 06:04:23 AM UTC 24 1673335108 ps
T142 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_smoke.3588704948 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:23 AM UTC 24 254236589 ps
T143 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_por_stretcher.3767348464 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:24 AM UTC 24 233203153 ps
T144 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst_reset_race.164848964 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:24 AM UTC 24 128149581 ps
T145 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst.4187858717 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:24 AM UTC 24 559034426 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_reset.528520872 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:24 AM UTC 24 1093330099 ps
T146 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst.2860738089 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:24 AM UTC 24 263400943 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/6.rstmgr_stress_all.2817395413 Oct 09 06:04:06 AM UTC 24 Oct 09 06:04:24 AM UTC 24 5035569083 ps
T147 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.1200154984 Oct 09 06:03:55 AM UTC 24 Oct 09 06:04:24 AM UTC 24 8096212850 ps
T148 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_por_stretcher.4106456185 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:24 AM UTC 24 212166410 ps
T205 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_leaf_rst_shadow_attack.1236816708 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:24 AM UTC 24 302149066 ps
T206 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_alert_test.2929717904 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:24 AM UTC 24 60988201 ps
T207 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_reset.3567695513 Oct 09 06:04:19 AM UTC 24 Oct 09 06:04:25 AM UTC 24 868130922 ps
T208 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst_reset_race.759137635 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:25 AM UTC 24 79952683 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_cnsty.1857325454 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:25 AM UTC 24 1976756343 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_reset.3330298976 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:25 AM UTC 24 1776297038 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_smoke.721126005 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:25 AM UTC 24 200664740 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/11.rstmgr_stress_all.3080805935 Oct 09 06:04:15 AM UTC 24 Oct 09 06:04:25 AM UTC 24 2235471262 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_cnsty.3342073179 Oct 09 06:04:18 AM UTC 24 Oct 09 06:04:25 AM UTC 24 1269502246 ps
T212 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/10.rstmgr_stress_all.678308468 Oct 09 06:04:14 AM UTC 24 Oct 09 06:04:25 AM UTC 24 2063626768 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_alert_test.3126834962 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:26 AM UTC 24 57111135 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_shadow_attack.4266320652 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:26 AM UTC 24 302583517 ps
T215 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_sec_cm_scan_intersig_mubi.2255386131 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:26 AM UTC 24 161452329 ps
T216 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst.63313146 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:26 AM UTC 24 139275415 ps
T217 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_alert_test.4129407848 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 67286111 ps
T218 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_reset.3328190429 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:27 AM UTC 24 959910661 ps
T219 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_por_stretcher.2705178215 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:27 AM UTC 24 198031322 ps
T220 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_smoke.3330439600 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:27 AM UTC 24 123397436 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_por_stretcher.3203684373 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:27 AM UTC 24 112787662 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_sw_rst.3244537937 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 254901388 ps
T223 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_sw_rst_reset_race.640836418 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 177237727 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_sec_cm_scan_intersig_mubi.2399648713 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 173108912 ps
T225 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_sw_rst_reset_race.2007518825 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 142825030 ps
T226 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_leaf_rst_shadow_attack.3643306699 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 301872721 ps
T227 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_reset.1954757553 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:28 AM UTC 24 761910901 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_smoke.1305432795 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:28 AM UTC 24 244199725 ps
T48 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_leaf_rst_cnsty.2154638111 Oct 09 06:04:21 AM UTC 24 Oct 09 06:04:28 AM UTC 24 1273208141 ps
T72 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm.138020366 Oct 09 06:03:58 AM UTC 24 Oct 09 06:04:29 AM UTC 24 16552629376 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_alert_test.2272302689 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:29 AM UTC 24 83405298 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_sw_rst.1712985823 Oct 09 06:04:26 AM UTC 24 Oct 09 06:04:29 AM UTC 24 462818683 ps
T231 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_cnsty.323911836 Oct 09 06:04:20 AM UTC 24 Oct 09 06:04:29 AM UTC 24 2462389018 ps
T232 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_por_stretcher.3911403167 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:29 AM UTC 24 231622092 ps
T233 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_shadow_attack.2508713547 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:29 AM UTC 24 302785650 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_sec_cm_scan_intersig_mubi.1532217672 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:29 AM UTC 24 145330584 ps
T235 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst_reset_race.1575893115 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:29 AM UTC 24 120414747 ps
T236 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_smoke.1177635083 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:30 AM UTC 24 259272883 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_cnsty.3174921116 Oct 09 06:04:24 AM UTC 24 Oct 09 06:04:30 AM UTC 24 1277454246 ps
T237 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_alert_test.4264218093 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:30 AM UTC 24 61328957 ps
T238 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_sec_cm_scan_intersig_mubi.4144033215 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:30 AM UTC 24 156324307 ps
T239 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_por_stretcher.3619606907 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:31 AM UTC 24 187154165 ps
T240 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_shadow_attack.1164496732 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:31 AM UTC 24 301870258 ps
T241 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_smoke.463627985 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:31 AM UTC 24 110112546 ps
T242 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst_reset_race.325626802 Oct 09 06:04:29 AM UTC 24 Oct 09 06:04:31 AM UTC 24 139289329 ps
T243 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst.2900146257 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:32 AM UTC 24 369957927 ps
T73 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm.3594359560 Oct 09 06:04:02 AM UTC 24 Oct 09 06:04:32 AM UTC 24 17676138253 ps
T244 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_sw_rst.3875656132 Oct 09 06:04:37 AM UTC 24 Oct 09 06:04:41 AM UTC 24 460112386 ps
T245 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_alert_test.3433279659 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:32 AM UTC 24 67699805 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_stress_all.2634097430 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:32 AM UTC 24 121115776 ps
T247 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_reset.1694308512 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:33 AM UTC 24 1484633122 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_por_stretcher.510479997 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 167950532 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_sec_cm_scan_intersig_mubi.3577250217 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 104079512 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_sec_cm_scan_intersig_mubi.871815102 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 109441709 ps
T251 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_shadow_attack.2968679699 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 302084490 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst_reset_race.122816108 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 170272317 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_smoke.2667074383 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 186030919 ps
T136 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_reset.4074863128 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:33 AM UTC 24 1754088671 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/17.rstmgr_leaf_rst_cnsty.2153866553 Oct 09 06:04:25 AM UTC 24 Oct 09 06:04:33 AM UTC 24 1981007119 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst.252596171 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:33 AM UTC 24 117866132 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst.3954989630 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:34 AM UTC 24 150498271 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_por_stretcher.3986313334 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:34 AM UTC 24 113483093 ps
T257 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_shadow_attack.3790996232 Oct 09 06:04:31 AM UTC 24 Oct 09 06:04:34 AM UTC 24 301703084 ps
T258 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_alert_test.2568505049 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:34 AM UTC 24 85908713 ps
T259 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_smoke.4130018360 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:34 AM UTC 24 201943318 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst_reset_race.1617239377 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:34 AM UTC 24 190485483 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_sec_cm_scan_intersig_mubi.3565063393 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:35 AM UTC 24 153705172 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/15.rstmgr_stress_all.1559772664 Oct 09 06:04:22 AM UTC 24 Oct 09 06:04:35 AM UTC 24 2760058485 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst.2433971651 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:35 AM UTC 24 149498417 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_reset.1111898957 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:35 AM UTC 24 1740213868 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_cnsty.1248808571 Oct 09 06:04:27 AM UTC 24 Oct 09 06:04:35 AM UTC 24 1971501913 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_por_stretcher.3987387527 Oct 09 06:04:33 AM UTC 24 Oct 09 06:04:35 AM UTC 24 72689858 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_alert_test.1533722283 Oct 09 06:04:33 AM UTC 24 Oct 09 06:04:35 AM UTC 24 73781986 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_shadow_attack.2701256519 Oct 09 06:04:33 AM UTC 24 Oct 09 06:04:35 AM UTC 24 307655315 ps
T137 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_reset.2444631701 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:36 AM UTC 24 1667759234 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_reset.3456081089 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:36 AM UTC 24 815461550 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_smoke.4128808306 Oct 09 06:04:33 AM UTC 24 Oct 09 06:04:36 AM UTC 24 194107544 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_sec_cm_scan_intersig_mubi.124958818 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:37 AM UTC 24 139116218 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst_reset_race.2697975372 Oct 09 06:04:34 AM UTC 24 Oct 09 06:04:37 AM UTC 24 119109409 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/22.rstmgr_reset.3486719160 Oct 09 06:04:32 AM UTC 24 Oct 09 06:04:37 AM UTC 24 706545955 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_alert_test.2812254340 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:37 AM UTC 24 80943816 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_sw_rst.1517516491 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:41 AM UTC 24 144651051 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_cnsty.2218721484 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:37 AM UTC 24 1263999186 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_smoke.1394930201 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:37 AM UTC 24 122907305 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_leaf_rst_shadow_attack.2063455590 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:37 AM UTC 24 301994739 ps
T275 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_por_stretcher.3306169401 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:38 AM UTC 24 206118087 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_cnsty.2486907152 Oct 09 06:04:28 AM UTC 24 Oct 09 06:04:38 AM UTC 24 2244891133 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst.266407814 Oct 09 06:04:34 AM UTC 24 Oct 09 06:04:38 AM UTC 24 265028438 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_cnsty.1368380083 Oct 09 06:04:30 AM UTC 24 Oct 09 06:04:38 AM UTC 24 1962553258 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst_reset_race.1597586131 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:38 AM UTC 24 164781985 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_por_stretcher.2620138504 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:39 AM UTC 24 86776533 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_sec_cm_scan_intersig_mubi.858108533 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:39 AM UTC 24 93820748 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_alert_test.3161552503 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:39 AM UTC 24 76147235 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/12.rstmgr_stress_all.3793009585 Oct 09 06:04:17 AM UTC 24 Oct 09 06:04:39 AM UTC 24 5112702815 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_leaf_rst_shadow_attack.3095735581 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:39 AM UTC 24 302369284 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_sec_cm_scan_intersig_mubi.2703064807 Oct 09 06:04:37 AM UTC 24 Oct 09 06:04:39 AM UTC 24 102688369 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_smoke.3054438494 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:40 AM UTC 24 196941795 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst.1321386225 Oct 09 06:04:36 AM UTC 24 Oct 09 06:04:40 AM UTC 24 128071681 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_sw_rst_reset_race.1160521003 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:40 AM UTC 24 64777974 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_sw_rst_reset_race.3313638858 Oct 09 06:04:37 AM UTC 24 Oct 09 06:04:40 AM UTC 24 201125670 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_alert_test.3965106064 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:40 AM UTC 24 62905864 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_por_stretcher.2752270741 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:41 AM UTC 24 186490395 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_smoke.4069545374 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:41 AM UTC 24 193981370 ps
T292 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/25.rstmgr_leaf_rst_shadow_attack.3522681304 Oct 09 06:04:38 AM UTC 24 Oct 09 06:04:41 AM UTC 24 302358055 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/26.rstmgr_alert_test.4201583419 Oct 09 06:04:39 AM UTC 24 Oct 09 06:04:41 AM UTC 24 69449540 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_08/rstmgr-sim-vcs/coverage/default/24.rstmgr_reset.1179681297 Oct 09 06:04:35 AM UTC 24 Oct 09 06:04:42 AM UTC 24 934084155 ps
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