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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.76 99.07 96.67 100.00 100.00 98.83 98.33 91.42


Total test records in report: 919
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T616 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.402544421 Aug 28 09:05:15 PM UTC 24 Aug 28 09:05:20 PM UTC 24 5649484165 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.859593368 Aug 28 09:13:50 PM UTC 24 Aug 28 09:16:29 PM UTC 24 363672730856 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.1960899393 Aug 28 09:01:48 PM UTC 24 Aug 28 09:05:22 PM UTC 24 321672887417 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.3850655052 Aug 28 09:00:21 PM UTC 24 Aug 28 09:05:27 PM UTC 24 329390379050 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.2587611100 Aug 28 09:04:14 PM UTC 24 Aug 28 09:05:35 PM UTC 24 25639386230 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.3457360682 Aug 28 09:05:29 PM UTC 24 Aug 28 09:05:41 PM UTC 24 3977882492 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.346176863 Aug 28 09:05:42 PM UTC 24 Aug 28 09:05:44 PM UTC 24 494986497 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.222077059 Aug 28 09:02:48 PM UTC 24 Aug 28 09:05:44 PM UTC 24 383718924181 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.3604991901 Aug 28 09:04:27 PM UTC 24 Aug 28 09:06:02 PM UTC 24 175134840572 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.2636616298 Aug 28 09:05:45 PM UTC 24 Aug 28 09:06:10 PM UTC 24 5618181554 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.2193939361 Aug 28 08:54:40 PM UTC 24 Aug 28 09:06:16 PM UTC 24 485277952680 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.2375613144 Aug 28 09:02:41 PM UTC 24 Aug 28 09:06:32 PM UTC 24 161378775841 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.3166296748 Aug 28 08:43:37 PM UTC 24 Aug 28 09:06:46 PM UTC 24 520591719535 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.1964242751 Aug 28 08:49:34 PM UTC 24 Aug 28 09:06:59 PM UTC 24 334391801393 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.2196932737 Aug 28 09:06:03 PM UTC 24 Aug 28 09:07:03 PM UTC 24 164804722127 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.2764391558 Aug 28 09:05:20 PM UTC 24 Aug 28 09:07:12 PM UTC 24 30347518258 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.3920992315 Aug 28 08:58:02 PM UTC 24 Aug 28 09:07:19 PM UTC 24 102397086715 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.3613977277 Aug 28 09:07:13 PM UTC 24 Aug 28 09:07:27 PM UTC 24 2785832356 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.2769429961 Aug 28 08:48:52 PM UTC 24 Aug 28 09:07:29 PM UTC 24 351635656536 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.1220488755 Aug 28 09:03:50 PM UTC 24 Aug 28 09:07:34 PM UTC 24 613443047869 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.195338522 Aug 28 09:07:21 PM UTC 24 Aug 28 09:07:38 PM UTC 24 30497133862 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.891209971 Aug 28 09:07:39 PM UTC 24 Aug 28 09:07:42 PM UTC 24 361632514 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.1792319222 Aug 28 09:02:05 PM UTC 24 Aug 28 09:07:46 PM UTC 24 398311455768 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.1520050445 Aug 28 09:07:43 PM UTC 24 Aug 28 09:07:48 PM UTC 24 6057161716 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.3898303257 Aug 28 08:40:03 PM UTC 24 Aug 28 09:07:53 PM UTC 24 486185202270 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.704111041 Aug 28 09:07:30 PM UTC 24 Aug 28 09:07:57 PM UTC 24 7842940907 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.4172322339 Aug 28 09:02:45 PM UTC 24 Aug 28 09:08:13 PM UTC 24 322915488127 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.67291340 Aug 28 08:38:58 PM UTC 24 Aug 28 09:08:23 PM UTC 24 603617357034 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.826772388 Aug 28 08:52:16 PM UTC 24 Aug 28 09:08:24 PM UTC 24 336722655493 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.2758939706 Aug 28 09:05:09 PM UTC 24 Aug 28 09:08:42 PM UTC 24 363834627633 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.3245478636 Aug 28 09:04:55 PM UTC 24 Aug 28 09:08:43 PM UTC 24 322353678712 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.135901491 Aug 28 08:50:31 PM UTC 24 Aug 28 09:08:58 PM UTC 24 326654773753 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.1850957626 Aug 28 09:08:44 PM UTC 24 Aug 28 09:09:01 PM UTC 24 3810696706 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.795672289 Aug 28 09:06:16 PM UTC 24 Aug 28 09:09:18 PM UTC 24 161610013694 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.723367664 Aug 28 08:50:36 PM UTC 24 Aug 28 09:09:27 PM UTC 24 486535850875 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.464830382 Aug 28 08:50:17 PM UTC 24 Aug 28 09:09:34 PM UTC 24 353102410641 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.3061244449 Aug 28 09:08:59 PM UTC 24 Aug 28 09:09:36 PM UTC 24 38384854119 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.3140990333 Aug 28 09:09:35 PM UTC 24 Aug 28 09:09:38 PM UTC 24 454094774 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.2706067044 Aug 28 09:01:09 PM UTC 24 Aug 28 09:09:41 PM UTC 24 506953777431 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.2746711186 Aug 28 09:09:37 PM UTC 24 Aug 28 09:09:42 PM UTC 24 5904457193 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.3536061126 Aug 28 09:02:47 PM UTC 24 Aug 28 09:09:43 PM UTC 24 166147689616 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.2052119303 Aug 28 08:53:43 PM UTC 24 Aug 28 09:09:48 PM UTC 24 330652177766 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.827940420 Aug 28 08:55:59 PM UTC 24 Aug 28 09:09:53 PM UTC 24 105447385092 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.1043263459 Aug 28 09:01:52 PM UTC 24 Aug 28 09:10:01 PM UTC 24 167327724837 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.2880718736 Aug 28 09:01:53 PM UTC 24 Aug 28 09:10:06 PM UTC 24 330932302040 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.3572010507 Aug 28 08:52:18 PM UTC 24 Aug 28 09:10:06 PM UTC 24 331483172409 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.3100308499 Aug 28 08:43:57 PM UTC 24 Aug 28 09:10:11 PM UTC 24 500639957250 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.3292846990 Aug 28 09:10:08 PM UTC 24 Aug 28 09:10:17 PM UTC 24 4400161140 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.1008014085 Aug 28 09:03:55 PM UTC 24 Aug 28 09:10:27 PM UTC 24 161920912608 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.640100620 Aug 28 08:58:54 PM UTC 24 Aug 28 09:10:40 PM UTC 24 489621392337 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.1620987031 Aug 28 09:09:19 PM UTC 24 Aug 28 09:10:44 PM UTC 24 911269425537 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.1893231605 Aug 28 09:10:45 PM UTC 24 Aug 28 09:10:47 PM UTC 24 332613326 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.4092320778 Aug 28 09:10:28 PM UTC 24 Aug 28 09:10:48 PM UTC 24 3201865072 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.1385766227 Aug 28 08:37:39 PM UTC 24 Aug 28 09:10:55 PM UTC 24 598092375106 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.1777728856 Aug 28 09:02:08 PM UTC 24 Aug 28 09:10:59 PM UTC 24 161864252759 ps
T376 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.1991390764 Aug 28 08:54:19 PM UTC 24 Aug 28 09:11:02 PM UTC 24 120853103020 ps
T218 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.647787573 Aug 28 09:05:45 PM UTC 24 Aug 28 09:11:02 PM UTC 24 327166107041 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.313253196 Aug 28 09:10:48 PM UTC 24 Aug 28 09:11:03 PM UTC 24 5942139900 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.1039723037 Aug 28 09:09:54 PM UTC 24 Aug 28 09:11:06 PM UTC 24 391760520091 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.3124098376 Aug 28 09:11:07 PM UTC 24 Aug 28 09:11:13 PM UTC 24 166034915390 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.1084760183 Aug 28 09:04:34 PM UTC 24 Aug 28 09:11:20 PM UTC 24 489668497405 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.2237022082 Aug 28 09:11:21 PM UTC 24 Aug 28 09:11:33 PM UTC 24 3582243505 ps
T181 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.2137519512 Aug 28 09:07:54 PM UTC 24 Aug 28 09:11:48 PM UTC 24 323080656948 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.4007289418 Aug 28 08:49:34 PM UTC 24 Aug 28 09:12:00 PM UTC 24 496459154836 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.3839280144 Aug 28 09:11:34 PM UTC 24 Aug 28 09:12:02 PM UTC 24 22877544084 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.4261157198 Aug 28 09:05:36 PM UTC 24 Aug 28 09:12:13 PM UTC 24 372164115488 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.2474769482 Aug 28 09:12:13 PM UTC 24 Aug 28 09:12:16 PM UTC 24 527907862 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.2199111748 Aug 28 09:12:01 PM UTC 24 Aug 28 09:12:19 PM UTC 24 15023697149 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.1104526331 Aug 28 09:04:56 PM UTC 24 Aug 28 09:12:21 PM UTC 24 163732693230 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.1285464683 Aug 28 08:50:25 PM UTC 24 Aug 28 09:12:26 PM UTC 24 494627165140 ps
T182 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.2994663151 Aug 28 09:05:11 PM UTC 24 Aug 28 09:12:34 PM UTC 24 335064799113 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.3706399480 Aug 28 09:12:16 PM UTC 24 Aug 28 09:12:34 PM UTC 24 6047997618 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.3086521181 Aug 28 08:58:47 PM UTC 24 Aug 28 09:12:35 PM UTC 24 329739105793 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.258390795 Aug 28 08:53:47 PM UTC 24 Aug 28 09:12:42 PM UTC 24 356155768538 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.2595457513 Aug 28 08:47:28 PM UTC 24 Aug 28 09:12:51 PM UTC 24 505017047577 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.745206978 Aug 28 09:10:12 PM UTC 24 Aug 28 09:12:57 PM UTC 24 41113507873 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.1203297390 Aug 28 09:11:04 PM UTC 24 Aug 28 09:12:58 PM UTC 24 198554441656 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.1715458365 Aug 28 09:12:58 PM UTC 24 Aug 28 09:13:03 PM UTC 24 2806015065 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.3879389894 Aug 28 09:03:57 PM UTC 24 Aug 28 09:13:05 PM UTC 24 174888782582 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.3398123691 Aug 28 09:06:11 PM UTC 24 Aug 28 09:13:09 PM UTC 24 160666806320 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.1014398280 Aug 28 08:44:56 PM UTC 24 Aug 28 09:13:10 PM UTC 24 585429953467 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.3322080607 Aug 28 09:13:10 PM UTC 24 Aug 28 09:13:14 PM UTC 24 280274934 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.2945288817 Aug 28 09:13:14 PM UTC 24 Aug 28 09:13:22 PM UTC 24 5783536237 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.2230883978 Aug 28 09:13:06 PM UTC 24 Aug 28 09:13:30 PM UTC 24 60335337933 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.1189513759 Aug 28 09:12:59 PM UTC 24 Aug 28 09:13:37 PM UTC 24 38094248055 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.843590067 Aug 28 09:02:40 PM UTC 24 Aug 28 09:13:43 PM UTC 24 486262988855 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.3349699409 Aug 28 09:08:25 PM UTC 24 Aug 28 09:13:45 PM UTC 24 483473283198 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.621733238 Aug 28 09:04:20 PM UTC 24 Aug 28 09:13:47 PM UTC 24 73091153571 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.1604088027 Aug 28 09:02:13 PM UTC 24 Aug 28 09:13:49 PM UTC 24 99946625910 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.3491586532 Aug 28 09:01:32 PM UTC 24 Aug 28 09:13:52 PM UTC 24 131401409368 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.3412864620 Aug 28 08:59:47 PM UTC 24 Aug 28 09:13:56 PM UTC 24 113651479812 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.821093811 Aug 28 09:13:56 PM UTC 24 Aug 28 09:14:03 PM UTC 24 5075084793 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.4054518076 Aug 28 09:05:22 PM UTC 24 Aug 28 09:14:24 PM UTC 24 70969027940 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.3950335216 Aug 28 09:07:47 PM UTC 24 Aug 28 09:14:24 PM UTC 24 495873907115 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.2582900858 Aug 28 09:14:04 PM UTC 24 Aug 28 09:14:31 PM UTC 24 24963745727 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.1227442856 Aug 28 09:14:25 PM UTC 24 Aug 28 09:14:42 PM UTC 24 35646334094 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.1863373976 Aug 28 09:14:42 PM UTC 24 Aug 28 09:14:46 PM UTC 24 292847158 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.3943543477 Aug 28 09:14:46 PM UTC 24 Aug 28 09:14:49 PM UTC 24 6154620468 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.3102030893 Aug 28 09:09:39 PM UTC 24 Aug 28 09:14:51 PM UTC 24 497386901445 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.2109246659 Aug 28 09:12:21 PM UTC 24 Aug 28 09:15:11 PM UTC 24 328706184573 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.1584669175 Aug 28 09:12:43 PM UTC 24 Aug 28 09:15:12 PM UTC 24 330075702977 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.606659401 Aug 28 08:58:48 PM UTC 24 Aug 28 09:15:15 PM UTC 24 327701765198 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.1923457401 Aug 28 09:09:28 PM UTC 24 Aug 28 09:15:16 PM UTC 24 493884709364 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.1066801709 Aug 28 08:55:06 PM UTC 24 Aug 28 09:15:34 PM UTC 24 397233302011 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.3006498908 Aug 28 09:09:42 PM UTC 24 Aug 28 09:15:38 PM UTC 24 167379608263 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.210674165 Aug 28 09:10:40 PM UTC 24 Aug 28 09:15:46 PM UTC 24 227676738143 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.2820117136 Aug 28 09:15:47 PM UTC 24 Aug 28 09:16:02 PM UTC 24 3403692958 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.1484605631 Aug 28 09:14:53 PM UTC 24 Aug 28 09:16:23 PM UTC 24 329066791662 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.229506453 Aug 28 09:04:57 PM UTC 24 Aug 28 09:16:29 PM UTC 24 535648583233 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.3138601038 Aug 28 09:16:35 PM UTC 24 Aug 28 09:16:38 PM UTC 24 315328023 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.3038550912 Aug 28 09:16:29 PM UTC 24 Aug 28 09:16:45 PM UTC 24 15192689380 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.3160494205 Aug 28 09:16:39 PM UTC 24 Aug 28 09:16:47 PM UTC 24 5953839182 ps
T383 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.2351137531 Aug 28 09:07:29 PM UTC 24 Aug 28 09:17:05 PM UTC 24 75555877877 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.1700617545 Aug 28 09:16:03 PM UTC 24 Aug 28 09:17:18 PM UTC 24 38700516404 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.1897748416 Aug 28 08:57:13 PM UTC 24 Aug 28 09:17:28 PM UTC 24 374846193771 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.3055847770 Aug 28 09:08:14 PM UTC 24 Aug 28 09:17:32 PM UTC 24 374193593357 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.3673694511 Aug 28 08:52:13 PM UTC 24 Aug 28 09:17:49 PM UTC 24 497299926812 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.285479830 Aug 28 08:57:27 PM UTC 24 Aug 28 09:17:57 PM UTC 24 535581988450 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.1473084498 Aug 28 09:16:30 PM UTC 24 Aug 28 09:18:01 PM UTC 24 174455760914 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.1112205218 Aug 28 09:11:03 PM UTC 24 Aug 28 09:18:01 PM UTC 24 590245003888 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.2600994696 Aug 28 09:18:02 PM UTC 24 Aug 28 09:18:10 PM UTC 24 3210856230 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.4264364586 Aug 28 09:10:56 PM UTC 24 Aug 28 09:18:10 PM UTC 24 490106350179 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.2584959317 Aug 28 08:55:36 PM UTC 24 Aug 28 09:18:14 PM UTC 24 512767620336 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.2651610573 Aug 28 09:18:12 PM UTC 24 Aug 28 09:18:31 PM UTC 24 4122394088 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.559928407 Aug 28 09:18:32 PM UTC 24 Aug 28 09:18:34 PM UTC 24 527875780 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.3694660703 Aug 28 09:06:59 PM UTC 24 Aug 28 09:18:36 PM UTC 24 330135274869 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.3952953403 Aug 28 09:11:00 PM UTC 24 Aug 28 09:18:41 PM UTC 24 167305478480 ps
T352 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.1866853800 Aug 28 09:12:27 PM UTC 24 Aug 28 09:18:46 PM UTC 24 325753474324 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.4062147267 Aug 28 09:18:35 PM UTC 24 Aug 28 09:18:49 PM UTC 24 5525840690 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.3920344155 Aug 28 09:13:23 PM UTC 24 Aug 28 09:18:52 PM UTC 24 163914358469 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.3805920440 Aug 28 09:12:36 PM UTC 24 Aug 28 09:18:55 PM UTC 24 169668584755 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.104650010 Aug 28 09:13:48 PM UTC 24 Aug 28 09:19:01 PM UTC 24 192353109556 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.3105441474 Aug 28 08:49:32 PM UTC 24 Aug 28 09:19:04 PM UTC 24 617355694762 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.1104790308 Aug 28 09:11:14 PM UTC 24 Aug 28 09:19:13 PM UTC 24 504920424676 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.1694636759 Aug 28 09:13:39 PM UTC 24 Aug 28 09:19:17 PM UTC 24 163203399862 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.2533376856 Aug 28 09:19:13 PM UTC 24 Aug 28 09:19:21 PM UTC 24 2857936633 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.3407443121 Aug 28 09:10:18 PM UTC 24 Aug 28 09:19:22 PM UTC 24 101258042134 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.2358280869 Aug 28 09:18:02 PM UTC 24 Aug 28 09:19:28 PM UTC 24 39379151812 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.1539487751 Aug 28 09:06:46 PM UTC 24 Aug 28 09:19:32 PM UTC 24 415182773783 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.144017160 Aug 28 09:19:34 PM UTC 24 Aug 28 09:19:37 PM UTC 24 477460146 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.3382784391 Aug 28 09:18:41 PM UTC 24 Aug 28 09:19:38 PM UTC 24 164261022667 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.413409850 Aug 28 09:15:13 PM UTC 24 Aug 28 09:19:42 PM UTC 24 496138322927 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.3106842847 Aug 28 09:19:38 PM UTC 24 Aug 28 09:19:43 PM UTC 24 5896490613 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2665965178 Aug 28 09:19:17 PM UTC 24 Aug 28 09:19:59 PM UTC 24 23040625060 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.4271500799 Aug 28 09:18:52 PM UTC 24 Aug 28 09:20:03 PM UTC 24 178905189383 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.3889204577 Aug 28 09:12:36 PM UTC 24 Aug 28 09:20:03 PM UTC 24 406366148427 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.1704984533 Aug 28 09:10:02 PM UTC 24 Aug 28 09:20:07 PM UTC 24 527303483092 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.4131388348 Aug 28 09:19:24 PM UTC 24 Aug 28 09:20:11 PM UTC 24 56362038782 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.3371556939 Aug 28 08:59:57 PM UTC 24 Aug 28 09:20:15 PM UTC 24 287949729153 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.4138661573 Aug 28 09:13:03 PM UTC 24 Aug 28 09:20:24 PM UTC 24 67538230756 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.1870578689 Aug 28 08:53:31 PM UTC 24 Aug 28 09:20:37 PM UTC 24 491397912669 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.1105134975 Aug 28 09:20:15 PM UTC 24 Aug 28 09:20:38 PM UTC 24 5011336752 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.507337747 Aug 28 09:13:31 PM UTC 24 Aug 28 09:20:43 PM UTC 24 158822980595 ps
T312 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.2692267511 Aug 28 08:55:28 PM UTC 24 Aug 28 09:20:43 PM UTC 24 557626578789 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.832468153 Aug 28 09:20:44 PM UTC 24 Aug 28 09:20:48 PM UTC 24 493624816 ps
T45 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.3487666034 Aug 28 09:20:39 PM UTC 24 Aug 28 09:20:53 PM UTC 24 1643975997 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.959725587 Aug 28 09:20:49 PM UTC 24 Aug 28 09:21:14 PM UTC 24 5718143387 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.494743902 Aug 28 08:53:39 PM UTC 24 Aug 28 09:21:14 PM UTC 24 413757939225 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.883636409 Aug 28 09:11:02 PM UTC 24 Aug 28 09:21:19 PM UTC 24 163508769696 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.4286605161 Aug 28 09:18:37 PM UTC 24 Aug 28 09:21:33 PM UTC 24 162475186339 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.3920052591 Aug 28 09:18:50 PM UTC 24 Aug 28 09:21:35 PM UTC 24 164937050788 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.1407430651 Aug 28 09:15:12 PM UTC 24 Aug 28 09:21:39 PM UTC 24 497332080903 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.1524301572 Aug 28 09:15:35 PM UTC 24 Aug 28 09:21:42 PM UTC 24 490356309815 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.1110777449 Aug 28 09:20:54 PM UTC 24 Aug 28 09:21:54 PM UTC 24 172237676182 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.2037744045 Aug 28 09:21:55 PM UTC 24 Aug 28 09:21:59 PM UTC 24 4850418814 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.3615629694 Aug 28 09:17:29 PM UTC 24 Aug 28 09:22:01 PM UTC 24 371610230259 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.1013502527 Aug 28 09:09:43 PM UTC 24 Aug 28 09:22:14 PM UTC 24 324619423105 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.708849776 Aug 28 09:22:15 PM UTC 24 Aug 28 09:22:24 PM UTC 24 6990021609 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.2378338172 Aug 28 09:21:43 PM UTC 24 Aug 28 09:22:27 PM UTC 24 169962381983 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.3474186692 Aug 28 09:01:56 PM UTC 24 Aug 28 09:22:28 PM UTC 24 373149324094 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.1915573596 Aug 28 09:22:28 PM UTC 24 Aug 28 09:22:32 PM UTC 24 414280048 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.838641056 Aug 28 09:22:29 PM UTC 24 Aug 28 09:22:34 PM UTC 24 5788141939 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.1333221672 Aug 28 09:17:19 PM UTC 24 Aug 28 09:22:37 PM UTC 24 502850890928 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.2856756793 Aug 28 09:22:00 PM UTC 24 Aug 28 09:22:37 PM UTC 24 41383182751 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.1022889034 Aug 28 09:15:17 PM UTC 24 Aug 28 09:22:40 PM UTC 24 589219932691 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3064939555 Aug 28 09:20:25 PM UTC 24 Aug 28 09:22:42 PM UTC 24 39825404615 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.3668575632 Aug 28 09:07:04 PM UTC 24 Aug 28 09:22:55 PM UTC 24 373974296153 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.407682087 Aug 28 09:12:52 PM UTC 24 Aug 28 09:23:08 PM UTC 24 166821811157 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.2049834696 Aug 28 09:15:16 PM UTC 24 Aug 28 09:23:18 PM UTC 24 182138333636 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup_fixed.20060924 Aug 28 09:21:36 PM UTC 24 Aug 28 09:23:19 PM UTC 24 195082311502 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.3131718605 Aug 28 08:53:37 PM UTC 24 Aug 28 09:23:21 PM UTC 24 602453221277 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.1104464088 Aug 28 09:14:25 PM UTC 24 Aug 28 09:23:23 PM UTC 24 95223775281 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.2041055249 Aug 28 09:23:19 PM UTC 24 Aug 28 09:23:24 PM UTC 24 4980483997 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.1723014537 Aug 28 09:21:39 PM UTC 24 Aug 28 09:23:25 PM UTC 24 224149074910 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.2227531532 Aug 28 09:20:44 PM UTC 24 Aug 28 09:23:28 PM UTC 24 166347307449 ps
T298 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.1671191920 Aug 28 09:17:49 PM UTC 24 Aug 28 09:23:28 PM UTC 24 167032198626 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.2394289830 Aug 28 09:23:26 PM UTC 24 Aug 28 09:23:29 PM UTC 24 535628790 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.1360978643 Aug 28 09:13:46 PM UTC 24 Aug 28 09:23:32 PM UTC 24 181519192519 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.1727498718 Aug 28 09:23:24 PM UTC 24 Aug 28 09:23:40 PM UTC 24 18703391456 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.2989200665 Aug 28 09:18:15 PM UTC 24 Aug 28 09:23:40 PM UTC 24 205708243209 ps
T384 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.2465083105 Aug 28 09:14:32 PM UTC 24 Aug 28 09:23:45 PM UTC 24 143534400437 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.1276503351 Aug 28 09:09:02 PM UTC 24 Aug 28 09:23:47 PM UTC 24 125507674798 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.2482037370 Aug 28 09:17:33 PM UTC 24 Aug 28 09:23:49 PM UTC 24 401266313040 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.755129188 Aug 28 09:23:20 PM UTC 24 Aug 28 09:23:54 PM UTC 24 24997293066 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.2804155661 Aug 28 09:16:46 PM UTC 24 Aug 28 09:23:55 PM UTC 24 160316184670 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.1792963909 Aug 28 09:23:25 PM UTC 24 Aug 28 09:23:58 PM UTC 24 47399111677 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.3901553025 Aug 28 09:21:15 PM UTC 24 Aug 28 09:24:03 PM UTC 24 167298576695 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.1696783782 Aug 28 09:10:49 PM UTC 24 Aug 28 09:24:07 PM UTC 24 332202809380 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.3243707698 Aug 28 09:19:04 PM UTC 24 Aug 28 09:24:08 PM UTC 24 332767908845 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.3794815212 Aug 28 09:07:48 PM UTC 24 Aug 28 09:24:22 PM UTC 24 327114237289 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.4102457851 Aug 28 09:16:48 PM UTC 24 Aug 28 09:24:40 PM UTC 24 162861882552 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.3257453739 Aug 28 09:19:43 PM UTC 24 Aug 28 09:24:51 PM UTC 24 165623862809 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.3607103446 Aug 28 09:13:44 PM UTC 24 Aug 28 09:24:59 PM UTC 24 493011705276 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.4099266128 Aug 28 09:07:35 PM UTC 24 Aug 28 09:25:01 PM UTC 24 333790052829 ps
T297 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.3195752565 Aug 28 09:20:08 PM UTC 24 Aug 28 09:25:06 PM UTC 24 572926424871 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.3700730823 Aug 28 09:12:35 PM UTC 24 Aug 28 09:25:20 PM UTC 24 492201667484 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.3122947057 Aug 28 09:18:47 PM UTC 24 Aug 28 09:25:29 PM UTC 24 495852877318 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.1623675494 Aug 28 09:12:20 PM UTC 24 Aug 28 09:25:38 PM UTC 24 490315428953 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.4051854904 Aug 28 09:04:42 PM UTC 24 Aug 28 09:25:39 PM UTC 24 479656100232 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.3103608693 Aug 28 09:21:15 PM UTC 24 Aug 28 09:25:45 PM UTC 24 164981825807 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.4148301311 Aug 28 09:02:27 PM UTC 24 Aug 28 09:25:47 PM UTC 24 1347101004424 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.2844627714 Aug 28 09:16:23 PM UTC 24 Aug 28 09:25:50 PM UTC 24 124577080918 ps
T204 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.2250061974 Aug 28 09:22:41 PM UTC 24 Aug 28 09:25:52 PM UTC 24 411528341784 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.293710843 Aug 28 09:22:55 PM UTC 24 Aug 28 09:26:01 PM UTC 24 362166838392 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.2457243163 Aug 28 09:20:38 PM UTC 24 Aug 28 09:26:08 PM UTC 24 79983741332 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.1476317824 Aug 28 09:19:22 PM UTC 24 Aug 28 09:26:15 PM UTC 24 96156352297 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.4152945249 Aug 28 09:17:06 PM UTC 24 Aug 28 09:26:25 PM UTC 24 160625684167 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.3896325009 Aug 28 09:17:58 PM UTC 24 Aug 28 09:26:41 PM UTC 24 547644364623 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.1565412583 Aug 28 09:11:49 PM UTC 24 Aug 28 09:26:44 PM UTC 24 117073150774 ps
T367 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.349953201 Aug 28 09:10:07 PM UTC 24 Aug 28 09:27:01 PM UTC 24 519400133932 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.1823497112 Aug 28 09:20:04 PM UTC 24 Aug 28 09:27:03 PM UTC 24 204215889703 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.1715436457 Aug 28 09:22:34 PM UTC 24 Aug 28 09:28:27 PM UTC 24 489441359283 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.2419695163 Aug 28 09:23:09 PM UTC 24 Aug 28 09:28:27 PM UTC 24 184180231296 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.2637922632 Aug 28 09:12:03 PM UTC 24 Aug 28 09:28:56 PM UTC 24 327966273793 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.3709949361 Aug 28 09:22:02 PM UTC 24 Aug 28 09:28:59 PM UTC 24 121170926892 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.1412056361 Aug 28 09:06:32 PM UTC 24 Aug 28 09:29:02 PM UTC 24 370216264978 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.3273446561 Aug 28 09:19:29 PM UTC 24 Aug 28 09:29:14 PM UTC 24 114927056773 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.56451080 Aug 28 09:19:01 PM UTC 24 Aug 28 09:29:20 PM UTC 24 518079005180 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.711133807 Aug 28 09:20:00 PM UTC 24 Aug 28 09:30:02 PM UTC 24 493271843808 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.3341496095 Aug 28 09:13:53 PM UTC 24 Aug 28 09:30:31 PM UTC 24 323415301631 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.3146171755 Aug 28 09:15:38 PM UTC 24 Aug 28 09:31:38 PM UTC 24 326747585254 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.1404272596 Aug 28 09:18:11 PM UTC 24 Aug 28 09:31:47 PM UTC 24 122866172575 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.1140673367 Aug 28 09:09:42 PM UTC 24 Aug 28 09:32:09 PM UTC 24 499738443215 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.2571595000 Aug 28 09:14:49 PM UTC 24 Aug 28 09:32:28 PM UTC 24 330372876271 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.71615946 Aug 28 09:07:58 PM UTC 24 Aug 28 09:34:01 PM UTC 24 483725918209 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.261454068 Aug 28 09:21:19 PM UTC 24 Aug 28 09:34:31 PM UTC 24 502222622380 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup_fixed.2251621285 Aug 28 09:22:42 PM UTC 24 Aug 28 09:35:15 PM UTC 24 211997455680 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.1091809576 Aug 28 09:08:24 PM UTC 24 Aug 28 09:35:35 PM UTC 24 597545426731 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.273233180 Aug 28 09:22:32 PM UTC 24 Aug 28 09:35:46 PM UTC 24 491573608572 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.790990835 Aug 28 09:05:07 PM UTC 24 Aug 28 09:35:55 PM UTC 24 585164637087 ps
T219 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.3656299847 Aug 28 09:08:42 PM UTC 24 Aug 28 09:36:28 PM UTC 24 508492296592 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.1593719780 Aug 28 09:09:48 PM UTC 24 Aug 28 09:36:38 PM UTC 24 518954696694 ps
T217 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.297449106 Aug 28 09:22:37 PM UTC 24 Aug 28 09:37:06 PM UTC 24 329766283708 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.992944712 Aug 28 09:23:22 PM UTC 24 Aug 28 09:38:33 PM UTC 24 127295581017 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.95762787 Aug 28 09:22:37 PM UTC 24 Aug 28 09:39:41 PM UTC 24 332622934393 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.2716369198 Aug 28 09:18:56 PM UTC 24 Aug 28 09:39:44 PM UTC 24 405220152361 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.2514220156 Aug 28 09:13:10 PM UTC 24 Aug 28 09:40:00 PM UTC 24 1034312923725 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.1372875283 Aug 28 09:20:11 PM UTC 24 Aug 28 09:41:38 PM UTC 24 385380156905 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.4098689475 Aug 28 09:19:44 PM UTC 24 Aug 28 09:44:42 PM UTC 24 485462989149 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_28/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.2388825748 Aug 28 09:19:39 PM UTC 24 Aug 28 09:47:06 PM UTC 24 482352228937 ps
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