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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.71 99.07 96.67 100.00 100.00 98.83 98.33 91.09


Total test records in report: 920
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T452 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt_fixed.2676532284 Sep 01 07:52:28 AM UTC 24 Sep 01 08:09:44 AM UTC 24 333266917573 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_smoke.3396629340 Sep 01 08:09:28 AM UTC 24 Sep 01 08:09:52 AM UTC 24 5662398025 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.2758301276 Sep 01 07:59:05 AM UTC 24 Sep 01 08:09:55 AM UTC 24 116629908072 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_clock_gating.721901667 Sep 01 07:44:14 AM UTC 24 Sep 01 08:10:18 AM UTC 24 527532013675 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.1972873776 Sep 01 08:02:55 AM UTC 24 Sep 01 08:10:21 AM UTC 24 605718470521 ps
T312 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.2614824701 Sep 01 08:01:23 AM UTC 24 Sep 01 08:10:28 AM UTC 24 175211133402 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.2043333826 Sep 01 08:10:22 AM UTC 24 Sep 01 08:10:42 AM UTC 24 4354061201 ps
T208 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_stress_all.2662497477 Sep 01 07:57:28 AM UTC 24 Sep 01 08:10:42 AM UTC 24 134641076270 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.310212019 Sep 01 08:06:39 AM UTC 24 Sep 01 08:10:46 AM UTC 24 449633657717 ps
T259 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.1238095417 Sep 01 08:03:07 AM UTC 24 Sep 01 08:10:47 AM UTC 24 342562202883 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.3291875034 Sep 01 08:10:48 AM UTC 24 Sep 01 08:10:50 AM UTC 24 462122908 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.345396913 Sep 01 08:00:09 AM UTC 24 Sep 01 08:10:51 AM UTC 24 383971268228 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.1410282602 Sep 01 08:10:28 AM UTC 24 Sep 01 08:10:51 AM UTC 24 43733951442 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.3966441076 Sep 01 08:10:51 AM UTC 24 Sep 01 08:11:06 AM UTC 24 6038017941 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.3288255670 Sep 01 08:01:31 AM UTC 24 Sep 01 08:11:16 AM UTC 24 368059205310 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.2384250728 Sep 01 08:09:56 AM UTC 24 Sep 01 08:11:18 AM UTC 24 501165633744 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.2787370325 Sep 01 07:53:23 AM UTC 24 Sep 01 08:11:25 AM UTC 24 310759563954 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.1001557654 Sep 01 07:55:57 AM UTC 24 Sep 01 08:11:46 AM UTC 24 328942316155 ps
T461 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_filters_polled_fixed.2106913542 Sep 01 07:43:26 AM UTC 24 Sep 01 08:11:55 AM UTC 24 494894164582 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.1968159352 Sep 01 08:03:26 AM UTC 24 Sep 01 08:11:58 AM UTC 24 116594505686 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.1750542954 Sep 01 08:10:43 AM UTC 24 Sep 01 08:12:03 AM UTC 24 62832723336 ps
T462 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.2802179968 Sep 01 08:11:56 AM UTC 24 Sep 01 08:12:04 AM UTC 24 2694236057 ps
T223 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.969551224 Sep 01 08:00:06 AM UTC 24 Sep 01 08:12:07 AM UTC 24 199049709271 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.3915040291 Sep 01 08:09:44 AM UTC 24 Sep 01 08:12:07 AM UTC 24 167561086398 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.969463645 Sep 01 08:08:38 AM UTC 24 Sep 01 08:12:08 AM UTC 24 48183624726 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.3380740611 Sep 01 08:12:07 AM UTC 24 Sep 01 08:12:09 AM UTC 24 388894651 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.3152594182 Sep 01 08:11:59 AM UTC 24 Sep 01 08:12:12 AM UTC 24 36751151434 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.2472342717 Sep 01 08:12:05 AM UTC 24 Sep 01 08:12:21 AM UTC 24 1809033148 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.2283375585 Sep 01 08:12:08 AM UTC 24 Sep 01 08:12:23 AM UTC 24 5973396356 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_both.456457324 Sep 01 07:48:04 AM UTC 24 Sep 01 08:15:42 AM UTC 24 541363555899 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.32248178 Sep 01 08:07:24 AM UTC 24 Sep 01 08:12:25 AM UTC 24 346503847620 ps
T265 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.3146199479 Sep 01 08:07:46 AM UTC 24 Sep 01 08:12:36 AM UTC 24 331250783324 ps
T276 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_both.242574096 Sep 01 07:56:58 AM UTC 24 Sep 01 08:12:42 AM UTC 24 518029665222 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.2845455515 Sep 01 08:04:14 AM UTC 24 Sep 01 08:12:49 AM UTC 24 495837700783 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.3471459477 Sep 01 08:11:27 AM UTC 24 Sep 01 08:12:56 AM UTC 24 171428737349 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.2018257604 Sep 01 08:12:49 AM UTC 24 Sep 01 08:12:57 AM UTC 24 3082592125 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.1792596870 Sep 01 08:06:19 AM UTC 24 Sep 01 08:13:05 AM UTC 24 596303271764 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.4244373129 Sep 01 08:05:38 AM UTC 24 Sep 01 08:13:08 AM UTC 24 160055330655 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.440750801 Sep 01 08:10:53 AM UTC 24 Sep 01 08:13:12 AM UTC 24 322441158142 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3666985671 Sep 01 08:13:13 AM UTC 24 Sep 01 08:13:16 AM UTC 24 321308936 ps
T244 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.927042733 Sep 01 08:05:54 AM UTC 24 Sep 01 08:13:18 AM UTC 24 522843728685 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.2978645218 Sep 01 08:12:57 AM UTC 24 Sep 01 08:13:23 AM UTC 24 32067394870 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.4083180296 Sep 01 08:13:17 AM UTC 24 Sep 01 08:13:25 AM UTC 24 6055850983 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.3423979543 Sep 01 08:13:06 AM UTC 24 Sep 01 08:13:30 AM UTC 24 6415573187 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.3071708931 Sep 01 08:08:04 AM UTC 24 Sep 01 08:13:45 AM UTC 24 411650428530 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.2176140014 Sep 01 08:09:44 AM UTC 24 Sep 01 08:13:53 AM UTC 24 184568882154 ps
T210 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.3909124912 Sep 01 08:05:20 AM UTC 24 Sep 01 08:13:58 AM UTC 24 82531215955 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.2379218860 Sep 01 08:08:29 AM UTC 24 Sep 01 08:14:12 AM UTC 24 500914179808 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.764642245 Sep 01 08:14:14 AM UTC 24 Sep 01 08:14:19 AM UTC 24 4254605905 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_interrupt_fixed.1020152111 Sep 01 07:57:58 AM UTC 24 Sep 01 08:14:36 AM UTC 24 326241293153 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.4290232280 Sep 01 08:12:24 AM UTC 24 Sep 01 08:14:38 AM UTC 24 477412954003 ps
T245 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.1218956571 Sep 01 08:14:39 AM UTC 24 Sep 01 08:15:00 AM UTC 24 12764162991 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt_fixed.2261006904 Sep 01 07:47:33 AM UTC 24 Sep 01 08:15:03 AM UTC 24 497745207686 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.2756249826 Sep 01 08:15:03 AM UTC 24 Sep 01 08:15:05 AM UTC 24 441536397 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.2048847078 Sep 01 08:15:06 AM UTC 24 Sep 01 08:15:31 AM UTC 24 5671263462 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.1759933374 Sep 01 08:02:03 AM UTC 24 Sep 01 08:15:35 AM UTC 24 103240868957 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.1729862659 Sep 01 08:07:43 AM UTC 24 Sep 01 08:15:45 AM UTC 24 326560320868 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.1177557280 Sep 01 08:06:54 AM UTC 24 Sep 01 08:15:55 AM UTC 24 77607893900 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.3464689729 Sep 01 08:04:12 AM UTC 24 Sep 01 08:15:56 AM UTC 24 499454135159 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.1705323151 Sep 01 08:14:20 AM UTC 24 Sep 01 08:16:04 AM UTC 24 41701091943 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.3321899035 Sep 01 08:13:26 AM UTC 24 Sep 01 08:16:05 AM UTC 24 168492995934 ps
T240 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_interrupt.3379344047 Sep 01 07:49:33 AM UTC 24 Sep 01 08:16:06 AM UTC 24 496011249491 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled.1589149662 Sep 01 07:52:14 AM UTC 24 Sep 01 08:16:07 AM UTC 24 490075786589 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.3160639798 Sep 01 08:16:05 AM UTC 24 Sep 01 08:16:12 AM UTC 24 4165224684 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.115850293 Sep 01 08:07:55 AM UTC 24 Sep 01 08:16:16 AM UTC 24 166177909634 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.1462027211 Sep 01 08:12:47 AM UTC 24 Sep 01 08:16:19 AM UTC 24 167040630909 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.2665676277 Sep 01 08:16:20 AM UTC 24 Sep 01 08:16:24 AM UTC 24 454179097 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.2461344951 Sep 01 08:09:53 AM UTC 24 Sep 01 08:16:30 AM UTC 24 388088331450 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.2929113478 Sep 01 08:16:25 AM UTC 24 Sep 01 08:16:36 AM UTC 24 6118501762 ps
T260 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.899095604 Sep 01 08:16:13 AM UTC 24 Sep 01 08:16:40 AM UTC 24 17506282051 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.3834879274 Sep 01 08:13:53 AM UTC 24 Sep 01 08:16:50 AM UTC 24 175698690824 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.2438582484 Sep 01 08:16:08 AM UTC 24 Sep 01 08:16:51 AM UTC 24 36336466615 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1415176537 Sep 01 08:12:43 AM UTC 24 Sep 01 08:16:55 AM UTC 24 504088500672 ps
T494 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1748727676 Sep 01 08:13:24 AM UTC 24 Sep 01 08:17:04 AM UTC 24 319202980727 ps
T495 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.897702370 Sep 01 08:09:03 AM UTC 24 Sep 01 08:17:19 AM UTC 24 190905031734 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_polled.1044538527 Sep 01 08:02:29 AM UTC 24 Sep 01 08:17:21 AM UTC 24 489388760994 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.820429848 Sep 01 08:13:19 AM UTC 24 Sep 01 08:17:22 AM UTC 24 321723329090 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3346375982 Sep 01 08:13:31 AM UTC 24 Sep 01 08:17:28 AM UTC 24 169974314645 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.4222097612 Sep 01 08:17:22 AM UTC 24 Sep 01 08:17:32 AM UTC 24 3988618227 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.1201806260 Sep 01 08:10:52 AM UTC 24 Sep 01 08:17:39 AM UTC 24 489128360465 ps
T268 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.200863538 Sep 01 08:17:33 AM UTC 24 Sep 01 08:17:42 AM UTC 24 2422953794 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.1765594382 Sep 01 08:17:43 AM UTC 24 Sep 01 08:17:47 AM UTC 24 505783456 ps
T500 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.3264171421 Sep 01 08:17:48 AM UTC 24 Sep 01 08:17:56 AM UTC 24 5758063940 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.2951476290 Sep 01 08:11:06 AM UTC 24 Sep 01 08:18:00 AM UTC 24 330544535046 ps
T502 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.2395460758 Sep 01 08:11:18 AM UTC 24 Sep 01 08:18:01 AM UTC 24 198653846455 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_both.3115587548 Sep 01 07:52:42 AM UTC 24 Sep 01 08:18:01 AM UTC 24 514182341294 ps
T301 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.3877706949 Sep 01 08:15:57 AM UTC 24 Sep 01 08:18:29 AM UTC 24 166792059316 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1114294234 Sep 01 08:10:42 AM UTC 24 Sep 01 08:18:35 AM UTC 24 87743160407 ps
T503 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.3299927863 Sep 01 08:09:32 AM UTC 24 Sep 01 08:18:36 AM UTC 24 169655459273 ps
T249 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.2242149309 Sep 01 08:16:04 AM UTC 24 Sep 01 08:18:41 AM UTC 24 191824317355 ps
T504 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.1114840428 Sep 01 08:16:36 AM UTC 24 Sep 01 08:18:44 AM UTC 24 325900928260 ps
T505 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.4044680384 Sep 01 08:18:45 AM UTC 24 Sep 01 08:18:52 AM UTC 24 4918005589 ps
T506 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.2638528256 Sep 01 08:12:07 AM UTC 24 Sep 01 08:18:59 AM UTC 24 170640248657 ps
T256 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.3178847763 Sep 01 08:05:11 AM UTC 24 Sep 01 08:19:01 AM UTC 24 524523574299 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.925784582 Sep 01 08:10:19 AM UTC 24 Sep 01 08:19:06 AM UTC 24 370800987603 ps
T507 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.537277422 Sep 01 08:17:23 AM UTC 24 Sep 01 08:19:07 AM UTC 24 30210163068 ps
T508 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.2927398584 Sep 01 08:19:08 AM UTC 24 Sep 01 08:19:12 AM UTC 24 347009855 ps
T509 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.1253078510 Sep 01 08:13:46 AM UTC 24 Sep 01 08:19:20 AM UTC 24 203699511890 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.4140505610 Sep 01 08:19:01 AM UTC 24 Sep 01 08:19:22 AM UTC 24 4988497318 ps
T510 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.1560351433 Sep 01 08:18:53 AM UTC 24 Sep 01 08:19:27 AM UTC 24 45575940026 ps
T511 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.1782054622 Sep 01 08:12:37 AM UTC 24 Sep 01 08:19:33 AM UTC 24 409119564865 ps
T512 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.145879106 Sep 01 07:56:36 AM UTC 24 Sep 01 08:19:34 AM UTC 24 395948547154 ps
T513 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.4085191775 Sep 01 08:19:12 AM UTC 24 Sep 01 08:19:38 AM UTC 24 6020729433 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.398257128 Sep 01 08:15:36 AM UTC 24 Sep 01 08:19:41 AM UTC 24 326051109984 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.1921181769 Sep 01 08:11:47 AM UTC 24 Sep 01 08:19:54 AM UTC 24 325389010561 ps
T514 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.2546170701 Sep 01 07:58:06 AM UTC 24 Sep 01 08:20:06 AM UTC 24 422650568189 ps
T283 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.412572335 Sep 01 08:03:51 AM UTC 24 Sep 01 08:20:10 AM UTC 24 347762515254 ps
T515 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.3476270683 Sep 01 08:15:56 AM UTC 24 Sep 01 08:20:11 AM UTC 24 384774157117 ps
T516 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.3115411632 Sep 01 08:12:59 AM UTC 24 Sep 01 08:20:17 AM UTC 24 75781302746 ps
T517 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.4228544199 Sep 01 08:15:09 AM UTC 24 Sep 01 08:20:18 AM UTC 24 169689369683 ps
T518 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2044524400 Sep 01 08:20:10 AM UTC 24 Sep 01 08:20:24 AM UTC 24 42837896952 ps
T519 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.603217544 Sep 01 08:20:06 AM UTC 24 Sep 01 08:20:26 AM UTC 24 4626921717 ps
T520 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.412801898 Sep 01 08:20:25 AM UTC 24 Sep 01 08:20:28 AM UTC 24 333026191 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.413572668 Sep 01 08:20:27 AM UTC 24 Sep 01 08:20:32 AM UTC 24 5601768403 ps
T522 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_wakeup_fixed.1225449676 Sep 01 07:46:55 AM UTC 24 Sep 01 08:20:33 AM UTC 24 601216304635 ps
T288 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.157976038 Sep 01 08:11:16 AM UTC 24 Sep 01 08:20:37 AM UTC 24 170441456031 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.2796150122 Sep 01 08:20:17 AM UTC 24 Sep 01 08:20:40 AM UTC 24 3460751002 ps
T523 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.3644094410 Sep 01 08:18:36 AM UTC 24 Sep 01 08:20:43 AM UTC 24 196610804457 ps
T524 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.414280389 Sep 01 08:19:35 AM UTC 24 Sep 01 08:20:52 AM UTC 24 197949629240 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.2572686842 Sep 01 08:17:04 AM UTC 24 Sep 01 08:20:58 AM UTC 24 516546758314 ps
T211 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.1951580030 Sep 01 08:12:04 AM UTC 24 Sep 01 08:21:01 AM UTC 24 73178641511 ps
T525 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.2555984042 Sep 01 08:20:59 AM UTC 24 Sep 01 08:21:03 AM UTC 24 2721327137 ps
T526 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.2887269178 Sep 01 08:14:36 AM UTC 24 Sep 01 08:21:21 AM UTC 24 79836483266 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.108511420 Sep 01 08:10:47 AM UTC 24 Sep 01 08:21:27 AM UTC 24 162313567666 ps
T311 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_clock_gating.3345056921 Sep 01 07:56:41 AM UTC 24 Sep 01 08:21:31 AM UTC 24 525306616169 ps
T527 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.3845184912 Sep 01 08:21:02 AM UTC 24 Sep 01 08:21:32 AM UTC 24 40449856814 ps
T528 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.2401975043 Sep 01 08:21:32 AM UTC 24 Sep 01 08:21:35 AM UTC 24 320514493 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.2414405040 Sep 01 08:21:22 AM UTC 24 Sep 01 08:21:42 AM UTC 24 2787420724 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.3750722200 Sep 01 08:18:42 AM UTC 24 Sep 01 08:21:46 AM UTC 24 257236999223 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.429777804 Sep 01 08:21:32 AM UTC 24 Sep 01 08:21:59 AM UTC 24 5939083704 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.4208222630 Sep 01 08:08:53 AM UTC 24 Sep 01 08:22:10 AM UTC 24 114404598408 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.2663839236 Sep 01 08:13:59 AM UTC 24 Sep 01 08:22:13 AM UTC 24 547257176665 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.3221344431 Sep 01 08:18:37 AM UTC 24 Sep 01 08:22:36 AM UTC 24 348038573181 ps
T531 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.1424380941 Sep 01 08:18:01 AM UTC 24 Sep 01 08:22:14 AM UTC 24 325501647174 ps
T532 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.2677285288 Sep 01 08:22:18 AM UTC 24 Sep 01 08:22:23 AM UTC 24 3062035684 ps
T533 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.2619986985 Sep 01 08:21:36 AM UTC 24 Sep 01 08:22:28 AM UTC 24 162762474237 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.559638932 Sep 01 08:16:56 AM UTC 24 Sep 01 08:22:33 AM UTC 24 410063074710 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.2587741422 Sep 01 08:20:33 AM UTC 24 Sep 01 08:22:35 AM UTC 24 499166797774 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.2272723218 Sep 01 08:19:39 AM UTC 24 Sep 01 08:22:36 AM UTC 24 212677595623 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.2110746412 Sep 01 08:22:37 AM UTC 24 Sep 01 08:22:41 AM UTC 24 467228390 ps
T344 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.1860236624 Sep 01 08:22:34 AM UTC 24 Sep 01 08:22:47 AM UTC 24 3654798568 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.1386575964 Sep 01 08:17:40 AM UTC 24 Sep 01 08:23:01 AM UTC 24 520732429555 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.475212068 Sep 01 08:20:33 AM UTC 24 Sep 01 08:23:02 AM UTC 24 166023811410 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.4241200217 Sep 01 08:20:29 AM UTC 24 Sep 01 08:23:02 AM UTC 24 329936278760 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2593174886 Sep 01 08:22:37 AM UTC 24 Sep 01 08:23:03 AM UTC 24 5705329070 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.4246807689 Sep 01 08:22:24 AM UTC 24 Sep 01 08:23:05 AM UTC 24 33094057302 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.3981112199 Sep 01 08:15:32 AM UTC 24 Sep 01 08:23:17 AM UTC 24 166766401995 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.667853085 Sep 01 08:05:48 AM UTC 24 Sep 01 08:23:25 AM UTC 24 338211811091 ps
T257 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.1218196901 Sep 01 08:04:16 AM UTC 24 Sep 01 08:23:38 AM UTC 24 370048326233 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.4256093384 Sep 01 08:23:26 AM UTC 24 Sep 01 08:23:43 AM UTC 24 3368662726 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.390927897 Sep 01 08:12:26 AM UTC 24 Sep 01 08:23:44 AM UTC 24 186410207212 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.1033610721 Sep 01 08:12:10 AM UTC 24 Sep 01 08:23:46 AM UTC 24 324288845267 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.3151869913 Sep 01 08:10:52 AM UTC 24 Sep 01 08:23:50 AM UTC 24 487860287455 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.1863569913 Sep 01 08:23:50 AM UTC 24 Sep 01 08:23:54 AM UTC 24 391205808 ps
T298 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.3135332488 Sep 01 08:15:46 AM UTC 24 Sep 01 08:23:56 AM UTC 24 262640759988 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.1997586 Sep 01 08:23:54 AM UTC 24 Sep 01 08:24:03 AM UTC 24 5573005307 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.2059559003 Sep 01 08:16:51 AM UTC 24 Sep 01 08:24:14 AM UTC 24 167400989474 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.2283354911 Sep 01 08:16:08 AM UTC 24 Sep 01 08:24:17 AM UTC 24 77017192026 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.2854101509 Sep 01 08:17:56 AM UTC 24 Sep 01 08:24:21 AM UTC 24 160265732972 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.1686090292 Sep 01 08:23:45 AM UTC 24 Sep 01 08:24:24 AM UTC 24 35111750668 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.966988852 Sep 01 08:22:47 AM UTC 24 Sep 01 08:24:32 AM UTC 24 331376659662 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.623281760 Sep 01 08:02:55 AM UTC 24 Sep 01 08:24:47 AM UTC 24 551080256851 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.1170415326 Sep 01 08:23:39 AM UTC 24 Sep 01 08:24:47 AM UTC 24 46553663939 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.2467863325 Sep 01 08:12:12 AM UTC 24 Sep 01 08:24:58 AM UTC 24 498356131522 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.3738061425 Sep 01 08:24:48 AM UTC 24 Sep 01 08:25:00 AM UTC 24 4171990052 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.2885347912 Sep 01 08:17:20 AM UTC 24 Sep 01 08:25:12 AM UTC 24 165077083006 ps
T297 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.3173041206 Sep 01 08:19:55 AM UTC 24 Sep 01 08:25:23 AM UTC 24 335054335163 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.1026741587 Sep 01 08:25:24 AM UTC 24 Sep 01 08:25:26 AM UTC 24 503236668 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.978727971 Sep 01 08:20:53 AM UTC 24 Sep 01 08:25:29 AM UTC 24 165192027134 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.2005720199 Sep 01 08:24:59 AM UTC 24 Sep 01 08:25:30 AM UTC 24 29829804110 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.1235246919 Sep 01 08:25:12 AM UTC 24 Sep 01 08:25:43 AM UTC 24 188501028525 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.2112754457 Sep 01 08:25:27 AM UTC 24 Sep 01 08:25:48 AM UTC 24 5761739301 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.1097421960 Sep 01 08:16:31 AM UTC 24 Sep 01 08:26:11 AM UTC 24 162551256619 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.2336592363 Sep 01 08:18:00 AM UTC 24 Sep 01 08:26:32 AM UTC 24 159181351571 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.540845622 Sep 01 08:05:41 AM UTC 24 Sep 01 08:27:16 AM UTC 24 489511929294 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.2549503309 Sep 01 08:16:17 AM UTC 24 Sep 01 08:27:23 AM UTC 24 221373441258 ps
T204 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.4265083740 Sep 01 08:23:56 AM UTC 24 Sep 01 08:27:24 AM UTC 24 327243729939 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.3459061286 Sep 01 08:27:24 AM UTC 24 Sep 01 08:27:31 AM UTC 24 4812623889 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.3554111540 Sep 01 08:22:15 AM UTC 24 Sep 01 08:27:54 AM UTC 24 340179832916 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2503308777 Sep 01 08:16:40 AM UTC 24 Sep 01 08:27:55 AM UTC 24 160888143295 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.1357634518 Sep 01 08:27:32 AM UTC 24 Sep 01 08:27:57 AM UTC 24 24977386459 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.3749352184 Sep 01 08:23:17 AM UTC 24 Sep 01 08:27:58 AM UTC 24 503202492117 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.4029084465 Sep 01 08:23:06 AM UTC 24 Sep 01 08:28:01 AM UTC 24 486063937027 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.876162283 Sep 01 08:27:59 AM UTC 24 Sep 01 08:28:03 AM UTC 24 332796533 ps
T339 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.297905902 Sep 01 08:09:40 AM UTC 24 Sep 01 08:28:05 AM UTC 24 331481309805 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.1888831887 Sep 01 08:18:59 AM UTC 24 Sep 01 08:28:13 AM UTC 24 127136543810 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.3409243139 Sep 01 08:28:03 AM UTC 24 Sep 01 08:28:19 AM UTC 24 6099883390 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.284100444 Sep 01 08:23:03 AM UTC 24 Sep 01 08:28:21 AM UTC 24 423879813997 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.1679006305 Sep 01 08:27:56 AM UTC 24 Sep 01 08:28:22 AM UTC 24 15128811594 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.1070874434 Sep 01 08:20:20 AM UTC 24 Sep 01 08:28:33 AM UTC 24 425607543737 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.2001818620 Sep 01 08:20:33 AM UTC 24 Sep 01 08:28:37 AM UTC 24 321578243255 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.3603305696 Sep 01 08:25:43 AM UTC 24 Sep 01 08:28:42 AM UTC 24 328768505265 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.2856326750 Sep 01 08:28:43 AM UTC 24 Sep 01 08:28:52 AM UTC 24 5546953493 ps
T270 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.129734758 Sep 01 08:22:00 AM UTC 24 Sep 01 08:28:56 AM UTC 24 515020981687 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.3758308821 Sep 01 08:22:29 AM UTC 24 Sep 01 08:29:03 AM UTC 24 85463649755 ps
T302 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.2291746487 Sep 01 08:19:29 AM UTC 24 Sep 01 08:29:07 AM UTC 24 505511144207 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.1209359485 Sep 01 08:19:42 AM UTC 24 Sep 01 08:29:07 AM UTC 24 171015543122 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.470857239 Sep 01 08:29:09 AM UTC 24 Sep 01 08:29:11 AM UTC 24 377880478 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.2627113610 Sep 01 08:29:12 AM UTC 24 Sep 01 08:29:17 AM UTC 24 6067271268 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.3561333235 Sep 01 08:05:39 AM UTC 24 Sep 01 08:29:32 AM UTC 24 492349679127 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.4143120953 Sep 01 08:29:04 AM UTC 24 Sep 01 08:29:41 AM UTC 24 17611171091 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.4053570380 Sep 01 08:15:43 AM UTC 24 Sep 01 08:29:41 AM UTC 24 328684938223 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3862958635 Sep 01 08:28:52 AM UTC 24 Sep 01 08:29:43 AM UTC 24 25327422150 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.475534681 Sep 01 08:20:43 AM UTC 24 Sep 01 08:29:45 AM UTC 24 504241049136 ps
T300 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.4203643052 Sep 01 08:20:38 AM UTC 24 Sep 01 08:29:54 AM UTC 24 532574890713 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.2419948531 Sep 01 08:21:28 AM UTC 24 Sep 01 08:30:13 AM UTC 24 91671565200 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.2527999185 Sep 01 08:04:26 AM UTC 24 Sep 01 08:30:18 AM UTC 24 610182183841 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.809464290 Sep 01 08:24:15 AM UTC 24 Sep 01 08:30:18 AM UTC 24 332373493629 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.440431808 Sep 01 08:30:14 AM UTC 24 Sep 01 08:30:19 AM UTC 24 2866395869 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.2862007360 Sep 01 08:24:48 AM UTC 24 Sep 01 08:30:24 AM UTC 24 338386064282 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.896129514 Sep 01 08:24:18 AM UTC 24 Sep 01 08:30:31 AM UTC 24 163828480024 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.3646126191 Sep 01 08:30:32 AM UTC 24 Sep 01 08:30:36 AM UTC 24 379024181 ps
T289 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.1183952822 Sep 01 08:30:20 AM UTC 24 Sep 01 08:30:38 AM UTC 24 26836288796 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.3717980272 Sep 01 08:30:36 AM UTC 24 Sep 01 08:30:51 AM UTC 24 5933509795 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.4068498954 Sep 01 08:25:30 AM UTC 24 Sep 01 08:30:52 AM UTC 24 160117328976 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.1959421598 Sep 01 08:28:22 AM UTC 24 Sep 01 08:31:17 AM UTC 24 166852146605 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.41682368 Sep 01 08:17:29 AM UTC 24 Sep 01 08:31:20 AM UTC 24 103446094266 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.1384220500 Sep 01 08:16:51 AM UTC 24 Sep 01 08:31:22 AM UTC 24 323713119230 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.2350709296 Sep 01 08:30:19 AM UTC 24 Sep 01 08:31:47 AM UTC 24 39546581442 ps
T324 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.4086161293 Sep 01 08:28:34 AM UTC 24 Sep 01 08:31:48 AM UTC 24 502120392007 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.1038497367 Sep 01 08:23:47 AM UTC 24 Sep 01 08:31:49 AM UTC 24 508563541365 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.997621771 Sep 01 08:31:50 AM UTC 24 Sep 01 08:31:55 AM UTC 24 2767983480 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.1875187655 Sep 01 08:21:04 AM UTC 24 Sep 01 08:32:12 AM UTC 24 98239032329 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.2188860195 Sep 01 08:27:24 AM UTC 24 Sep 01 08:32:14 AM UTC 24 499469451865 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.3796448949 Sep 01 08:30:00 AM UTC 24 Sep 01 08:32:22 AM UTC 24 176816776729 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.2420832561 Sep 01 08:24:33 AM UTC 24 Sep 01 08:32:25 AM UTC 24 569191433896 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.1930877893 Sep 01 08:32:26 AM UTC 24 Sep 01 08:32:28 AM UTC 24 432751976 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3012913831 Sep 01 08:32:14 AM UTC 24 Sep 01 08:32:29 AM UTC 24 3446603554 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.3088702330 Sep 01 08:23:44 AM UTC 24 Sep 01 08:32:32 AM UTC 24 97388602281 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.1962862469 Sep 01 08:28:14 AM UTC 24 Sep 01 08:32:34 AM UTC 24 493336529056 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.251519319 Sep 01 08:32:29 AM UTC 24 Sep 01 08:32:37 AM UTC 24 5740767283 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.1938541979 Sep 01 08:18:01 AM UTC 24 Sep 01 08:32:38 AM UTC 24 318396143024 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.1861648067 Sep 01 08:28:04 AM UTC 24 Sep 01 08:32:39 AM UTC 24 332665326729 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.1504554848 Sep 01 08:24:04 AM UTC 24 Sep 01 08:32:45 AM UTC 24 160854078210 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.3095022819 Sep 01 08:32:45 AM UTC 24 Sep 01 08:33:00 AM UTC 24 169657288410 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.3352782808 Sep 01 08:22:41 AM UTC 24 Sep 01 08:33:10 AM UTC 24 163011909491 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.2573281361 Sep 01 08:07:34 AM UTC 24 Sep 01 08:33:12 AM UTC 24 484394276439 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.4123013499 Sep 01 08:23:03 AM UTC 24 Sep 01 08:33:14 AM UTC 24 486487208778 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.3268708757 Sep 01 08:33:10 AM UTC 24 Sep 01 08:33:14 AM UTC 24 4297113300 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.4288740771 Sep 01 08:29:42 AM UTC 24 Sep 01 08:33:28 AM UTC 24 160375217982 ps
T335 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all.30012267 Sep 01 08:27:57 AM UTC 24 Sep 01 08:33:31 AM UTC 24 485129957475 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.4205931485 Sep 01 08:20:12 AM UTC 24 Sep 01 08:33:33 AM UTC 24 128867955887 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.358845223 Sep 01 08:33:32 AM UTC 24 Sep 01 08:33:34 AM UTC 24 350242126 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.1803040418 Sep 01 08:30:52 AM UTC 24 Sep 01 08:33:38 AM UTC 24 160464457122 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.1236852973 Sep 01 08:26:33 AM UTC 24 Sep 01 08:33:38 AM UTC 24 600889078911 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.3084907959 Sep 01 08:32:23 AM UTC 24 Sep 01 08:33:39 AM UTC 24 166434253214 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.4134819866 Sep 01 08:31:56 AM UTC 24 Sep 01 08:33:43 AM UTC 24 29617212301 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.2538335644 Sep 01 08:33:13 AM UTC 24 Sep 01 08:33:59 AM UTC 24 44581063320 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.1271992551 Sep 01 08:28:23 AM UTC 24 Sep 01 08:33:59 AM UTC 24 407380053391 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.363121997 Sep 01 08:33:34 AM UTC 24 Sep 01 08:33:59 AM UTC 24 5972191796 ps
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