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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.71 99.07 96.67 100.00 100.00 98.83 98.33 91.09


Total test records in report: 920
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T621 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.1180709711 Sep 01 08:24:25 AM UTC 24 Sep 01 08:34:06 AM UTC 24 201314186902 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.3092533594 Sep 01 08:13:26 AM UTC 24 Sep 01 08:34:09 AM UTC 24 490603907208 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.2215155828 Sep 01 08:29:44 AM UTC 24 Sep 01 08:34:11 AM UTC 24 362351719468 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.4049901577 Sep 01 08:34:07 AM UTC 24 Sep 01 08:34:22 AM UTC 24 3987065002 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.2737940461 Sep 01 08:33:15 AM UTC 24 Sep 01 08:34:22 AM UTC 24 63712861796 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.284249867 Sep 01 08:34:23 AM UTC 24 Sep 01 08:34:37 AM UTC 24 1369471688 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.1019578652 Sep 01 08:34:38 AM UTC 24 Sep 01 08:34:42 AM UTC 24 482150710 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.2871786233 Sep 01 08:19:21 AM UTC 24 Sep 01 08:34:48 AM UTC 24 324786530580 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.1978303818 Sep 01 08:08:01 AM UTC 24 Sep 01 08:34:49 AM UTC 24 542300550276 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.3387884325 Sep 01 08:32:40 AM UTC 24 Sep 01 08:34:52 AM UTC 24 594385708666 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.1877236771 Sep 01 08:28:56 AM UTC 24 Sep 01 08:34:55 AM UTC 24 77828589251 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.1610736083 Sep 01 08:34:43 AM UTC 24 Sep 01 08:35:06 AM UTC 24 5810798987 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.1793660310 Sep 01 08:34:10 AM UTC 24 Sep 01 08:35:07 AM UTC 24 46713493640 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.3149361451 Sep 01 08:33:59 AM UTC 24 Sep 01 08:35:14 AM UTC 24 332713685272 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.993182866 Sep 01 08:30:19 AM UTC 24 Sep 01 08:36:04 AM UTC 24 73395423067 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.1577504535 Sep 01 08:33:39 AM UTC 24 Sep 01 08:36:19 AM UTC 24 163038580884 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.1410801170 Sep 01 08:36:05 AM UTC 24 Sep 01 08:36:21 AM UTC 24 3381891409 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.3905215337 Sep 01 08:31:21 AM UTC 24 Sep 01 08:36:26 AM UTC 24 530180674070 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.2607466036 Sep 01 08:32:33 AM UTC 24 Sep 01 08:36:34 AM UTC 24 164537598013 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.1007307658 Sep 01 08:34:52 AM UTC 24 Sep 01 08:36:36 AM UTC 24 158258213107 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.2550951893 Sep 01 08:36:27 AM UTC 24 Sep 01 08:36:36 AM UTC 24 1749856580 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.2778809524 Sep 01 08:36:37 AM UTC 24 Sep 01 08:36:40 AM UTC 24 462549297 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.979749369 Sep 01 08:36:37 AM UTC 24 Sep 01 08:36:44 AM UTC 24 5898162110 ps
T349 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.2050236246 Sep 01 08:23:01 AM UTC 24 Sep 01 08:36:56 AM UTC 24 330501930869 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.1236125389 Sep 01 08:32:30 AM UTC 24 Sep 01 08:36:56 AM UTC 24 328174850585 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.1119136005 Sep 01 08:09:29 AM UTC 24 Sep 01 08:37:03 AM UTC 24 487488288078 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.657384794 Sep 01 08:28:20 AM UTC 24 Sep 01 08:37:11 AM UTC 24 160544366195 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.340245876 Sep 01 08:23:04 AM UTC 24 Sep 01 08:37:19 AM UTC 24 609739721802 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.1156544493 Sep 01 08:31:18 AM UTC 24 Sep 01 08:37:33 AM UTC 24 495422036678 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.1738197880 Sep 01 08:19:34 AM UTC 24 Sep 01 08:37:34 AM UTC 24 329543595211 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.1860279924 Sep 01 08:37:35 AM UTC 24 Sep 01 08:37:44 AM UTC 24 3311780255 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.2900541524 Sep 01 08:37:20 AM UTC 24 Sep 01 08:37:45 AM UTC 24 188654133229 ps
T326 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.1326293365 Sep 01 08:34:01 AM UTC 24 Sep 01 08:37:45 AM UTC 24 341767685618 ps
T285 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.1091108436 Sep 01 08:27:17 AM UTC 24 Sep 01 08:37:45 AM UTC 24 519416014570 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.2983563676 Sep 01 08:13:09 AM UTC 24 Sep 01 08:37:48 AM UTC 24 421672059840 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.4160794594 Sep 01 08:37:48 AM UTC 24 Sep 01 08:37:52 AM UTC 24 520595634 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.554007582 Sep 01 08:37:46 AM UTC 24 Sep 01 08:37:56 AM UTC 24 6591398110 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.445489653 Sep 01 08:36:20 AM UTC 24 Sep 01 08:38:11 AM UTC 24 35289407043 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.3040365100 Sep 01 08:36:41 AM UTC 24 Sep 01 08:38:20 AM UTC 24 168472510708 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.2677956964 Sep 01 08:37:52 AM UTC 24 Sep 01 08:38:20 AM UTC 24 5741795423 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.2521660344 Sep 01 08:25:00 AM UTC 24 Sep 01 08:38:23 AM UTC 24 156528777692 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1696147781 Sep 01 08:19:06 AM UTC 24 Sep 01 08:38:29 AM UTC 24 496909646306 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.3959984508 Sep 01 08:33:39 AM UTC 24 Sep 01 08:38:30 AM UTC 24 490856615249 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.2135870254 Sep 01 08:30:53 AM UTC 24 Sep 01 08:38:38 AM UTC 24 160652676514 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.426149406 Sep 01 08:37:04 AM UTC 24 Sep 01 08:38:45 AM UTC 24 180055281565 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.2850050677 Sep 01 08:38:45 AM UTC 24 Sep 01 08:38:50 AM UTC 24 4164088107 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.3010010651 Sep 01 08:28:06 AM UTC 24 Sep 01 08:38:50 AM UTC 24 495474564029 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.3679730755 Sep 01 08:31:47 AM UTC 24 Sep 01 08:39:11 AM UTC 24 158382081992 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.3707074518 Sep 01 08:38:50 AM UTC 24 Sep 01 08:39:11 AM UTC 24 29290928739 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.3744994683 Sep 01 08:20:41 AM UTC 24 Sep 01 08:39:18 AM UTC 24 402104187686 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.1832723552 Sep 01 08:33:35 AM UTC 24 Sep 01 08:39:18 AM UTC 24 327542240388 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.3537835361 Sep 01 08:39:19 AM UTC 24 Sep 01 08:39:21 AM UTC 24 509063565 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.1101608076 Sep 01 08:32:38 AM UTC 24 Sep 01 08:39:21 AM UTC 24 502312216663 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.1458848882 Sep 01 08:29:55 AM UTC 24 Sep 01 08:39:25 AM UTC 24 353776026845 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.2877901677 Sep 01 08:38:12 AM UTC 24 Sep 01 08:39:37 AM UTC 24 162214893225 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.416239489 Sep 01 08:21:47 AM UTC 24 Sep 01 08:39:38 AM UTC 24 329386194051 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.915504405 Sep 01 08:39:20 AM UTC 24 Sep 01 08:39:41 AM UTC 24 5838275660 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.2484308015 Sep 01 08:39:11 AM UTC 24 Sep 01 08:39:45 AM UTC 24 5352620258 ps
T338 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.3509316441 Sep 01 08:30:24 AM UTC 24 Sep 01 08:39:45 AM UTC 24 447890207410 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.3941309617 Sep 01 08:21:40 AM UTC 24 Sep 01 08:39:45 AM UTC 24 321108471801 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.3992022271 Sep 01 08:39:46 AM UTC 24 Sep 01 08:39:51 AM UTC 24 3858214491 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.2545464538 Sep 01 08:21:43 AM UTC 24 Sep 01 08:39:57 AM UTC 24 324060183821 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.3112439976 Sep 01 08:33:01 AM UTC 24 Sep 01 08:40:00 AM UTC 24 599920652578 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.3483783339 Sep 01 08:27:54 AM UTC 24 Sep 01 08:40:01 AM UTC 24 102116352087 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.4127849749 Sep 01 08:37:45 AM UTC 24 Sep 01 08:40:04 AM UTC 24 35635769461 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.2647038832 Sep 01 08:40:05 AM UTC 24 Sep 01 08:40:07 AM UTC 24 379947491 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.1616681900 Sep 01 08:25:49 AM UTC 24 Sep 01 08:40:13 AM UTC 24 332190139627 ps
T321 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.3965483798 Sep 01 08:35:08 AM UTC 24 Sep 01 08:40:17 AM UTC 24 522845965804 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.3969384088 Sep 01 08:40:08 AM UTC 24 Sep 01 08:40:18 AM UTC 24 6066261801 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.2767845614 Sep 01 08:37:46 AM UTC 24 Sep 01 08:40:18 AM UTC 24 164970183283 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.3501267347 Sep 01 08:40:01 AM UTC 24 Sep 01 08:40:22 AM UTC 24 4794082419 ps
T83 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.1224882272 Sep 01 08:34:56 AM UTC 24 Sep 01 08:40:32 AM UTC 24 497930005172 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.253997339 Sep 01 08:12:22 AM UTC 24 Sep 01 08:40:32 AM UTC 24 497198902869 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.396804271 Sep 01 08:36:44 AM UTC 24 Sep 01 08:40:42 AM UTC 24 163028001641 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.149135313 Sep 01 08:40:03 AM UTC 24 Sep 01 08:40:43 AM UTC 24 168545507457 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.1804048584 Sep 01 08:33:15 AM UTC 24 Sep 01 08:40:43 AM UTC 24 95228488175 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_stress_all.437394352 Sep 01 08:02:06 AM UTC 24 Sep 01 08:40:47 AM UTC 24 430294440975 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.2660957865 Sep 01 08:29:08 AM UTC 24 Sep 01 08:40:50 AM UTC 24 326457186148 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.2555229052 Sep 01 08:40:51 AM UTC 24 Sep 01 08:40:55 AM UTC 24 2235977669 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.3665366151 Sep 01 08:40:43 AM UTC 24 Sep 01 08:40:58 AM UTC 24 3173806645 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.752872143 Sep 01 08:40:59 AM UTC 24 Sep 01 08:41:01 AM UTC 24 455543244 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.657777621 Sep 01 08:41:02 AM UTC 24 Sep 01 08:41:15 AM UTC 24 5645982778 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.779186739 Sep 01 08:38:21 AM UTC 24 Sep 01 08:41:20 AM UTC 24 170311500406 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.983074261 Sep 01 08:34:23 AM UTC 24 Sep 01 08:41:20 AM UTC 24 234662973300 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.4286690084 Sep 01 08:40:43 AM UTC 24 Sep 01 08:41:35 AM UTC 24 40249882989 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.49890324 Sep 01 08:19:23 AM UTC 24 Sep 01 08:41:47 AM UTC 24 492999805697 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.3889953669 Sep 01 08:22:11 AM UTC 24 Sep 01 08:42:02 AM UTC 24 390929106112 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.1530940711 Sep 01 08:39:26 AM UTC 24 Sep 01 08:42:03 AM UTC 24 165177108946 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.2855322543 Sep 01 08:39:51 AM UTC 24 Sep 01 08:42:09 AM UTC 24 32856835594 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.2429871286 Sep 01 08:40:18 AM UTC 24 Sep 01 08:42:29 AM UTC 24 163471370433 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.3090253716 Sep 01 08:42:30 AM UTC 24 Sep 01 08:42:39 AM UTC 24 4745557215 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.1791530597 Sep 01 08:36:57 AM UTC 24 Sep 01 08:42:51 AM UTC 24 502261982340 ps
T286 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.2306837075 Sep 01 08:37:34 AM UTC 24 Sep 01 08:42:58 AM UTC 24 190707324827 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.3729489661 Sep 01 08:41:20 AM UTC 24 Sep 01 08:43:08 AM UTC 24 492357307575 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.2965303688 Sep 01 08:42:59 AM UTC 24 Sep 01 08:43:23 AM UTC 24 14761048958 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.851790999 Sep 01 08:32:39 AM UTC 24 Sep 01 08:43:23 AM UTC 24 590596698737 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.3598021028 Sep 01 08:43:24 AM UTC 24 Sep 01 08:43:27 AM UTC 24 305360814 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.3775978209 Sep 01 08:38:24 AM UTC 24 Sep 01 08:43:38 AM UTC 24 366037899476 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.2571092570 Sep 01 08:43:24 AM UTC 24 Sep 01 08:43:39 AM UTC 24 5830259700 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.3136853211 Sep 01 08:31:23 AM UTC 24 Sep 01 08:43:44 AM UTC 24 196542861060 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.3243354163 Sep 01 08:42:40 AM UTC 24 Sep 01 08:43:53 AM UTC 24 29138690904 ps
T330 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.3050286 Sep 01 08:42:04 AM UTC 24 Sep 01 08:44:24 AM UTC 24 177877008476 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.3116769466 Sep 01 08:40:23 AM UTC 24 Sep 01 08:44:31 AM UTC 24 372583108806 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.3075587326 Sep 01 08:39:38 AM UTC 24 Sep 01 08:44:46 AM UTC 24 482794572590 ps
T269 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.2824158650 Sep 01 08:41:47 AM UTC 24 Sep 01 08:44:57 AM UTC 24 177551277111 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.837327231 Sep 01 08:33:29 AM UTC 24 Sep 01 08:44:58 AM UTC 24 250026187286 ps
T320 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.1771668496 Sep 01 08:15:00 AM UTC 24 Sep 01 08:45:02 AM UTC 24 727903379192 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.2108047579 Sep 01 08:44:58 AM UTC 24 Sep 01 08:45:04 AM UTC 24 3975756509 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.3637954507 Sep 01 08:22:35 AM UTC 24 Sep 01 08:45:08 AM UTC 24 358419096075 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.3338484540 Sep 01 08:30:38 AM UTC 24 Sep 01 08:45:08 AM UTC 24 328131998051 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.286217007 Sep 01 08:45:09 AM UTC 24 Sep 01 08:45:11 AM UTC 24 442824840 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.779034328 Sep 01 08:36:22 AM UTC 24 Sep 01 08:45:19 AM UTC 24 96316483036 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.256225272 Sep 01 08:45:06 AM UTC 24 Sep 01 08:45:20 AM UTC 24 11193515225 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.141880177 Sep 01 08:45:12 AM UTC 24 Sep 01 08:45:23 AM UTC 24 5879869674 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.3759446204 Sep 01 08:39:46 AM UTC 24 Sep 01 08:45:23 AM UTC 24 459208763066 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.2412552621 Sep 01 08:26:12 AM UTC 24 Sep 01 08:45:23 AM UTC 24 429509248849 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.4026070368 Sep 01 08:43:45 AM UTC 24 Sep 01 08:45:28 AM UTC 24 164381534264 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.2326656389 Sep 01 08:40:32 AM UTC 24 Sep 01 08:45:29 AM UTC 24 166996013383 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.1624669347 Sep 01 08:29:42 AM UTC 24 Sep 01 08:45:41 AM UTC 24 325255576742 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.3781327860 Sep 01 08:35:08 AM UTC 24 Sep 01 08:45:53 AM UTC 24 198472557237 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.2329729322 Sep 01 08:45:53 AM UTC 24 Sep 01 08:45:58 AM UTC 24 3494389446 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.1252952133 Sep 01 08:37:46 AM UTC 24 Sep 01 08:46:09 AM UTC 24 122064004943 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.163422442 Sep 01 08:37:57 AM UTC 24 Sep 01 08:46:14 AM UTC 24 327559021148 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.3635691022 Sep 01 08:40:56 AM UTC 24 Sep 01 08:46:14 AM UTC 24 362717251988 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.4250957339 Sep 01 08:32:12 AM UTC 24 Sep 01 08:46:19 AM UTC 24 90743495260 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.2341134249 Sep 01 08:24:22 AM UTC 24 Sep 01 08:46:19 AM UTC 24 556639946404 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.937770163 Sep 01 08:46:20 AM UTC 24 Sep 01 08:46:22 AM UTC 24 423912062 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.3389428016 Sep 01 08:44:59 AM UTC 24 Sep 01 08:46:24 AM UTC 24 28777015563 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.3308912898 Sep 01 08:46:15 AM UTC 24 Sep 01 08:46:26 AM UTC 24 2147724386 ps
T348 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.1582355451 Sep 01 08:28:38 AM UTC 24 Sep 01 08:46:28 AM UTC 24 356952418762 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.1573536649 Sep 01 08:41:35 AM UTC 24 Sep 01 08:46:29 AM UTC 24 486380930333 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.2269552202 Sep 01 08:46:20 AM UTC 24 Sep 01 08:46:32 AM UTC 24 6055208303 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.3731251009 Sep 01 08:45:28 AM UTC 24 Sep 01 08:46:32 AM UTC 24 194783607500 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.2767279051 Sep 01 08:40:14 AM UTC 24 Sep 01 08:46:36 AM UTC 24 491413272200 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.2111381706 Sep 01 08:44:47 AM UTC 24 Sep 01 08:46:39 AM UTC 24 169896338396 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.510274137 Sep 01 08:37:13 AM UTC 24 Sep 01 08:46:44 AM UTC 24 592975526347 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2431752311 Sep 01 08:46:45 AM UTC 24 Sep 01 08:46:56 AM UTC 24 35057660780 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.2606478565 Sep 01 08:45:59 AM UTC 24 Sep 01 08:47:00 AM UTC 24 27086798026 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.3805975724 Sep 01 08:39:22 AM UTC 24 Sep 01 08:47:03 AM UTC 24 161255302143 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.2718851140 Sep 01 08:46:41 AM UTC 24 Sep 01 08:47:05 AM UTC 24 5212730896 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.1699962592 Sep 01 08:47:06 AM UTC 24 Sep 01 08:47:09 AM UTC 24 404501267 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.2509623325 Sep 01 08:43:27 AM UTC 24 Sep 01 08:47:17 AM UTC 24 162900823840 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.3104254577 Sep 01 08:47:01 AM UTC 24 Sep 01 08:47:34 AM UTC 24 6967376593 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.90326592 Sep 01 08:47:09 AM UTC 24 Sep 01 08:47:35 AM UTC 24 5644873915 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.3597447000 Sep 01 08:39:57 AM UTC 24 Sep 01 08:47:38 AM UTC 24 142640457283 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.748271111 Sep 01 08:41:21 AM UTC 24 Sep 01 08:47:41 AM UTC 24 490507541562 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.2744803997 Sep 01 08:45:41 AM UTC 24 Sep 01 08:48:18 AM UTC 24 164596094521 ps
T188 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.820381207 Sep 01 08:43:40 AM UTC 24 Sep 01 08:48:19 AM UTC 24 327911928019 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.3575788464 Sep 01 08:42:10 AM UTC 24 Sep 01 08:48:35 AM UTC 24 493745833362 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.23159006 Sep 01 08:46:25 AM UTC 24 Sep 01 08:48:37 AM UTC 24 163540095777 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.186879975 Sep 01 08:48:38 AM UTC 24 Sep 01 08:48:42 AM UTC 24 3960684912 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.3605375385 Sep 01 08:39:22 AM UTC 24 Sep 01 08:48:48 AM UTC 24 492369411951 ps
T290 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.4232748492 Sep 01 08:39:46 AM UTC 24 Sep 01 08:49:00 AM UTC 24 509273866257 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.1781193286 Sep 01 08:34:12 AM UTC 24 Sep 01 08:49:01 AM UTC 24 107181369381 ps
T308 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.160646718 Sep 01 08:38:21 AM UTC 24 Sep 01 08:49:06 AM UTC 24 324848153614 ps
T189 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.3119895816 Sep 01 08:49:00 AM UTC 24 Sep 01 08:49:06 AM UTC 24 3858097984 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.453826188 Sep 01 08:49:06 AM UTC 24 Sep 01 08:49:09 AM UTC 24 478517617 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.1260700365 Sep 01 08:49:06 AM UTC 24 Sep 01 08:49:13 AM UTC 24 5778100043 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3334796 Sep 01 08:48:43 AM UTC 24 Sep 01 08:49:32 AM UTC 24 42202312494 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.3710940417 Sep 01 08:40:32 AM UTC 24 Sep 01 08:49:45 AM UTC 24 593162567594 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.2088208889 Sep 01 08:45:24 AM UTC 24 Sep 01 08:49:49 AM UTC 24 325155736122 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.3373615171 Sep 01 08:18:30 AM UTC 24 Sep 01 08:49:54 AM UTC 24 517586364637 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3523118429 Sep 01 08:25:23 AM UTC 24 Sep 01 08:50:18 AM UTC 24 249069325333 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.1980524593 Sep 01 08:41:16 AM UTC 24 Sep 01 08:50:24 AM UTC 24 170315978692 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.2085976878 Sep 01 08:25:31 AM UTC 24 Sep 01 08:50:32 AM UTC 24 503434509853 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.2224034988 Sep 01 08:33:59 AM UTC 24 Sep 01 08:50:33 AM UTC 24 419270686511 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.3409714247 Sep 01 08:47:38 AM UTC 24 Sep 01 08:50:34 AM UTC 24 162151826520 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.3500648473 Sep 01 08:46:33 AM UTC 24 Sep 01 08:50:41 AM UTC 24 187206979473 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.2906997925 Sep 01 08:45:30 AM UTC 24 Sep 01 08:50:44 AM UTC 24 345599279418 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.3866831455 Sep 01 08:50:33 AM UTC 24 Sep 01 08:50:47 AM UTC 24 3040138102 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.752992732 Sep 01 08:50:48 AM UTC 24 Sep 01 08:50:51 AM UTC 24 303658234 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.580986505 Sep 01 08:50:52 AM UTC 24 Sep 01 08:51:01 AM UTC 24 5742126233 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.4078029350 Sep 01 08:50:42 AM UTC 24 Sep 01 08:51:01 AM UTC 24 1521610424 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.2409179708 Sep 01 08:46:29 AM UTC 24 Sep 01 08:51:31 AM UTC 24 505184029785 ps
T305 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.1413510333 Sep 01 08:22:14 AM UTC 24 Sep 01 08:51:32 AM UTC 24 581840298730 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.3954987278 Sep 01 08:50:34 AM UTC 24 Sep 01 08:51:33 AM UTC 24 33813789525 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.1312658854 Sep 01 08:29:18 AM UTC 24 Sep 01 08:51:36 AM UTC 24 492307238403 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.564531816 Sep 01 08:49:50 AM UTC 24 Sep 01 08:51:50 AM UTC 24 393576565859 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.1879645603 Sep 01 08:48:19 AM UTC 24 Sep 01 08:51:50 AM UTC 24 194866437794 ps
T218 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.2219891544 Sep 01 08:38:51 AM UTC 24 Sep 01 08:51:55 AM UTC 24 117837652537 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.3625392378 Sep 01 08:35:16 AM UTC 24 Sep 01 08:52:00 AM UTC 24 527542283050 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.2652689808 Sep 01 08:51:56 AM UTC 24 Sep 01 08:52:01 AM UTC 24 4508241629 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.3826514432 Sep 01 08:40:49 AM UTC 24 Sep 01 08:52:10 AM UTC 24 121681301294 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.1642301153 Sep 01 08:52:11 AM UTC 24 Sep 01 08:52:26 AM UTC 24 12291826013 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup_fixed.3719428031 Sep 01 08:49:55 AM UTC 24 Sep 01 08:52:30 AM UTC 24 395469606122 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.2958152001 Sep 01 08:52:01 AM UTC 24 Sep 01 08:52:33 AM UTC 24 29598415137 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.2908731993 Sep 01 08:52:31 AM UTC 24 Sep 01 08:52:34 AM UTC 24 482734111 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.3165547901 Sep 01 08:31:48 AM UTC 24 Sep 01 08:52:42 AM UTC 24 358674248737 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.3638695156 Sep 01 08:46:23 AM UTC 24 Sep 01 08:53:02 AM UTC 24 490857399617 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup_fixed.1820438390 Sep 01 08:51:37 AM UTC 24 Sep 01 08:53:12 AM UTC 24 201619423842 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.2809168429 Sep 01 08:48:20 AM UTC 24 Sep 01 08:53:17 AM UTC 24 586148553229 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.554902924 Sep 01 08:45:24 AM UTC 24 Sep 01 08:53:18 AM UTC 24 370547463955 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.3231772348 Sep 01 08:44:25 AM UTC 24 Sep 01 08:53:30 AM UTC 24 604033110756 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.2868592385 Sep 01 08:34:49 AM UTC 24 Sep 01 08:53:53 AM UTC 24 323106079670 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.3409500672 Sep 01 08:43:54 AM UTC 24 Sep 01 08:53:53 AM UTC 24 202812016194 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.3962280233 Sep 01 08:51:50 AM UTC 24 Sep 01 08:53:53 AM UTC 24 160376310950 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.314513838 Sep 01 08:36:56 AM UTC 24 Sep 01 08:53:56 AM UTC 24 487886458534 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.2217545851 Sep 01 08:51:32 AM UTC 24 Sep 01 08:53:59 AM UTC 24 490944937412 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.3663726983 Sep 01 08:51:02 AM UTC 24 Sep 01 08:54:00 AM UTC 24 171283212901 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.3545145301 Sep 01 08:45:09 AM UTC 24 Sep 01 08:54:00 AM UTC 24 174220315102 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.980468216 Sep 01 08:51:33 AM UTC 24 Sep 01 08:54:05 AM UTC 24 163330319075 ps
T219 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.4070186661 Sep 01 08:46:15 AM UTC 24 Sep 01 08:54:17 AM UTC 24 289567228906 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.3639630167 Sep 01 08:46:10 AM UTC 24 Sep 01 08:54:26 AM UTC 24 87213158736 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.3197194570 Sep 01 08:49:14 AM UTC 24 Sep 01 08:54:35 AM UTC 24 165217168984 ps
T242 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.2094009202 Sep 01 08:47:18 AM UTC 24 Sep 01 08:54:52 AM UTC 24 326872455305 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.3459874767 Sep 01 08:45:20 AM UTC 24 Sep 01 08:54:54 AM UTC 24 325915438996 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.3440930101 Sep 01 08:38:39 AM UTC 24 Sep 01 08:54:55 AM UTC 24 324643965520 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.851184236 Sep 01 08:36:35 AM UTC 24 Sep 01 08:55:05 AM UTC 24 340788555404 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.1255268025 Sep 01 08:52:27 AM UTC 24 Sep 01 08:55:13 AM UTC 24 170925889238 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.1318374316 Sep 01 08:29:33 AM UTC 24 Sep 01 08:55:19 AM UTC 24 489301360085 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.2477446832 Sep 01 08:49:33 AM UTC 24 Sep 01 08:55:58 AM UTC 24 165505661324 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.3946967352 Sep 01 08:29:45 AM UTC 24 Sep 01 08:56:01 AM UTC 24 599400262272 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.24523078 Sep 01 08:39:12 AM UTC 24 Sep 01 08:56:02 AM UTC 24 677892728787 ps
T221 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.1376329855 Sep 01 08:35:47 AM UTC 24 Sep 01 08:56:05 AM UTC 24 336401004000 ps
T309 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.1689955570 Sep 01 08:44:31 AM UTC 24 Sep 01 08:56:14 AM UTC 24 497398270257 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.1538795740 Sep 01 08:49:09 AM UTC 24 Sep 01 08:56:26 AM UTC 24 166048950398 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.4191679716 Sep 01 08:39:39 AM UTC 24 Sep 01 08:56:38 AM UTC 24 570760106068 ps
T310 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.3793850160 Sep 01 08:46:30 AM UTC 24 Sep 01 08:56:51 AM UTC 24 350431024466 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.3914680695 Sep 01 08:38:31 AM UTC 24 Sep 01 08:57:03 AM UTC 24 372592315961 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.2960951197 Sep 01 08:46:33 AM UTC 24 Sep 01 08:57:26 AM UTC 24 381764494541 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.242760694 Sep 01 08:33:40 AM UTC 24 Sep 01 08:57:40 AM UTC 24 485669977698 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.3618025510 Sep 01 08:50:35 AM UTC 24 Sep 01 08:58:10 AM UTC 24 101986588005 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.296419801 Sep 01 08:42:52 AM UTC 24 Sep 01 08:58:51 AM UTC 24 123703947298 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.932203977 Sep 01 08:43:39 AM UTC 24 Sep 01 08:58:53 AM UTC 24 337538642513 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.3976122736 Sep 01 08:45:02 AM UTC 24 Sep 01 08:59:03 AM UTC 24 97819499810 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.3767529407 Sep 01 08:50:24 AM UTC 24 Sep 01 08:59:16 AM UTC 24 166865252799 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.2406648572 Sep 01 08:32:35 AM UTC 24 Sep 01 08:59:26 AM UTC 24 488709627837 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.2174382735 Sep 01 08:51:51 AM UTC 24 Sep 01 08:59:54 AM UTC 24 489167059827 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.2423887757 Sep 01 08:50:19 AM UTC 24 Sep 01 08:59:55 AM UTC 24 360037557953 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all.2324540999 Sep 01 08:50:45 AM UTC 24 Sep 01 08:59:58 AM UTC 24 120290032188 ps
T220 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.4194633078 Sep 01 08:46:57 AM UTC 24 Sep 01 09:00:30 AM UTC 24 97542577803 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.3098993174 Sep 01 08:38:30 AM UTC 24 Sep 01 09:00:37 AM UTC 24 391879473462 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.1763395075 Sep 01 08:47:04 AM UTC 24 Sep 01 09:00:57 AM UTC 24 350772354923 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.695198562 Sep 01 08:33:44 AM UTC 24 Sep 01 09:01:04 AM UTC 24 539413483256 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.4183403900 Sep 01 08:52:02 AM UTC 24 Sep 01 09:01:06 AM UTC 24 116151098677 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.3234805000 Sep 01 08:47:42 AM UTC 24 Sep 01 09:01:09 AM UTC 24 370474985242 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.2839307534 Sep 01 08:39:42 AM UTC 24 Sep 01 09:01:22 AM UTC 24 585951830660 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.4066361371 Sep 01 08:49:46 AM UTC 24 Sep 01 09:01:48 AM UTC 24 497051332190 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.2407367813 Sep 01 08:48:49 AM UTC 24 Sep 01 09:01:52 AM UTC 24 102125421569 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.1670612608 Sep 01 08:45:24 AM UTC 24 Sep 01 09:01:58 AM UTC 24 495794755823 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.3324823154 Sep 01 08:34:50 AM UTC 24 Sep 01 09:02:08 AM UTC 24 486476246120 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.1882280089 Sep 01 08:42:03 AM UTC 24 Sep 01 09:02:23 AM UTC 24 392567803015 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.2535358729 Sep 01 08:46:27 AM UTC 24 Sep 01 09:03:00 AM UTC 24 323325668720 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.2066113874 Sep 01 08:46:37 AM UTC 24 Sep 01 09:03:43 AM UTC 24 322504668502 ps
T281 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.153743362 Sep 01 08:40:19 AM UTC 24 Sep 01 09:04:25 AM UTC 24 487967208711 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.1455376648 Sep 01 08:40:19 AM UTC 24 Sep 01 09:05:14 AM UTC 24 492720666099 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.1625688732 Sep 01 08:40:42 AM UTC 24 Sep 01 09:06:04 AM UTC 24 514956931901 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.2372911406 Sep 01 08:49:02 AM UTC 24 Sep 01 09:07:09 AM UTC 24 816871977692 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.814390674 Sep 01 08:45:21 AM UTC 24 Sep 01 09:09:48 AM UTC 24 490774960843 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_31/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.1334552153 Sep 01 08:47:35 AM UTC 24 Sep 01 09:09:51 AM UTC 24 491064855360 ps
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