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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.78 99.07 96.67 100.00 100.00 98.82 98.33 91.54


Total test records in report: 920
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T604 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.2920000471 Sep 24 07:33:14 AM UTC 24 Sep 24 07:47:51 AM UTC 24 494463628389 ps
T605 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.3338283302 Sep 24 07:47:47 AM UTC 24 Sep 24 07:47:53 AM UTC 24 6130970557 ps
T606 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.1953276846 Sep 24 07:44:38 AM UTC 24 Sep 24 07:48:04 AM UTC 24 330148603887 ps
T607 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.4094377960 Sep 24 07:47:13 AM UTC 24 Sep 24 07:48:08 AM UTC 24 23445908200 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.916755129 Sep 24 07:39:28 AM UTC 24 Sep 24 07:48:10 AM UTC 24 71199626736 ps
T608 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.321698005 Sep 24 07:45:59 AM UTC 24 Sep 24 07:48:19 AM UTC 24 161030695032 ps
T609 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.2799096079 Sep 24 07:48:20 AM UTC 24 Sep 24 07:48:25 AM UTC 24 3761897561 ps
T610 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.3093952827 Sep 24 07:24:43 AM UTC 24 Sep 24 07:48:26 AM UTC 24 498897974099 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.2485942238 Sep 24 07:40:55 AM UTC 24 Sep 24 07:48:29 AM UTC 24 70047696314 ps
T611 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.743220903 Sep 24 07:42:42 AM UTC 24 Sep 24 07:48:40 AM UTC 24 493628048496 ps
T612 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.2250301491 Sep 24 07:27:41 AM UTC 24 Sep 24 07:48:43 AM UTC 24 490108295938 ps
T613 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.2540444023 Sep 24 07:48:45 AM UTC 24 Sep 24 07:48:48 AM UTC 24 310933974 ps
T614 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.3186717123 Sep 24 07:48:29 AM UTC 24 Sep 24 07:48:56 AM UTC 24 9043960664 ps
T615 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.2376022803 Sep 24 07:48:49 AM UTC 24 Sep 24 07:48:57 AM UTC 24 5872590936 ps
T616 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.2817672791 Sep 24 07:41:49 AM UTC 24 Sep 24 07:48:59 AM UTC 24 335279101015 ps
T617 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.1392162270 Sep 24 07:46:52 AM UTC 24 Sep 24 07:49:10 AM UTC 24 321192409232 ps
T618 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.1670594789 Sep 24 07:48:25 AM UTC 24 Sep 24 07:49:21 AM UTC 24 37042566442 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.1548385232 Sep 24 07:37:40 AM UTC 24 Sep 24 07:49:24 AM UTC 24 526013988521 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.474962149 Sep 24 07:35:53 AM UTC 24 Sep 24 07:49:49 AM UTC 24 335372291639 ps
T619 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.2214342637 Sep 24 07:45:05 AM UTC 24 Sep 24 07:49:55 AM UTC 24 335057559435 ps
T620 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.2892188086 Sep 24 07:42:04 AM UTC 24 Sep 24 07:49:56 AM UTC 24 355495753973 ps
T213 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.2752260484 Sep 24 07:33:00 AM UTC 24 Sep 24 07:50:03 AM UTC 24 489448054759 ps
T621 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.3664736517 Sep 24 07:49:57 AM UTC 24 Sep 24 07:50:04 AM UTC 24 4303514349 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.466128829 Sep 24 07:44:30 AM UTC 24 Sep 24 07:50:05 AM UTC 24 333227977228 ps
T622 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.3613815752 Sep 24 07:49:50 AM UTC 24 Sep 24 07:50:37 AM UTC 24 166747895238 ps
T623 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.4125835010 Sep 24 07:50:06 AM UTC 24 Sep 24 07:50:39 AM UTC 24 6196935114 ps
T624 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.2178711386 Sep 24 07:50:40 AM UTC 24 Sep 24 07:50:42 AM UTC 24 459865665 ps
T625 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.3278143544 Sep 24 07:50:43 AM UTC 24 Sep 24 07:51:01 AM UTC 24 5988913026 ps
T626 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.3851768335 Sep 24 07:44:46 AM UTC 24 Sep 24 07:51:02 AM UTC 24 589325655737 ps
T627 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.306915895 Sep 24 07:50:03 AM UTC 24 Sep 24 07:51:23 AM UTC 24 27299275683 ps
T628 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.165868410 Sep 24 07:50:38 AM UTC 24 Sep 24 07:51:27 AM UTC 24 35774247617 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.652320708 Sep 24 07:31:16 AM UTC 24 Sep 24 07:51:30 AM UTC 24 495991895771 ps
T246 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.3078170530 Sep 24 07:40:07 AM UTC 24 Sep 24 07:51:42 AM UTC 24 490275051201 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.1915668551 Sep 24 07:38:42 AM UTC 24 Sep 24 07:51:43 AM UTC 24 524103118877 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.1774439819 Sep 24 07:48:11 AM UTC 24 Sep 24 07:51:43 AM UTC 24 332701172811 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.2589938647 Sep 24 07:48:08 AM UTC 24 Sep 24 07:51:45 AM UTC 24 566251724906 ps
T629 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.2562978718 Sep 24 07:49:25 AM UTC 24 Sep 24 07:51:47 AM UTC 24 408871652530 ps
T630 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.2060627565 Sep 24 07:51:45 AM UTC 24 Sep 24 07:51:52 AM UTC 24 3601286824 ps
T631 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.2069759705 Sep 24 07:46:59 AM UTC 24 Sep 24 07:51:57 AM UTC 24 171456628978 ps
T632 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.3199510503 Sep 24 07:30:24 AM UTC 24 Sep 24 07:51:57 AM UTC 24 510822638454 ps
T633 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.2674549857 Sep 24 07:48:58 AM UTC 24 Sep 24 07:51:58 AM UTC 24 156962107843 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.3743084152 Sep 24 07:43:28 AM UTC 24 Sep 24 07:51:58 AM UTC 24 87583226416 ps
T634 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.1634628358 Sep 24 07:51:59 AM UTC 24 Sep 24 07:52:01 AM UTC 24 289943134 ps
T635 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.2492175063 Sep 24 07:48:40 AM UTC 24 Sep 24 07:52:03 AM UTC 24 386343485073 ps
T636 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.2027451134 Sep 24 07:51:58 AM UTC 24 Sep 24 07:52:05 AM UTC 24 1687543681 ps
T637 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.1401513183 Sep 24 07:51:59 AM UTC 24 Sep 24 07:52:06 AM UTC 24 6012807221 ps
T638 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.4030515485 Sep 24 07:42:20 AM UTC 24 Sep 24 07:52:20 AM UTC 24 110306825017 ps
T639 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.1120779286 Sep 24 07:45:40 AM UTC 24 Sep 24 07:53:12 AM UTC 24 72291074549 ps
T640 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.3728448315 Sep 24 07:47:48 AM UTC 24 Sep 24 07:53:23 AM UTC 24 493414370987 ps
T641 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.2951587075 Sep 24 07:47:47 AM UTC 24 Sep 24 07:53:25 AM UTC 24 496142208977 ps
T642 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.2494103940 Sep 24 07:53:24 AM UTC 24 Sep 24 07:53:35 AM UTC 24 179876405287 ps
T643 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.2634871768 Sep 24 07:51:43 AM UTC 24 Sep 24 07:53:37 AM UTC 24 177418223258 ps
T644 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.4191862904 Sep 24 07:53:36 AM UTC 24 Sep 24 07:53:41 AM UTC 24 2785547576 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.1273153995 Sep 24 07:46:38 AM UTC 24 Sep 24 07:53:44 AM UTC 24 521784041891 ps
T645 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.1870976599 Sep 24 07:53:44 AM UTC 24 Sep 24 07:53:53 AM UTC 24 1252594049 ps
T646 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.1110128037 Sep 24 07:51:48 AM UTC 24 Sep 24 07:53:58 AM UTC 24 33057824905 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.3669538988 Sep 24 07:30:27 AM UTC 24 Sep 24 07:54:02 AM UTC 24 527160483635 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.2724541732 Sep 24 07:53:59 AM UTC 24 Sep 24 07:54:02 AM UTC 24 361539540 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.2955244680 Sep 24 07:38:48 AM UTC 24 Sep 24 07:54:14 AM UTC 24 326104213177 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.445891235 Sep 24 07:51:24 AM UTC 24 Sep 24 07:54:15 AM UTC 24 170517472751 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.3541149581 Sep 24 07:54:02 AM UTC 24 Sep 24 07:54:26 AM UTC 24 5951616851 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.1818371936 Sep 24 07:46:38 AM UTC 24 Sep 24 07:54:33 AM UTC 24 330359450024 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.122265976 Sep 24 07:40:08 AM UTC 24 Sep 24 07:55:00 AM UTC 24 326873884265 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.831793682 Sep 24 07:52:03 AM UTC 24 Sep 24 07:55:01 AM UTC 24 167159883622 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.2887718553 Sep 24 07:47:52 AM UTC 24 Sep 24 07:55:06 AM UTC 24 163760744747 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.2094333010 Sep 24 07:53:38 AM UTC 24 Sep 24 07:55:08 AM UTC 24 26499307576 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.2846365910 Sep 24 07:52:06 AM UTC 24 Sep 24 07:55:10 AM UTC 24 161049971305 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.2835187583 Sep 24 07:55:09 AM UTC 24 Sep 24 07:55:17 AM UTC 24 2930615735 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.3249653451 Sep 24 07:49:11 AM UTC 24 Sep 24 07:55:33 AM UTC 24 492950111245 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.361933371 Sep 24 07:48:05 AM UTC 24 Sep 24 07:55:45 AM UTC 24 194261207643 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.2910590453 Sep 24 07:46:04 AM UTC 24 Sep 24 07:55:47 AM UTC 24 166044943373 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.3893159476 Sep 24 07:55:34 AM UTC 24 Sep 24 07:55:49 AM UTC 24 5980098715 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.1930672743 Sep 24 07:27:42 AM UTC 24 Sep 24 07:55:50 AM UTC 24 547812410065 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.2106608160 Sep 24 07:55:48 AM UTC 24 Sep 24 07:55:51 AM UTC 24 476361431 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.412298067 Sep 24 07:47:16 AM UTC 24 Sep 24 07:55:52 AM UTC 24 86415354295 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.1290737453 Sep 24 07:41:56 AM UTC 24 Sep 24 07:55:53 AM UTC 24 358695951515 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.2868880262 Sep 24 07:49:00 AM UTC 24 Sep 24 07:56:00 AM UTC 24 168583201527 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.828609822 Sep 24 07:55:50 AM UTC 24 Sep 24 07:56:07 AM UTC 24 5901074466 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.133855132 Sep 24 07:47:27 AM UTC 24 Sep 24 07:56:07 AM UTC 24 180043316478 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.4243167051 Sep 24 07:33:14 AM UTC 24 Sep 24 07:56:08 AM UTC 24 493586440504 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.2389807116 Sep 24 07:51:02 AM UTC 24 Sep 24 07:56:10 AM UTC 24 488770558338 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.2018959859 Sep 24 07:44:46 AM UTC 24 Sep 24 07:56:12 AM UTC 24 527796794896 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.2936253891 Sep 24 07:27:29 AM UTC 24 Sep 24 07:56:13 AM UTC 24 470026756917 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.717397086 Sep 24 07:56:11 AM UTC 24 Sep 24 07:56:21 AM UTC 24 3865309022 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.3838671713 Sep 24 07:55:10 AM UTC 24 Sep 24 07:56:55 AM UTC 24 29407043370 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.4264581077 Sep 24 07:49:22 AM UTC 24 Sep 24 07:57:00 AM UTC 24 391731635562 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.1971158651 Sep 24 07:31:01 AM UTC 24 Sep 24 07:57:01 AM UTC 24 420643752763 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.3275755835 Sep 24 07:55:01 AM UTC 24 Sep 24 07:57:02 AM UTC 24 205922802874 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.2314087733 Sep 24 07:57:01 AM UTC 24 Sep 24 07:57:05 AM UTC 24 418505461 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.2098793157 Sep 24 07:55:52 AM UTC 24 Sep 24 07:57:12 AM UTC 24 322457961675 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.3163285952 Sep 24 07:56:22 AM UTC 24 Sep 24 07:57:13 AM UTC 24 86127477017 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.804657803 Sep 24 07:56:09 AM UTC 24 Sep 24 07:57:14 AM UTC 24 164258450598 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.2674785586 Sep 24 07:51:31 AM UTC 24 Sep 24 07:57:15 AM UTC 24 555889664527 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.1672252514 Sep 24 07:35:09 AM UTC 24 Sep 24 07:57:16 AM UTC 24 492437718716 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_stress_all.2363501005 Sep 24 07:01:34 AM UTC 24 Sep 24 07:57:22 AM UTC 24 1760353084764 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.1757653149 Sep 24 07:57:02 AM UTC 24 Sep 24 07:57:22 AM UTC 24 5726651764 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.3198392065 Sep 24 07:56:08 AM UTC 24 Sep 24 07:57:27 AM UTC 24 196392801688 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.221363422 Sep 24 07:57:23 AM UTC 24 Sep 24 07:57:35 AM UTC 24 3875173329 ps
T346 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.3944877147 Sep 24 07:53:53 AM UTC 24 Sep 24 07:57:42 AM UTC 24 336667139129 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.3183526515 Sep 24 07:56:01 AM UTC 24 Sep 24 07:57:47 AM UTC 24 173184989965 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.3389333268 Sep 24 07:56:13 AM UTC 24 Sep 24 07:57:47 AM UTC 24 28162013361 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.904771024 Sep 24 07:57:48 AM UTC 24 Sep 24 07:57:50 AM UTC 24 398142173 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.2618774675 Sep 24 07:57:43 AM UTC 24 Sep 24 07:57:52 AM UTC 24 961501344 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.1021699154 Sep 24 07:55:07 AM UTC 24 Sep 24 07:57:55 AM UTC 24 182117367587 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.2357033486 Sep 24 07:48:57 AM UTC 24 Sep 24 07:58:03 AM UTC 24 161901397204 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.234664111 Sep 24 07:57:51 AM UTC 24 Sep 24 07:58:04 AM UTC 24 5646691969 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.1752750666 Sep 24 07:29:41 AM UTC 24 Sep 24 07:58:06 AM UTC 24 637312953382 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.2345101145 Sep 24 07:50:04 AM UTC 24 Sep 24 07:58:08 AM UTC 24 73917207882 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.2049108872 Sep 24 07:40:42 AM UTC 24 Sep 24 07:58:17 AM UTC 24 553509066158 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.2860700072 Sep 24 07:46:40 AM UTC 24 Sep 24 07:58:18 AM UTC 24 202421645562 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.93391932 Sep 24 07:54:26 AM UTC 24 Sep 24 07:58:22 AM UTC 24 168775198109 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.1933855134 Sep 24 07:58:23 AM UTC 24 Sep 24 07:58:31 AM UTC 24 4836543873 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.247623551 Sep 24 07:43:15 AM UTC 24 Sep 24 07:58:33 AM UTC 24 337279230487 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.3187875674 Sep 24 07:46:12 AM UTC 24 Sep 24 07:58:34 AM UTC 24 324964709805 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.2082996637 Sep 24 07:57:48 AM UTC 24 Sep 24 07:58:42 AM UTC 24 164736402341 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.561667105 Sep 24 07:58:34 AM UTC 24 Sep 24 07:58:44 AM UTC 24 6663310365 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.3755160095 Sep 24 07:58:45 AM UTC 24 Sep 24 07:58:48 AM UTC 24 447547258 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.1681241472 Sep 24 07:58:48 AM UTC 24 Sep 24 07:58:52 AM UTC 24 6086666643 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.1140157125 Sep 24 07:57:15 AM UTC 24 Sep 24 07:58:52 AM UTC 24 170259102217 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.2320157102 Sep 24 07:43:11 AM UTC 24 Sep 24 07:58:59 AM UTC 24 588719772386 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.1680217659 Sep 24 07:57:28 AM UTC 24 Sep 24 07:59:06 AM UTC 24 23175622169 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.3910085780 Sep 24 07:56:08 AM UTC 24 Sep 24 07:59:09 AM UTC 24 199098034405 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.3565620032 Sep 24 07:37:10 AM UTC 24 Sep 24 07:59:09 AM UTC 24 500274216027 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.3137863795 Sep 24 07:55:50 AM UTC 24 Sep 24 07:59:26 AM UTC 24 327878768182 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.1943867941 Sep 24 07:52:07 AM UTC 24 Sep 24 07:59:32 AM UTC 24 497188892779 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.316974283 Sep 24 07:57:12 AM UTC 24 Sep 24 07:59:45 AM UTC 24 158890130418 ps
T217 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.2211703879 Sep 24 07:48:26 AM UTC 24 Sep 24 07:59:45 AM UTC 24 108488306589 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.967997594 Sep 24 07:35:10 AM UTC 24 Sep 24 07:59:46 AM UTC 24 497250079797 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.3230542360 Sep 24 07:55:51 AM UTC 24 Sep 24 07:59:51 AM UTC 24 161034810731 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.1674613852 Sep 24 07:59:46 AM UTC 24 Sep 24 07:59:53 AM UTC 24 5191246983 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.1944697257 Sep 24 07:51:03 AM UTC 24 Sep 24 07:59:58 AM UTC 24 165728264907 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.204531499 Sep 24 07:59:59 AM UTC 24 Sep 24 08:00:02 AM UTC 24 443183148 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.2494029710 Sep 24 07:59:52 AM UTC 24 Sep 24 08:00:03 AM UTC 24 21851530048 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.4225272001 Sep 24 07:58:19 AM UTC 24 Sep 24 08:00:04 AM UTC 24 166278631160 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.894886123 Sep 24 07:58:18 AM UTC 24 Sep 24 08:00:17 AM UTC 24 166780648040 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.1129174945 Sep 24 07:59:46 AM UTC 24 Sep 24 08:00:25 AM UTC 24 36465132268 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.3035638393 Sep 24 08:00:06 AM UTC 24 Sep 24 08:00:30 AM UTC 24 5741515049 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.95194514 Sep 24 07:47:54 AM UTC 24 Sep 24 08:00:34 AM UTC 24 525551767631 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.1949025237 Sep 24 07:58:31 AM UTC 24 Sep 24 08:00:56 AM UTC 24 38636401438 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.2307049394 Sep 24 07:59:00 AM UTC 24 Sep 24 08:01:36 AM UTC 24 162001506825 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.3971541213 Sep 24 07:51:42 AM UTC 24 Sep 24 08:01:42 AM UTC 24 401706172125 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.825678851 Sep 24 08:01:42 AM UTC 24 Sep 24 08:01:49 AM UTC 24 4580095684 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.948845145 Sep 24 08:00:26 AM UTC 24 Sep 24 08:02:09 AM UTC 24 163582519773 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2738050140 Sep 24 08:01:50 AM UTC 24 Sep 24 08:02:20 AM UTC 24 41969043968 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.753107693 Sep 24 07:54:03 AM UTC 24 Sep 24 08:02:36 AM UTC 24 335696250365 ps
T83 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.2391006321 Sep 24 08:02:22 AM UTC 24 Sep 24 08:02:39 AM UTC 24 5732946237 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.1840542110 Sep 24 08:02:40 AM UTC 24 Sep 24 08:02:42 AM UTC 24 286312153 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.3419693074 Sep 24 07:53:27 AM UTC 24 Sep 24 08:02:54 AM UTC 24 328927771279 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.2793898518 Sep 24 08:02:43 AM UTC 24 Sep 24 08:03:06 AM UTC 24 5811323127 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.3555105651 Sep 24 07:59:07 AM UTC 24 Sep 24 08:03:15 AM UTC 24 326846494262 ps
T221 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.1335152422 Sep 24 07:55:18 AM UTC 24 Sep 24 08:03:15 AM UTC 24 90952183875 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.121721165 Sep 24 07:57:36 AM UTC 24 Sep 24 08:03:28 AM UTC 24 70041379621 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.4290343939 Sep 24 08:00:07 AM UTC 24 Sep 24 08:03:34 AM UTC 24 330291917667 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.3119729961 Sep 24 07:57:14 AM UTC 24 Sep 24 08:03:35 AM UTC 24 494908585957 ps
T203 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.2964545835 Sep 24 07:57:17 AM UTC 24 Sep 24 08:03:36 AM UTC 24 524178608871 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2061320977 Sep 24 07:40:33 AM UTC 24 Sep 24 08:04:03 AM UTC 24 497635324960 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.1028208895 Sep 24 07:51:28 AM UTC 24 Sep 24 08:04:06 AM UTC 24 332493628816 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.686693615 Sep 24 08:04:04 AM UTC 24 Sep 24 08:04:23 AM UTC 24 3821714720 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.3161269049 Sep 24 07:38:26 AM UTC 24 Sep 24 08:04:27 AM UTC 24 500855718926 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.1582950556 Sep 24 08:04:08 AM UTC 24 Sep 24 08:04:44 AM UTC 24 33016614935 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.844016933 Sep 24 08:04:28 AM UTC 24 Sep 24 08:04:47 AM UTC 24 11792637482 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.3120715345 Sep 24 08:04:48 AM UTC 24 Sep 24 08:04:50 AM UTC 24 308972467 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.2571287497 Sep 24 08:04:51 AM UTC 24 Sep 24 08:05:06 AM UTC 24 5702296034 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.1906603752 Sep 24 07:57:56 AM UTC 24 Sep 24 08:05:09 AM UTC 24 329687438520 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.4289344387 Sep 24 07:54:34 AM UTC 24 Sep 24 08:05:22 AM UTC 24 174049017987 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.2188842913 Sep 24 07:43:01 AM UTC 24 Sep 24 08:05:29 AM UTC 24 517459220918 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.3107309473 Sep 24 07:43:15 AM UTC 24 Sep 24 08:05:30 AM UTC 24 556753689718 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.3826937589 Sep 24 08:02:54 AM UTC 24 Sep 24 08:05:52 AM UTC 24 327017506995 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.594234502 Sep 24 07:51:54 AM UTC 24 Sep 24 08:05:59 AM UTC 24 125871675737 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.3205123133 Sep 24 07:59:10 AM UTC 24 Sep 24 08:06:03 AM UTC 24 611265883322 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.143824976 Sep 24 08:00:57 AM UTC 24 Sep 24 08:06:04 AM UTC 24 336787494774 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.2241240354 Sep 24 08:01:36 AM UTC 24 Sep 24 08:06:05 AM UTC 24 327218858737 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.2860841456 Sep 24 08:02:09 AM UTC 24 Sep 24 08:06:13 AM UTC 24 70029228074 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.2219886601 Sep 24 07:45:50 AM UTC 24 Sep 24 08:06:21 AM UTC 24 498217073809 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.3353117945 Sep 24 08:06:05 AM UTC 24 Sep 24 08:06:26 AM UTC 24 4660579917 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.2920356539 Sep 24 07:42:46 AM UTC 24 Sep 24 08:06:29 AM UTC 24 497926065373 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.1800933542 Sep 24 08:06:29 AM UTC 24 Sep 24 08:06:32 AM UTC 24 388940489 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.326463151 Sep 24 08:06:33 AM UTC 24 Sep 24 08:06:39 AM UTC 24 5706834562 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.2804717365 Sep 24 08:06:22 AM UTC 24 Sep 24 08:06:46 AM UTC 24 6736304357 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.2926796367 Sep 24 07:53:42 AM UTC 24 Sep 24 08:07:01 AM UTC 24 87095569897 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.2011652975 Sep 24 08:00:31 AM UTC 24 Sep 24 08:07:07 AM UTC 24 188493662829 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.1286589113 Sep 24 08:05:10 AM UTC 24 Sep 24 08:07:10 AM UTC 24 335109621171 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.4113541907 Sep 24 07:51:58 AM UTC 24 Sep 24 08:07:31 AM UTC 24 474750835485 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.1522062394 Sep 24 07:44:02 AM UTC 24 Sep 24 08:07:36 AM UTC 24 476634023590 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3115810103 Sep 24 07:39:42 AM UTC 24 Sep 24 08:07:40 AM UTC 24 665288126978 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.904400400 Sep 24 07:59:46 AM UTC 24 Sep 24 08:07:53 AM UTC 24 119457290621 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.3071020014 Sep 24 07:59:10 AM UTC 24 Sep 24 08:07:54 AM UTC 24 206111242395 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.2152348230 Sep 24 08:07:54 AM UTC 24 Sep 24 08:08:01 AM UTC 24 4043056583 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.1963497638 Sep 24 08:06:06 AM UTC 24 Sep 24 08:08:02 AM UTC 24 38205205744 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.249581308 Sep 24 08:08:03 AM UTC 24 Sep 24 08:08:18 AM UTC 24 2414396555 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.681921923 Sep 24 08:05:07 AM UTC 24 Sep 24 08:08:18 AM UTC 24 166356893994 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.2597597460 Sep 24 08:08:19 AM UTC 24 Sep 24 08:08:23 AM UTC 24 506676341 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.3208710650 Sep 24 08:00:18 AM UTC 24 Sep 24 08:08:24 AM UTC 24 161926205415 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.3891021625 Sep 24 07:56:14 AM UTC 24 Sep 24 08:08:33 AM UTC 24 128152696411 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.4171091433 Sep 24 08:04:25 AM UTC 24 Sep 24 08:08:33 AM UTC 24 63101691846 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.1089370469 Sep 24 08:00:35 AM UTC 24 Sep 24 08:08:39 AM UTC 24 601560971247 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.524745836 Sep 24 08:00:07 AM UTC 24 Sep 24 08:08:52 AM UTC 24 496312971305 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.1929200676 Sep 24 07:58:52 AM UTC 24 Sep 24 08:09:00 AM UTC 24 164578395555 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.2193026674 Sep 24 07:58:05 AM UTC 24 Sep 24 08:09:00 AM UTC 24 168070271530 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.1236612000 Sep 24 08:08:18 AM UTC 24 Sep 24 08:09:24 AM UTC 24 173174720489 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.650063836 Sep 24 08:07:55 AM UTC 24 Sep 24 08:09:26 AM UTC 24 36047570749 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.2100689297 Sep 24 08:04:45 AM UTC 24 Sep 24 08:09:30 AM UTC 24 377220798093 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.4264949714 Sep 24 08:03:35 AM UTC 24 Sep 24 08:09:32 AM UTC 24 163820427849 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.1307342184 Sep 24 08:07:11 AM UTC 24 Sep 24 08:09:55 AM UTC 24 380387803734 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.2298865407 Sep 24 07:52:02 AM UTC 24 Sep 24 08:10:06 AM UTC 24 327662485729 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.4024412688 Sep 24 07:51:44 AM UTC 24 Sep 24 08:10:17 AM UTC 24 358851412712 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.31015325 Sep 24 08:03:15 AM UTC 24 Sep 24 08:10:21 AM UTC 24 161096357046 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.3495221875 Sep 24 07:57:03 AM UTC 24 Sep 24 08:10:22 AM UTC 24 328371045336 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.58929406 Sep 24 07:58:09 AM UTC 24 Sep 24 08:10:24 AM UTC 24 591840001682 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.2223799298 Sep 24 08:06:04 AM UTC 24 Sep 24 08:10:55 AM UTC 24 361609427279 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.793170233 Sep 24 08:02:37 AM UTC 24 Sep 24 08:11:03 AM UTC 24 218491572776 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.2802984574 Sep 24 07:58:34 AM UTC 24 Sep 24 08:11:06 AM UTC 24 132091172987 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.3883982799 Sep 24 07:55:53 AM UTC 24 Sep 24 08:11:10 AM UTC 24 489366061126 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.1400191874 Sep 24 08:03:28 AM UTC 24 Sep 24 08:11:12 AM UTC 24 370387798360 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.1904999323 Sep 24 07:57:52 AM UTC 24 Sep 24 08:11:17 AM UTC 24 498050518295 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.2641220350 Sep 24 08:03:36 AM UTC 24 Sep 24 08:11:32 AM UTC 24 380314420449 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.2177488692 Sep 24 08:06:40 AM UTC 24 Sep 24 08:11:52 AM UTC 24 329543809891 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.1168858021 Sep 24 08:05:23 AM UTC 24 Sep 24 08:12:10 AM UTC 24 486953105936 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.3106000849 Sep 24 08:03:34 AM UTC 24 Sep 24 08:12:22 AM UTC 24 200237591979 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.1107333788 Sep 24 07:56:56 AM UTC 24 Sep 24 08:12:33 AM UTC 24 636942866127 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.2054136977 Sep 24 08:06:47 AM UTC 24 Sep 24 08:12:54 AM UTC 24 488951828919 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.1486554123 Sep 24 07:47:52 AM UTC 24 Sep 24 08:13:00 AM UTC 24 492622258255 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.3099344314 Sep 24 07:53:13 AM UTC 24 Sep 24 08:13:04 AM UTC 24 398416570922 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.1764338538 Sep 24 08:03:07 AM UTC 24 Sep 24 08:13:11 AM UTC 24 484700951163 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.3654210500 Sep 24 07:58:42 AM UTC 24 Sep 24 08:13:28 AM UTC 24 372598783502 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.850470174 Sep 24 08:05:31 AM UTC 24 Sep 24 08:13:35 AM UTC 24 558068253364 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.3083897076 Sep 24 08:06:14 AM UTC 24 Sep 24 08:13:39 AM UTC 24 78636593053 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.2250858352 Sep 24 07:54:15 AM UTC 24 Sep 24 08:13:46 AM UTC 24 490591786750 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.2913061306 Sep 24 08:07:07 AM UTC 24 Sep 24 08:14:05 AM UTC 24 327688242221 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.4069117738 Sep 24 07:52:21 AM UTC 24 Sep 24 08:14:57 AM UTC 24 457672893504 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.3730563456 Sep 24 07:58:06 AM UTC 24 Sep 24 08:15:18 AM UTC 24 495135126491 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.4194945082 Sep 24 07:59:27 AM UTC 24 Sep 24 08:15:53 AM UTC 24 317930189583 ps
T257 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.822815277 Sep 24 08:07:41 AM UTC 24 Sep 24 08:15:54 AM UTC 24 509444070435 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.1807200448 Sep 24 07:55:02 AM UTC 24 Sep 24 08:16:01 AM UTC 24 490239640327 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.3516334177 Sep 24 07:49:55 AM UTC 24 Sep 24 08:16:17 AM UTC 24 570351389216 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.2609254997 Sep 24 07:59:54 AM UTC 24 Sep 24 08:16:27 AM UTC 24 423573363237 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.995340581 Sep 24 07:57:16 AM UTC 24 Sep 24 08:16:28 AM UTC 24 395678016413 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.1390040422 Sep 24 07:57:23 AM UTC 24 Sep 24 08:16:32 AM UTC 24 355128716810 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.126370148 Sep 24 08:05:30 AM UTC 24 Sep 24 08:16:52 AM UTC 24 489093535451 ps
T291 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.2540664816 Sep 24 08:06:01 AM UTC 24 Sep 24 08:17:25 AM UTC 24 564499850090 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.1043030624 Sep 24 08:08:02 AM UTC 24 Sep 24 08:17:35 AM UTC 24 121400690665 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.3016436876 Sep 24 07:54:15 AM UTC 24 Sep 24 08:18:03 AM UTC 24 497156173364 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.3990239960 Sep 24 07:58:53 AM UTC 24 Sep 24 08:18:29 AM UTC 24 479844589630 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.3031994008 Sep 24 07:42:29 AM UTC 24 Sep 24 08:18:44 AM UTC 24 604974588572 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.231861774 Sep 24 07:57:05 AM UTC 24 Sep 24 08:18:52 AM UTC 24 485881557085 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.711121269 Sep 24 08:03:16 AM UTC 24 Sep 24 08:19:50 AM UTC 24 494879498609 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.3393894107 Sep 24 08:07:37 AM UTC 24 Sep 24 08:22:40 AM UTC 24 330838647058 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.262747580 Sep 24 07:59:33 AM UTC 24 Sep 24 08:23:53 AM UTC 24 531840648010 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.3046656699 Sep 24 07:58:07 AM UTC 24 Sep 24 08:23:53 AM UTC 24 554804225496 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_23/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.2304503931 Sep 24 07:55:45 AM UTC 24 Sep 24 08:25:30 AM UTC 24 679198213969 ps
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