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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.70 99.07 96.67 100.00 100.00 98.82 98.33 90.99


Total test records in report: 917
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T194 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.1313113860 Oct 12 01:32:38 AM UTC 24 Oct 12 01:36:40 AM UTC 24 331859072117 ps
T366 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_fsm_reset.1157044442 Oct 12 01:26:56 AM UTC 24 Oct 12 01:36:48 AM UTC 24 133832704922 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.1975184586 Oct 12 01:36:41 AM UTC 24 Oct 12 01:36:57 AM UTC 24 3073924231 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.4037820409 Oct 12 01:31:35 AM UTC 24 Oct 12 01:37:03 AM UTC 24 477665368705 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.2100943054 Oct 12 01:32:43 AM UTC 24 Oct 12 01:37:07 AM UTC 24 397437726478 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.1527735678 Oct 12 01:37:04 AM UTC 24 Oct 12 01:37:16 AM UTC 24 2810606714 ps
T89 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.2600948978 Oct 12 01:37:17 AM UTC 24 Oct 12 01:37:20 AM UTC 24 338341046 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.4225646981 Oct 12 01:34:36 AM UTC 24 Oct 12 01:37:24 AM UTC 24 393126470881 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.2182975684 Oct 12 01:37:21 AM UTC 24 Oct 12 01:37:29 AM UTC 24 6168583929 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.3821704411 Oct 12 01:36:49 AM UTC 24 Oct 12 01:37:38 AM UTC 24 23744380966 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.1370844705 Oct 12 01:32:06 AM UTC 24 Oct 12 01:37:45 AM UTC 24 214318860670 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled_fixed.686169407 Oct 12 01:31:35 AM UTC 24 Oct 12 01:37:45 AM UTC 24 332945175800 ps
T95 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.3977266676 Oct 12 01:32:39 AM UTC 24 Oct 12 01:37:48 AM UTC 24 330492256932 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled_fixed.2846871157 Oct 12 01:29:21 AM UTC 24 Oct 12 01:37:56 AM UTC 24 484814886204 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled_fixed.185081430 Oct 12 01:25:34 AM UTC 24 Oct 12 01:38:11 AM UTC 24 330511060430 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.3758589633 Oct 12 01:35:50 AM UTC 24 Oct 12 01:38:16 AM UTC 24 156347819764 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.3322012744 Oct 12 01:38:17 AM UTC 24 Oct 12 01:38:23 AM UTC 24 3939553615 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled_fixed.2718376760 Oct 12 01:28:45 AM UTC 24 Oct 12 01:38:25 AM UTC 24 173882423160 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup.4022563461 Oct 12 01:14:08 AM UTC 24 Oct 12 01:38:40 AM UTC 24 572337383884 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_clock_gating.1096288808 Oct 12 01:13:57 AM UTC 24 Oct 12 01:38:42 AM UTC 24 492789845295 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.996263573 Oct 12 01:38:41 AM UTC 24 Oct 12 01:38:46 AM UTC 24 3377188689 ps
T470 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.1936578576 Oct 12 01:35:56 AM UTC 24 Oct 12 01:38:46 AM UTC 24 164353219516 ps
T53 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.764385278 Oct 12 01:29:06 AM UTC 24 Oct 12 01:38:48 AM UTC 24 96404020967 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.1310918886 Oct 12 01:38:47 AM UTC 24 Oct 12 01:38:50 AM UTC 24 517661767 ps
T472 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.4192688760 Oct 12 01:38:47 AM UTC 24 Oct 12 01:38:53 AM UTC 24 5879894543 ps
T473 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.2946784556 Oct 12 01:34:20 AM UTC 24 Oct 12 01:38:54 AM UTC 24 327710177822 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/1.adc_ctrl_filters_wakeup_fixed.2810543656 Oct 12 01:13:56 AM UTC 24 Oct 12 01:38:59 AM UTC 24 603474916707 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.3898502400 Oct 12 01:37:08 AM UTC 24 Oct 12 01:39:00 AM UTC 24 172072130395 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_both.4175150865 Oct 12 01:29:03 AM UTC 24 Oct 12 01:39:03 AM UTC 24 512982639624 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.1531847929 Oct 12 01:29:30 AM UTC 24 Oct 12 01:39:08 AM UTC 24 346345548832 ps
T206 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.3395017121 Oct 12 01:37:57 AM UTC 24 Oct 12 01:39:24 AM UTC 24 208931959511 ps
T475 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.2108148443 Oct 12 01:39:25 AM UTC 24 Oct 12 01:39:32 AM UTC 24 4559207863 ps
T476 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.1399019693 Oct 12 01:31:38 AM UTC 24 Oct 12 01:39:37 AM UTC 24 167977839408 ps
T477 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.4139442509 Oct 12 01:37:48 AM UTC 24 Oct 12 01:39:45 AM UTC 24 399876624206 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.570300037 Oct 12 01:38:24 AM UTC 24 Oct 12 01:39:45 AM UTC 24 33248977719 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.4292293804 Oct 12 01:23:36 AM UTC 24 Oct 12 01:39:51 AM UTC 24 348158024830 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3606012159 Oct 12 01:39:52 AM UTC 24 Oct 12 01:39:55 AM UTC 24 337380237 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.1850657043 Oct 12 01:39:56 AM UTC 24 Oct 12 01:40:04 AM UTC 24 5926442764 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.2509061760 Oct 12 01:39:46 AM UTC 24 Oct 12 01:40:07 AM UTC 24 10003521371 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt.3686980597 Oct 12 01:30:46 AM UTC 24 Oct 12 01:40:17 AM UTC 24 494637763312 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.3267630937 Oct 12 01:28:21 AM UTC 24 Oct 12 01:40:22 AM UTC 24 127588488319 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.493175632 Oct 12 01:35:32 AM UTC 24 Oct 12 01:40:36 AM UTC 24 329138049350 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.2285060282 Oct 12 01:32:39 AM UTC 24 Oct 12 01:40:45 AM UTC 24 326119313999 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.235772691 Oct 12 01:39:33 AM UTC 24 Oct 12 01:40:57 AM UTC 24 38283252373 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.1941471652 Oct 12 01:34:19 AM UTC 24 Oct 12 01:41:02 AM UTC 24 166856454419 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.2883629407 Oct 12 01:40:22 AM UTC 24 Oct 12 01:41:08 AM UTC 24 164654018324 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.832937102 Oct 12 01:41:09 AM UTC 24 Oct 12 01:41:28 AM UTC 24 4352773828 ps
T212 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.16675357 Oct 12 01:36:16 AM UTC 24 Oct 12 01:41:29 AM UTC 24 168454184029 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_stress_all.1962523892 Oct 12 01:29:13 AM UTC 24 Oct 12 01:41:38 AM UTC 24 126082682633 ps
T487 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.878170203 Oct 12 01:37:30 AM UTC 24 Oct 12 01:41:50 AM UTC 24 329760263894 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.2772640264 Oct 12 01:41:39 AM UTC 24 Oct 12 01:41:54 AM UTC 24 6125474243 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.3863046427 Oct 12 01:41:54 AM UTC 24 Oct 12 01:41:58 AM UTC 24 361453814 ps
T489 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.511487992 Oct 12 01:41:29 AM UTC 24 Oct 12 01:41:58 AM UTC 24 25819146808 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.1910982243 Oct 12 01:41:58 AM UTC 24 Oct 12 01:42:03 AM UTC 24 5979504165 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_clock_gating.4215912683 Oct 12 01:34:38 AM UTC 24 Oct 12 01:42:10 AM UTC 24 492537837003 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.1756898959 Oct 12 01:33:48 AM UTC 24 Oct 12 01:42:28 AM UTC 24 116146265427 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.1423206728 Oct 12 01:38:12 AM UTC 24 Oct 12 01:42:33 AM UTC 24 333233217279 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.1390585911 Oct 12 01:39:01 AM UTC 24 Oct 12 01:42:35 AM UTC 24 203721073962 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt_fixed.3945366477 Oct 12 01:28:48 AM UTC 24 Oct 12 01:42:48 AM UTC 24 324758305335 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.4099659240 Oct 12 01:36:11 AM UTC 24 Oct 12 01:42:48 AM UTC 24 322188203267 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.448514707 Oct 12 01:35:05 AM UTC 24 Oct 12 01:42:51 AM UTC 24 344399931393 ps
T494 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.3794292805 Oct 12 01:38:49 AM UTC 24 Oct 12 01:42:55 AM UTC 24 163995696865 ps
T495 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.2580210986 Oct 12 01:42:52 AM UTC 24 Oct 12 01:42:57 AM UTC 24 4333709642 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.1951333710 Oct 12 01:40:17 AM UTC 24 Oct 12 01:42:57 AM UTC 24 159654064956 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.66416031 Oct 12 01:28:51 AM UTC 24 Oct 12 01:42:59 AM UTC 24 355227633671 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.3063870813 Oct 12 01:38:54 AM UTC 24 Oct 12 01:43:04 AM UTC 24 326707230480 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.2036593512 Oct 12 01:43:05 AM UTC 24 Oct 12 01:43:08 AM UTC 24 441413755 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.1841605833 Oct 12 01:42:49 AM UTC 24 Oct 12 01:43:22 AM UTC 24 283032332956 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.507680692 Oct 12 01:42:58 AM UTC 24 Oct 12 01:43:23 AM UTC 24 4214763812 ps
T99 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_clock_gating.2875310444 Oct 12 01:28:59 AM UTC 24 Oct 12 01:43:27 AM UTC 24 342259692003 ps
T100 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.3154043240 Oct 12 01:43:09 AM UTC 24 Oct 12 01:43:35 AM UTC 24 5965519124 ps
T101 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.4091291340 Oct 12 01:30:47 AM UTC 24 Oct 12 01:43:39 AM UTC 24 327590702387 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled_fixed.2477900913 Oct 12 01:17:51 AM UTC 24 Oct 12 01:43:43 AM UTC 24 488566073106 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.3058174538 Oct 12 01:40:58 AM UTC 24 Oct 12 01:43:44 AM UTC 24 496527104968 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.1014284904 Oct 12 01:40:04 AM UTC 24 Oct 12 01:43:50 AM UTC 24 165974688578 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.1030159718 Oct 12 01:32:23 AM UTC 24 Oct 12 01:43:53 AM UTC 24 120791328431 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.47125667 Oct 12 01:42:00 AM UTC 24 Oct 12 01:43:54 AM UTC 24 165899662585 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.3422645491 Oct 12 01:39:00 AM UTC 24 Oct 12 01:44:04 AM UTC 24 175496764154 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.2902666334 Oct 12 01:31:22 AM UTC 24 Oct 12 01:44:07 AM UTC 24 128121910950 ps
T227 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.2553370179 Oct 12 01:42:11 AM UTC 24 Oct 12 01:44:07 AM UTC 24 154723027714 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.2482202770 Oct 12 01:43:53 AM UTC 24 Oct 12 01:44:09 AM UTC 24 4146623454 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.3359117036 Oct 12 01:44:10 AM UTC 24 Oct 12 01:44:12 AM UTC 24 491016465 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.1002309323 Oct 12 01:42:56 AM UTC 24 Oct 12 01:44:23 AM UTC 24 24966435922 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.348506679 Oct 12 01:43:55 AM UTC 24 Oct 12 01:44:33 AM UTC 24 29592223262 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1334023869 Oct 12 01:44:14 AM UTC 24 Oct 12 01:44:38 AM UTC 24 5726653973 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.2010739725 Oct 12 01:42:05 AM UTC 24 Oct 12 01:44:54 AM UTC 24 162446960146 ps
T339 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.1173408755 Oct 12 01:31:38 AM UTC 24 Oct 12 01:44:54 AM UTC 24 463347014364 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_polled.3477101519 Oct 12 01:29:21 AM UTC 24 Oct 12 01:45:01 AM UTC 24 336759783208 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.3349839683 Oct 12 01:37:45 AM UTC 24 Oct 12 01:45:03 AM UTC 24 162966855227 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.3702600494 Oct 12 01:37:45 AM UTC 24 Oct 12 01:45:07 AM UTC 24 534180434878 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.3956132082 Oct 12 01:36:00 AM UTC 24 Oct 12 01:45:07 AM UTC 24 198389810680 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.641492983 Oct 12 01:45:08 AM UTC 24 Oct 12 01:45:14 AM UTC 24 3912408599 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.1795737153 Oct 12 01:43:40 AM UTC 24 Oct 12 01:45:14 AM UTC 24 175975399191 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.3771631971 Oct 12 01:24:21 AM UTC 24 Oct 12 01:45:16 AM UTC 24 197612747026 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.322763787 Oct 12 01:35:22 AM UTC 24 Oct 12 01:45:28 AM UTC 24 288286638534 ps
T183 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.413000921 Oct 12 01:45:17 AM UTC 24 Oct 12 01:45:42 AM UTC 24 8833240283 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.2574359921 Oct 12 01:45:15 AM UTC 24 Oct 12 01:45:43 AM UTC 24 28492157165 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.758917740 Oct 12 01:45:43 AM UTC 24 Oct 12 01:45:46 AM UTC 24 386310731 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.2988544649 Oct 12 01:45:44 AM UTC 24 Oct 12 01:45:50 AM UTC 24 6126010835 ps
T362 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.3673335583 Oct 12 01:35:15 AM UTC 24 Oct 12 01:45:51 AM UTC 24 140563781600 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/7.adc_ctrl_filters_polled.85976762 Oct 12 01:17:50 AM UTC 24 Oct 12 01:45:56 AM UTC 24 495720250599 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.2801573917 Oct 12 01:44:07 AM UTC 24 Oct 12 01:46:04 AM UTC 24 44577262024 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.610148691 Oct 12 01:34:31 AM UTC 24 Oct 12 01:46:05 AM UTC 24 331840858850 ps
T333 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.1077122687 Oct 12 01:36:00 AM UTC 24 Oct 12 01:46:09 AM UTC 24 573417860789 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.3289189286 Oct 12 01:37:39 AM UTC 24 Oct 12 01:46:18 AM UTC 24 165840947658 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1302317442 Oct 12 01:40:07 AM UTC 24 Oct 12 01:46:19 AM UTC 24 161359732985 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.4255302636 Oct 12 01:44:24 AM UTC 24 Oct 12 01:46:21 AM UTC 24 326389752742 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.2920046429 Oct 12 01:44:39 AM UTC 24 Oct 12 01:46:32 AM UTC 24 496731732468 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.2738622638 Oct 12 01:46:21 AM UTC 24 Oct 12 01:46:37 AM UTC 24 3438952380 ps
T519 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.1157445395 Oct 12 01:42:29 AM UTC 24 Oct 12 01:46:44 AM UTC 24 159250973672 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.1420317075 Oct 12 01:43:24 AM UTC 24 Oct 12 01:46:53 AM UTC 24 160116567958 ps
T521 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.53186587 Oct 12 01:46:23 AM UTC 24 Oct 12 01:46:55 AM UTC 24 27308026927 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.3453870115 Oct 12 01:46:38 AM UTC 24 Oct 12 01:46:55 AM UTC 24 10132841850 ps
T522 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.2010449438 Oct 12 01:46:54 AM UTC 24 Oct 12 01:46:57 AM UTC 24 357282774 ps
T163 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.1228194323 Oct 12 01:42:49 AM UTC 24 Oct 12 01:47:02 AM UTC 24 340044015508 ps
T523 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.1944517215 Oct 12 01:46:56 AM UTC 24 Oct 12 01:47:04 AM UTC 24 5917696499 ps
T295 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.472716172 Oct 12 01:43:44 AM UTC 24 Oct 12 01:47:10 AM UTC 24 162885516867 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.1916429341 Oct 12 01:43:23 AM UTC 24 Oct 12 01:47:10 AM UTC 24 479308191733 ps
T524 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.339665287 Oct 12 01:45:57 AM UTC 24 Oct 12 01:47:29 AM UTC 24 341786428834 ps
T239 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_interrupt.322161113 Oct 12 01:25:34 AM UTC 24 Oct 12 01:47:36 AM UTC 24 489070011484 ps
T292 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.3189463901 Oct 12 01:33:19 AM UTC 24 Oct 12 01:47:48 AM UTC 24 336447994906 ps
T525 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.3502741540 Oct 12 01:47:49 AM UTC 24 Oct 12 01:47:53 AM UTC 24 3691008103 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.4007682123 Oct 12 01:42:34 AM UTC 24 Oct 12 01:48:28 AM UTC 24 549951408234 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.3925701531 Oct 12 01:40:38 AM UTC 24 Oct 12 01:48:46 AM UTC 24 171787781152 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.2306907989 Oct 12 01:34:03 AM UTC 24 Oct 12 01:48:46 AM UTC 24 332755163106 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.1435013015 Oct 12 01:48:52 AM UTC 24 Oct 12 01:49:10 AM UTC 24 5948781617 ps
T360 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.3170809368 Oct 12 01:41:30 AM UTC 24 Oct 12 01:48:49 AM UTC 24 86310080985 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.1176522147 Oct 12 01:48:49 AM UTC 24 Oct 12 01:48:51 AM UTC 24 440882182 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.2979888075 Oct 12 01:48:47 AM UTC 24 Oct 12 01:48:53 AM UTC 24 1574914056 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.2377780244 Oct 12 01:39:38 AM UTC 24 Oct 12 01:48:55 AM UTC 24 73702977861 ps
T529 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.2455384760 Oct 12 01:38:26 AM UTC 24 Oct 12 01:48:57 AM UTC 24 71954352092 ps
T530 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.1528584097 Oct 12 01:46:58 AM UTC 24 Oct 12 01:48:58 AM UTC 24 169962465338 ps
T531 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.152282717 Oct 12 01:47:54 AM UTC 24 Oct 12 01:49:20 AM UTC 24 41387911532 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.1283710185 Oct 12 01:43:51 AM UTC 24 Oct 12 01:49:22 AM UTC 24 193336580077 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.2283998389 Oct 12 01:45:52 AM UTC 24 Oct 12 01:49:25 AM UTC 24 336969466776 ps
T356 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1017935256 Oct 12 01:36:58 AM UTC 24 Oct 12 01:49:25 AM UTC 24 124829672261 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.2074385803 Oct 12 01:46:18 AM UTC 24 Oct 12 01:49:28 AM UTC 24 154013370793 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.4040375816 Oct 12 01:41:03 AM UTC 24 Oct 12 01:49:41 AM UTC 24 171547506421 ps
T532 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.2391493579 Oct 12 01:49:26 AM UTC 24 Oct 12 01:49:48 AM UTC 24 4985853369 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.3574273666 Oct 12 01:44:55 AM UTC 24 Oct 12 01:50:03 AM UTC 24 334498386676 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.533631155 Oct 12 01:49:29 AM UTC 24 Oct 12 01:50:06 AM UTC 24 39196443046 ps
T535 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.1028065549 Oct 12 01:50:06 AM UTC 24 Oct 12 01:50:09 AM UTC 24 507329187 ps
T536 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.2021550149 Oct 12 01:49:49 AM UTC 24 Oct 12 01:50:09 AM UTC 24 15730341829 ps
T537 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.3822698765 Oct 12 01:50:09 AM UTC 24 Oct 12 01:50:13 AM UTC 24 5834841405 ps
T538 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.3834540113 Oct 12 01:43:36 AM UTC 24 Oct 12 01:50:22 AM UTC 24 163650198491 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.1687838782 Oct 12 01:48:53 AM UTC 24 Oct 12 01:50:45 AM UTC 24 167698741892 ps
T539 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.3905376765 Oct 12 01:29:34 AM UTC 24 Oct 12 01:51:00 AM UTC 24 412299656496 ps
T540 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.3446208715 Oct 12 01:35:49 AM UTC 24 Oct 12 01:51:12 AM UTC 24 489723059514 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.2895820623 Oct 12 01:47:29 AM UTC 24 Oct 12 01:51:34 AM UTC 24 503333938879 ps
T541 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3401009275 Oct 12 01:43:43 AM UTC 24 Oct 12 01:51:36 AM UTC 24 597932485314 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.1555585894 Oct 12 01:45:08 AM UTC 24 Oct 12 01:51:37 AM UTC 24 162151722673 ps
T542 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.1179521549 Oct 12 01:51:37 AM UTC 24 Oct 12 01:51:46 AM UTC 24 3439986317 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.1151496359 Oct 12 01:47:11 AM UTC 24 Oct 12 01:51:48 AM UTC 24 205989756075 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.1667133034 Oct 12 01:47:03 AM UTC 24 Oct 12 01:51:58 AM UTC 24 325027426642 ps
T544 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.2083162018 Oct 12 01:45:51 AM UTC 24 Oct 12 01:51:58 AM UTC 24 161417736195 ps
T545 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_wakeup_fixed.2190540702 Oct 12 01:24:37 AM UTC 24 Oct 12 01:52:15 AM UTC 24 607454216776 ps
T546 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.2367631731 Oct 12 01:52:16 AM UTC 24 Oct 12 01:52:18 AM UTC 24 502371477 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.1907077146 Oct 12 01:51:59 AM UTC 24 Oct 12 01:52:19 AM UTC 24 7938957086 ps
T323 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.3440863162 Oct 12 01:30:50 AM UTC 24 Oct 12 01:52:24 AM UTC 24 528055339568 ps
T547 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.2726615492 Oct 12 01:52:19 AM UTC 24 Oct 12 01:52:27 AM UTC 24 5601350131 ps
T548 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.2036641655 Oct 12 01:44:34 AM UTC 24 Oct 12 01:52:37 AM UTC 24 163589212135 ps
T549 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup_fixed.1930454600 Oct 12 01:28:52 AM UTC 24 Oct 12 01:52:42 AM UTC 24 602900783956 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.2463809748 Oct 12 01:51:47 AM UTC 24 Oct 12 01:52:50 AM UTC 24 32514516636 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.3639444593 Oct 12 01:50:23 AM UTC 24 Oct 12 01:52:50 AM UTC 24 166612873364 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.642366107 Oct 12 01:39:46 AM UTC 24 Oct 12 01:52:57 AM UTC 24 495158690355 ps
T551 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.4129579925 Oct 12 01:49:21 AM UTC 24 Oct 12 01:53:05 AM UTC 24 198274243359 ps
T552 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.1108215880 Oct 12 01:53:06 AM UTC 24 Oct 12 01:53:11 AM UTC 24 3301856367 ps
T553 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.3627472821 Oct 12 01:42:58 AM UTC 24 Oct 12 01:53:17 AM UTC 24 99428297829 ps
T554 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.3140720832 Oct 12 01:50:14 AM UTC 24 Oct 12 01:53:17 AM UTC 24 494726128847 ps
T555 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.924929796 Oct 12 01:50:46 AM UTC 24 Oct 12 01:53:19 AM UTC 24 327325412492 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.1432652365 Oct 12 01:51:37 AM UTC 24 Oct 12 01:53:35 AM UTC 24 179101694902 ps
T556 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.402651688 Oct 12 01:53:18 AM UTC 24 Oct 12 01:53:35 AM UTC 24 3747603593 ps
T557 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.3843054481 Oct 12 01:53:36 AM UTC 24 Oct 12 01:53:38 AM UTC 24 462900447 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.3638408803 Oct 12 01:53:36 AM UTC 24 Oct 12 01:53:41 AM UTC 24 5920398458 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3866764935 Oct 12 01:53:12 AM UTC 24 Oct 12 01:53:55 AM UTC 24 28200300691 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.2170066134 Oct 12 01:39:04 AM UTC 24 Oct 12 01:54:00 AM UTC 24 499498739287 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.843486518 Oct 12 01:48:58 AM UTC 24 Oct 12 01:54:17 AM UTC 24 482105923889 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.1831002387 Oct 12 01:44:05 AM UTC 24 Oct 12 01:54:35 AM UTC 24 73676329117 ps
T237 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.3797245322 Oct 12 01:30:58 AM UTC 24 Oct 12 01:54:38 AM UTC 24 509358925071 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.773080974 Oct 12 01:47:11 AM UTC 24 Oct 12 01:54:43 AM UTC 24 339050037266 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.2728799649 Oct 12 01:52:20 AM UTC 24 Oct 12 01:54:54 AM UTC 24 327083128114 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.4221739320 Oct 12 01:45:02 AM UTC 24 Oct 12 01:54:56 AM UTC 24 204936073875 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.574697688 Oct 12 01:54:55 AM UTC 24 Oct 12 01:55:01 AM UTC 24 4966636530 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.3207100473 Oct 12 01:54:00 AM UTC 24 Oct 12 01:55:03 AM UTC 24 163467003865 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.2539289020 Oct 12 01:55:03 AM UTC 24 Oct 12 01:55:09 AM UTC 24 3689278708 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.989155246 Oct 12 01:46:56 AM UTC 24 Oct 12 01:55:11 AM UTC 24 326847535864 ps
T251 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.3800942763 Oct 12 01:32:26 AM UTC 24 Oct 12 01:55:12 AM UTC 24 522245778286 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.3167007886 Oct 12 01:52:42 AM UTC 24 Oct 12 01:55:12 AM UTC 24 163891416620 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.3376654114 Oct 12 01:46:45 AM UTC 24 Oct 12 01:55:13 AM UTC 24 562644774055 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.2628754920 Oct 12 01:55:11 AM UTC 24 Oct 12 01:55:14 AM UTC 24 323926551 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.3468695229 Oct 12 01:50:10 AM UTC 24 Oct 12 01:55:17 AM UTC 24 489702804397 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.3578845341 Oct 12 01:45:16 AM UTC 24 Oct 12 01:55:19 AM UTC 24 90823509638 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.1340103027 Oct 12 01:55:12 AM UTC 24 Oct 12 01:55:20 AM UTC 24 5941258138 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.1642731362 Oct 12 01:47:37 AM UTC 24 Oct 12 01:55:27 AM UTC 24 325343434540 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.3939360111 Oct 12 01:53:56 AM UTC 24 Oct 12 01:55:27 AM UTC 24 156461560427 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_wakeup_fixed.4219956074 Oct 12 01:23:33 AM UTC 24 Oct 12 01:55:29 AM UTC 24 618461091132 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.1801671438 Oct 12 01:45:03 AM UTC 24 Oct 12 01:55:31 AM UTC 24 527697156195 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2985840978 Oct 12 01:49:23 AM UTC 24 Oct 12 01:55:38 AM UTC 24 191756338580 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.724965603 Oct 12 01:37:25 AM UTC 24 Oct 12 01:55:40 AM UTC 24 488473463566 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.1050878609 Oct 12 01:46:06 AM UTC 24 Oct 12 01:55:44 AM UTC 24 198425493709 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.3447838682 Oct 12 01:54:57 AM UTC 24 Oct 12 01:55:48 AM UTC 24 30283254287 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.4170111706 Oct 12 01:48:56 AM UTC 24 Oct 12 01:55:49 AM UTC 24 162662585046 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.756306185 Oct 12 01:55:41 AM UTC 24 Oct 12 01:55:49 AM UTC 24 1463337522 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.2376708385 Oct 12 01:55:49 AM UTC 24 Oct 12 01:55:53 AM UTC 24 492612088 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.3566671133 Oct 12 01:55:30 AM UTC 24 Oct 12 01:55:55 AM UTC 24 5499513014 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.1446408930 Oct 12 01:55:49 AM UTC 24 Oct 12 01:55:57 AM UTC 24 5612006279 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3617794592 Oct 12 01:55:32 AM UTC 24 Oct 12 01:56:11 AM UTC 24 36633972318 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.1064639446 Oct 12 01:57:25 AM UTC 24 Oct 12 01:57:43 AM UTC 24 6116860041 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.341237524 Oct 12 01:55:14 AM UTC 24 Oct 12 01:56:17 AM UTC 24 157191598337 ps
T322 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.3737625497 Oct 12 01:50:04 AM UTC 24 Oct 12 01:56:22 AM UTC 24 343182549295 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1961204851 Oct 12 01:38:43 AM UTC 24 Oct 12 01:56:40 AM UTC 24 300372060359 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.3914226871 Oct 12 01:55:13 AM UTC 24 Oct 12 01:56:52 AM UTC 24 169425029977 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3835960087 Oct 12 01:56:53 AM UTC 24 Oct 12 01:57:04 AM UTC 24 3987896728 ps
T344 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.1438641877 Oct 12 01:55:28 AM UTC 24 Oct 12 01:57:15 AM UTC 24 177202641799 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.333539736 Oct 12 01:51:35 AM UTC 24 Oct 12 01:57:15 AM UTC 24 506733171684 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.4006007344 Oct 12 01:55:44 AM UTC 24 Oct 12 01:57:18 AM UTC 24 164938128208 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.47432076 Oct 12 01:57:06 AM UTC 24 Oct 12 01:57:20 AM UTC 24 41232202506 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.1165825236 Oct 12 01:57:21 AM UTC 24 Oct 12 01:57:23 AM UTC 24 558849303 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.1886783908 Oct 12 01:44:55 AM UTC 24 Oct 12 01:57:31 AM UTC 24 531775974809 ps
T342 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.1506255835 Oct 12 01:56:12 AM UTC 24 Oct 12 01:57:31 AM UTC 24 181654781472 ps
T205 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.2194144382 Oct 12 01:57:17 AM UTC 24 Oct 12 01:57:38 AM UTC 24 21118983374 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.2139740379 Oct 12 01:31:45 AM UTC 24 Oct 12 01:57:43 AM UTC 24 617446572741 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.383137454 Oct 12 01:46:33 AM UTC 24 Oct 12 01:57:56 AM UTC 24 116990172527 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.3566454788 Oct 12 01:54:44 AM UTC 24 Oct 12 01:57:56 AM UTC 24 518123356201 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.3695603925 Oct 12 01:55:50 AM UTC 24 Oct 12 01:58:01 AM UTC 24 167437178495 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.3840186733 Oct 12 01:58:02 AM UTC 24 Oct 12 01:58:06 AM UTC 24 4794491816 ps
T299 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.3118445616 Oct 12 01:52:59 AM UTC 24 Oct 12 01:58:09 AM UTC 24 492347282792 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.2273694142 Oct 12 01:53:39 AM UTC 24 Oct 12 01:58:12 AM UTC 24 495890961554 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.914720036 Oct 12 01:52:28 AM UTC 24 Oct 12 01:58:13 AM UTC 24 334283873720 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.3024787482 Oct 12 01:48:29 AM UTC 24 Oct 12 01:58:29 AM UTC 24 81210919221 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.570353735 Oct 12 01:58:30 AM UTC 24 Oct 12 01:58:34 AM UTC 24 538427592 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.226945702 Oct 12 01:40:46 AM UTC 24 Oct 12 01:58:34 AM UTC 24 421292072057 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.341053505 Oct 12 01:58:14 AM UTC 24 Oct 12 01:58:36 AM UTC 24 9802886079 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.4203195335 Oct 12 01:58:34 AM UTC 24 Oct 12 01:58:42 AM UTC 24 5728885171 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3493828632 Oct 12 01:58:13 AM UTC 24 Oct 12 01:58:47 AM UTC 24 7843949487 ps
T598 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.3238027765 Oct 12 01:38:51 AM UTC 24 Oct 12 01:59:00 AM UTC 24 490736033441 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.1325958594 Oct 12 01:54:17 AM UTC 24 Oct 12 01:59:12 AM UTC 24 544729841191 ps
T599 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.1589064306 Oct 12 01:42:35 AM UTC 24 Oct 12 01:59:24 AM UTC 24 394432296980 ps
T358 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.3351414873 Oct 12 01:51:49 AM UTC 24 Oct 12 01:59:37 AM UTC 24 107101579001 ps
T600 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.2581782055 Oct 12 01:58:07 AM UTC 24 Oct 12 01:59:53 AM UTC 24 34358097626 ps
T601 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.1144607509 Oct 12 01:52:37 AM UTC 24 Oct 12 01:59:58 AM UTC 24 165572503433 ps
T602 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.370464047 Oct 12 01:59:53 AM UTC 24 Oct 12 02:00:04 AM UTC 24 4041717500 ps
T603 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.3874942026 Oct 12 01:56:41 AM UTC 24 Oct 12 02:00:04 AM UTC 24 198380902413 ps
T604 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.565655372 Oct 12 01:55:20 AM UTC 24 Oct 12 02:00:05 AM UTC 24 175280139948 ps
T605 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.1697409908 Oct 12 02:00:06 AM UTC 24 Oct 12 02:00:14 AM UTC 24 4842384677 ps
T606 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3792835931 Oct 12 02:00:16 AM UTC 24 Oct 12 02:00:18 AM UTC 24 526677310 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.1146770028 Oct 12 01:46:04 AM UTC 24 Oct 12 02:00:23 AM UTC 24 578402678888 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.1866594300 Oct 12 01:57:32 AM UTC 24 Oct 12 02:00:31 AM UTC 24 333667270065 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.3252577496 Oct 12 01:57:19 AM UTC 24 Oct 12 02:00:38 AM UTC 24 207706710100 ps
T608 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.2563874762 Oct 12 02:00:19 AM UTC 24 Oct 12 02:00:47 AM UTC 24 6118859896 ps
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