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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.70 99.07 96.67 100.00 100.00 98.82 98.33 90.99


Total test records in report: 917
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T609 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.2153614725 Oct 12 01:56:19 AM UTC 24 Oct 12 02:00:49 AM UTC 24 197797711439 ps
T610 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.3705944657 Oct 12 01:32:58 AM UTC 24 Oct 12 02:00:54 AM UTC 24 617362242614 ps
T611 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.3834994261 Oct 12 01:57:39 AM UTC 24 Oct 12 02:00:59 AM UTC 24 333553069664 ps
T332 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.3450116123 Oct 12 01:38:53 AM UTC 24 Oct 12 02:00:59 AM UTC 24 499439293116 ps
T612 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.1162333406 Oct 12 01:49:11 AM UTC 24 Oct 12 02:01:02 AM UTC 24 183204268297 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.1200395236 Oct 12 01:48:58 AM UTC 24 Oct 12 02:01:04 AM UTC 24 495392836497 ps
T613 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.2433343458 Oct 12 02:01:03 AM UTC 24 Oct 12 02:01:13 AM UTC 24 4382330074 ps
T614 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.1765320675 Oct 12 01:52:50 AM UTC 24 Oct 12 02:01:15 AM UTC 24 398206457446 ps
T615 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.3796753057 Oct 12 02:01:05 AM UTC 24 Oct 12 02:01:18 AM UTC 24 26610199334 ps
T616 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.3316510842 Oct 12 01:55:53 AM UTC 24 Oct 12 02:01:19 AM UTC 24 494446137577 ps
T617 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.2774997680 Oct 12 01:58:44 AM UTC 24 Oct 12 02:01:21 AM UTC 24 161779081495 ps
T618 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.2730714747 Oct 12 02:01:20 AM UTC 24 Oct 12 02:01:23 AM UTC 24 342872417 ps
T310 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.3014281052 Oct 12 01:55:56 AM UTC 24 Oct 12 02:01:29 AM UTC 24 163914517388 ps
T619 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.1548097471 Oct 12 01:55:02 AM UTC 24 Oct 12 02:01:41 AM UTC 24 104244809778 ps
T620 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.2525581337 Oct 12 01:57:44 AM UTC 24 Oct 12 02:01:43 AM UTC 24 387233800600 ps
T621 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.3326960645 Oct 12 01:54:37 AM UTC 24 Oct 12 02:01:44 AM UTC 24 405201484884 ps
T622 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.1420962164 Oct 12 02:01:22 AM UTC 24 Oct 12 02:01:49 AM UTC 24 5908656842 ps
T351 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.2522732750 Oct 12 01:49:42 AM UTC 24 Oct 12 02:02:00 AM UTC 24 122059267762 ps
T238 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.407419231 Oct 12 01:46:09 AM UTC 24 Oct 12 02:02:05 AM UTC 24 353118498338 ps
T623 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.2091985905 Oct 12 01:59:58 AM UTC 24 Oct 12 02:02:07 AM UTC 24 30824260478 ps
T624 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.2762432490 Oct 12 01:55:21 AM UTC 24 Oct 12 02:02:14 AM UTC 24 611398624072 ps
T625 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.237627455 Oct 12 02:02:08 AM UTC 24 Oct 12 02:02:20 AM UTC 24 4811954263 ps
T329 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.707419539 Oct 12 01:59:38 AM UTC 24 Oct 12 02:02:31 AM UTC 24 516876785943 ps
T626 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.2305575442 Oct 12 02:02:15 AM UTC 24 Oct 12 02:02:39 AM UTC 24 36628339507 ps
T627 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.589184937 Oct 12 01:26:12 AM UTC 24 Oct 12 02:02:48 AM UTC 24 592875948438 ps
T628 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.1585358122 Oct 12 02:02:49 AM UTC 24 Oct 12 02:02:51 AM UTC 24 467654945 ps
T361 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.453318153 Oct 12 01:44:09 AM UTC 24 Oct 12 02:02:53 AM UTC 24 309525829236 ps
T629 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.1734925058 Oct 12 01:57:17 AM UTC 24 Oct 12 02:02:53 AM UTC 24 92046864402 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.152385443 Oct 12 01:57:57 AM UTC 24 Oct 12 02:02:54 AM UTC 24 522021021411 ps
T630 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.175345705 Oct 12 02:02:52 AM UTC 24 Oct 12 02:03:00 AM UTC 24 6058528176 ps
T631 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.884748095 Oct 12 02:01:16 AM UTC 24 Oct 12 02:03:02 AM UTC 24 39839366007 ps
T632 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.3882203728 Oct 12 01:45:47 AM UTC 24 Oct 12 02:03:06 AM UTC 24 330239862795 ps
T633 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.2904172527 Oct 12 02:02:32 AM UTC 24 Oct 12 02:03:18 AM UTC 24 183763850622 ps
T352 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.2221770686 Oct 12 01:53:18 AM UTC 24 Oct 12 02:03:21 AM UTC 24 132557235011 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.245400671 Oct 12 01:52:00 AM UTC 24 Oct 12 02:03:25 AM UTC 24 521313478581 ps
T634 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.2740451609 Oct 12 01:39:10 AM UTC 24 Oct 12 02:03:29 AM UTC 24 543162257366 ps
T635 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.3064348639 Oct 12 02:03:26 AM UTC 24 Oct 12 02:03:33 AM UTC 24 4133230600 ps
T171 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.611149173 Oct 12 02:02:01 AM UTC 24 Oct 12 02:03:37 AM UTC 24 504843313011 ps
T636 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.3525790813 Oct 12 01:52:25 AM UTC 24 Oct 12 02:03:38 AM UTC 24 493965246231 ps
T637 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.2004090612 Oct 12 02:00:59 AM UTC 24 Oct 12 02:03:43 AM UTC 24 176550424707 ps
T638 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.2492779117 Oct 12 01:58:34 AM UTC 24 Oct 12 02:03:44 AM UTC 24 329748523001 ps
T639 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.456277391 Oct 12 02:03:44 AM UTC 24 Oct 12 02:03:48 AM UTC 24 424941152 ps
T640 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.2908194925 Oct 12 02:03:38 AM UTC 24 Oct 12 02:03:49 AM UTC 24 10105388863 ps
T641 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.3249691560 Oct 12 01:55:18 AM UTC 24 Oct 12 02:03:52 AM UTC 24 164045358005 ps
T642 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.2966392413 Oct 12 02:03:45 AM UTC 24 Oct 12 02:03:54 AM UTC 24 5708068454 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.2411860726 Oct 12 01:43:28 AM UTC 24 Oct 12 02:03:56 AM UTC 24 330948955742 ps
T643 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.1659501866 Oct 12 01:53:20 AM UTC 24 Oct 12 02:04:03 AM UTC 24 207067187414 ps
T644 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all.1446532508 Oct 12 01:55:10 AM UTC 24 Oct 12 02:04:07 AM UTC 24 185156538430 ps
T645 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.16529577 Oct 12 01:54:39 AM UTC 24 Oct 12 02:04:16 AM UTC 24 528377722835 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.2295346101 Oct 12 01:57:44 AM UTC 24 Oct 12 02:04:20 AM UTC 24 690625886329 ps
T165 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.3522349078 Oct 12 02:03:48 AM UTC 24 Oct 12 02:04:29 AM UTC 24 327946661018 ps
T646 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.145175453 Oct 12 01:51:13 AM UTC 24 Oct 12 02:04:31 AM UTC 24 606426352217 ps
T647 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.3812755978 Oct 12 02:04:21 AM UTC 24 Oct 12 02:04:35 AM UTC 24 4052989532 ps
T648 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.1847811356 Oct 12 02:04:35 AM UTC 24 Oct 12 02:04:43 AM UTC 24 1381124738 ps
T649 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.3155038798 Oct 12 02:04:43 AM UTC 24 Oct 12 02:04:48 AM UTC 24 2317741501 ps
T650 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.4165370142 Oct 12 01:59:13 AM UTC 24 Oct 12 02:04:49 AM UTC 24 607999576770 ps
T651 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.3688252941 Oct 12 02:04:48 AM UTC 24 Oct 12 02:04:50 AM UTC 24 360712736 ps
T243 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.4068116074 Oct 12 02:03:04 AM UTC 24 Oct 12 02:04:51 AM UTC 24 366239178645 ps
T652 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.1268670465 Oct 12 02:03:55 AM UTC 24 Oct 12 02:05:00 AM UTC 24 161771547204 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.18837729 Oct 12 01:57:57 AM UTC 24 Oct 12 02:05:06 AM UTC 24 166177288060 ps
T653 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.2847272636 Oct 12 02:03:30 AM UTC 24 Oct 12 02:05:08 AM UTC 24 39203497987 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.37163309 Oct 12 02:03:20 AM UTC 24 Oct 12 02:05:10 AM UTC 24 497751016434 ps
T654 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.9773031 Oct 12 02:02:40 AM UTC 24 Oct 12 02:05:12 AM UTC 24 160396330216 ps
T655 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.2003013651 Oct 12 02:04:49 AM UTC 24 Oct 12 02:05:17 AM UTC 24 5996967971 ps
T656 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.1703696047 Oct 12 02:03:49 AM UTC 24 Oct 12 02:05:34 AM UTC 24 158925519681 ps
T657 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.3853743628 Oct 12 02:03:39 AM UTC 24 Oct 12 02:05:39 AM UTC 24 171269484040 ps
T658 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.784277201 Oct 12 02:00:48 AM UTC 24 Oct 12 02:05:39 AM UTC 24 321514050781 ps
T659 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.3922639025 Oct 12 02:03:07 AM UTC 24 Oct 12 02:05:39 AM UTC 24 205260214303 ps
T660 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.1490095677 Oct 12 02:05:35 AM UTC 24 Oct 12 02:05:50 AM UTC 24 3209425067 ps
T661 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.1453698208 Oct 12 01:58:48 AM UTC 24 Oct 12 02:05:58 AM UTC 24 162341215581 ps
T662 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.1927310167 Oct 12 02:06:00 AM UTC 24 Oct 12 02:06:02 AM UTC 24 546913695 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.1657209905 Oct 12 02:05:40 AM UTC 24 Oct 12 02:06:08 AM UTC 24 32053281243 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.3331918677 Oct 12 01:51:01 AM UTC 24 Oct 12 02:06:25 AM UTC 24 370505165844 ps
T663 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.3414929928 Oct 12 02:06:03 AM UTC 24 Oct 12 02:06:28 AM UTC 24 5775999497 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.349204963 Oct 12 02:05:01 AM UTC 24 Oct 12 02:06:38 AM UTC 24 496168204444 ps
T664 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.1500846300 Oct 12 02:04:30 AM UTC 24 Oct 12 02:06:41 AM UTC 24 40593063231 ps
T665 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.1170788282 Oct 12 02:04:08 AM UTC 24 Oct 12 02:06:47 AM UTC 24 349237196164 ps
T666 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.138895338 Oct 12 02:05:39 AM UTC 24 Oct 12 02:06:51 AM UTC 24 32868572508 ps
T667 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.3704167520 Oct 12 01:55:58 AM UTC 24 Oct 12 02:06:56 AM UTC 24 488714189819 ps
T668 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.2598041874 Oct 12 02:01:24 AM UTC 24 Oct 12 02:07:09 AM UTC 24 494761034115 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.3631849130 Oct 12 02:04:52 AM UTC 24 Oct 12 02:07:15 AM UTC 24 335611519039 ps
T669 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.1341197788 Oct 12 02:06:29 AM UTC 24 Oct 12 02:07:17 AM UTC 24 166476381699 ps
T365 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.3804661584 Oct 12 01:55:38 AM UTC 24 Oct 12 02:07:28 AM UTC 24 115298548544 ps
T670 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.3780710251 Oct 12 02:07:09 AM UTC 24 Oct 12 02:07:29 AM UTC 24 4077079852 ps
T671 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.1118604381 Oct 12 01:59:01 AM UTC 24 Oct 12 02:07:50 AM UTC 24 641149285649 ps
T672 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.1750368899 Oct 12 02:07:51 AM UTC 24 Oct 12 02:07:54 AM UTC 24 358644037 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.1893156973 Oct 12 02:07:29 AM UTC 24 Oct 12 02:08:02 AM UTC 24 170844695217 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.2513642721 Oct 12 02:06:41 AM UTC 24 Oct 12 02:08:06 AM UTC 24 542497800692 ps
T673 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.1739848024 Oct 12 02:07:55 AM UTC 24 Oct 12 02:08:07 AM UTC 24 5705064567 ps
T674 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.1406005830 Oct 12 02:00:06 AM UTC 24 Oct 12 02:08:22 AM UTC 24 103025395646 ps
T675 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.2643847213 Oct 12 02:07:16 AM UTC 24 Oct 12 02:08:29 AM UTC 24 34952121653 ps
T676 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.3160291791 Oct 12 01:49:26 AM UTC 24 Oct 12 02:08:39 AM UTC 24 326744926431 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.4189676459 Oct 12 02:03:57 AM UTC 24 Oct 12 02:08:41 AM UTC 24 362402275497 ps
T677 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.3295895111 Oct 12 02:00:24 AM UTC 24 Oct 12 02:08:50 AM UTC 24 326410011299 ps
T678 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.4168131930 Oct 12 02:01:43 AM UTC 24 Oct 12 02:08:54 AM UTC 24 482094302338 ps
T679 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.4090533669 Oct 12 02:08:56 AM UTC 24 Oct 12 02:09:00 AM UTC 24 3376626497 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.412279338 Oct 12 02:02:55 AM UTC 24 Oct 12 02:09:03 AM UTC 24 160536969887 ps
T680 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.998025960 Oct 12 01:59:25 AM UTC 24 Oct 12 02:09:03 AM UTC 24 383769598128 ps
T681 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.766956048 Oct 12 02:05:50 AM UTC 24 Oct 12 02:09:04 AM UTC 24 336785682982 ps
T331 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.2748293417 Oct 12 01:52:51 AM UTC 24 Oct 12 02:09:15 AM UTC 24 408267325985 ps
T682 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.242534396 Oct 12 02:01:14 AM UTC 24 Oct 12 02:09:17 AM UTC 24 90648183191 ps
T683 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.838595651 Oct 12 02:09:15 AM UTC 24 Oct 12 02:09:19 AM UTC 24 381718827 ps
T684 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.3723716858 Oct 12 02:09:18 AM UTC 24 Oct 12 02:09:26 AM UTC 24 5873428325 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.674482326 Oct 12 02:09:04 AM UTC 24 Oct 12 02:09:30 AM UTC 24 25277491483 ps
T685 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.4272096657 Oct 12 01:55:28 AM UTC 24 Oct 12 02:09:48 AM UTC 24 355089918941 ps
T686 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.440991883 Oct 12 02:08:42 AM UTC 24 Oct 12 02:10:14 AM UTC 24 496982608642 ps
T687 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.1040859121 Oct 12 02:08:07 AM UTC 24 Oct 12 02:10:23 AM UTC 24 155599042648 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.2383465807 Oct 12 01:45:29 AM UTC 24 Oct 12 02:10:28 AM UTC 24 634433342814 ps
T688 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.2636521756 Oct 12 02:09:01 AM UTC 24 Oct 12 02:10:33 AM UTC 24 43522971215 ps
T689 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.1843333523 Oct 12 02:10:34 AM UTC 24 Oct 12 02:10:45 AM UTC 24 4141280763 ps
T690 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.4011596395 Oct 12 02:04:52 AM UTC 24 Oct 12 02:10:55 AM UTC 24 164607453771 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.878534640 Oct 12 01:57:37 AM UTC 24 Oct 12 02:11:05 AM UTC 24 322727799772 ps
T691 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.4108145321 Oct 12 02:10:45 AM UTC 24 Oct 12 02:11:09 AM UTC 24 41799640891 ps
T692 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.3601601112 Oct 12 02:11:06 AM UTC 24 Oct 12 02:11:20 AM UTC 24 6319659270 ps
T693 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.1315592709 Oct 12 02:11:21 AM UTC 24 Oct 12 02:11:23 AM UTC 24 432012000 ps
T694 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.74910948 Oct 12 02:03:22 AM UTC 24 Oct 12 02:11:29 AM UTC 24 171930586909 ps
T695 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.458618518 Oct 12 02:11:24 AM UTC 24 Oct 12 02:11:31 AM UTC 24 5708618014 ps
T696 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.3384006198 Oct 12 01:53:42 AM UTC 24 Oct 12 02:11:33 AM UTC 24 495910352051 ps
T326 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.1372301194 Oct 12 01:56:23 AM UTC 24 Oct 12 02:11:52 AM UTC 24 341631946517 ps
T697 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.2775198082 Oct 12 02:05:40 AM UTC 24 Oct 12 02:12:04 AM UTC 24 88513372371 ps
T698 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.1274905813 Oct 12 02:00:50 AM UTC 24 Oct 12 02:12:09 AM UTC 24 360803491036 ps
T699 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.31175951 Oct 12 01:58:10 AM UTC 24 Oct 12 02:12:09 AM UTC 24 138410947991 ps
T700 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.3691669438 Oct 12 02:03:01 AM UTC 24 Oct 12 02:12:12 AM UTC 24 331784585657 ps
T701 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.4248586815 Oct 12 02:04:31 AM UTC 24 Oct 12 02:12:14 AM UTC 24 88745066489 ps
T702 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.1190813010 Oct 12 02:02:53 AM UTC 24 Oct 12 02:12:29 AM UTC 24 329124924744 ps
T703 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.2375265999 Oct 12 02:12:15 AM UTC 24 Oct 12 02:12:37 AM UTC 24 4849571773 ps
T704 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.1330666807 Oct 12 02:06:39 AM UTC 24 Oct 12 02:12:51 AM UTC 24 162966792866 ps
T705 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.493477629 Oct 12 02:01:42 AM UTC 24 Oct 12 02:12:53 AM UTC 24 486457888969 ps
T706 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.1775835923 Oct 12 02:12:52 AM UTC 24 Oct 12 02:13:03 AM UTC 24 3173535606 ps
T707 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.4135217935 Oct 12 02:13:04 AM UTC 24 Oct 12 02:13:07 AM UTC 24 298635958 ps
T708 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.1891434127 Oct 12 02:08:03 AM UTC 24 Oct 12 02:13:07 AM UTC 24 498169325132 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.212273199 Oct 12 02:05:09 AM UTC 24 Oct 12 02:13:10 AM UTC 24 547435182447 ps
T709 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.250893034 Oct 12 02:13:08 AM UTC 24 Oct 12 02:13:31 AM UTC 24 5500180922 ps
T710 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1895616740 Oct 12 01:47:04 AM UTC 24 Oct 12 02:13:39 AM UTC 24 499039870385 ps
T711 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.2233569130 Oct 12 02:12:29 AM UTC 24 Oct 12 02:13:44 AM UTC 24 27155995415 ps
T236 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.1027367121 Oct 12 02:05:13 AM UTC 24 Oct 12 02:14:04 AM UTC 24 356910668268 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.3557719169 Oct 12 02:06:09 AM UTC 24 Oct 12 02:14:06 AM UTC 24 170200164454 ps
T712 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.1929870742 Oct 12 02:05:11 AM UTC 24 Oct 12 02:14:14 AM UTC 24 596530308459 ps
T713 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.339887280 Oct 12 02:04:16 AM UTC 24 Oct 12 02:14:26 AM UTC 24 526751965264 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.1061248081 Oct 12 02:00:38 AM UTC 24 Oct 12 02:14:27 AM UTC 24 321431816545 ps
T335 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.1455897953 Oct 12 02:01:19 AM UTC 24 Oct 12 02:14:28 AM UTC 24 335536716872 ps
T714 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.1929492892 Oct 12 01:55:13 AM UTC 24 Oct 12 02:14:32 AM UTC 24 488284654238 ps
T715 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.3452641633 Oct 12 02:07:18 AM UTC 24 Oct 12 02:14:34 AM UTC 24 86851769467 ps
T716 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.2707210524 Oct 12 02:06:56 AM UTC 24 Oct 12 02:14:34 AM UTC 24 530690507220 ps
T717 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.2639035378 Oct 12 02:14:35 AM UTC 24 Oct 12 02:14:37 AM UTC 24 555272722 ps
T718 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.2011022129 Oct 12 02:14:27 AM UTC 24 Oct 12 02:14:41 AM UTC 24 3138211552 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.109569390 Oct 12 02:11:09 AM UTC 24 Oct 12 02:14:44 AM UTC 24 363892181781 ps
T719 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.2010169078 Oct 12 02:14:28 AM UTC 24 Oct 12 02:14:45 AM UTC 24 26514054995 ps
T720 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.1323731998 Oct 12 02:14:33 AM UTC 24 Oct 12 02:14:50 AM UTC 24 3488976106 ps
T721 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.4257841967 Oct 12 02:14:38 AM UTC 24 Oct 12 02:14:51 AM UTC 24 5713089098 ps
T722 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.2754273093 Oct 12 02:02:21 AM UTC 24 Oct 12 02:15:00 AM UTC 24 114734873098 ps
T723 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.117614314 Oct 12 02:10:24 AM UTC 24 Oct 12 02:15:16 AM UTC 24 168269140389 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.1622044029 Oct 12 02:08:08 AM UTC 24 Oct 12 02:15:23 AM UTC 24 487302068145 ps
T724 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.2659087823 Oct 12 02:14:08 AM UTC 24 Oct 12 02:15:31 AM UTC 24 177524772575 ps
T725 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.2574998570 Oct 12 02:15:32 AM UTC 24 Oct 12 02:15:55 AM UTC 24 5492860199 ps
T726 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.2595798177 Oct 12 02:09:30 AM UTC 24 Oct 12 02:15:59 AM UTC 24 165341094400 ps
T727 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.447374466 Oct 12 02:05:07 AM UTC 24 Oct 12 02:16:00 AM UTC 24 488511400837 ps
T728 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.3907805467 Oct 12 02:03:34 AM UTC 24 Oct 12 02:16:09 AM UTC 24 131183121805 ps
T729 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.7049499 Oct 12 02:09:04 AM UTC 24 Oct 12 02:16:13 AM UTC 24 94536820414 ps
T730 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.992399188 Oct 12 02:16:14 AM UTC 24 Oct 12 02:16:17 AM UTC 24 403768524 ps
T731 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3117881207 Oct 12 02:15:55 AM UTC 24 Oct 12 02:16:23 AM UTC 24 24899203550 ps
T732 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.1136037372 Oct 12 02:16:18 AM UTC 24 Oct 12 02:16:26 AM UTC 24 5587673686 ps
T733 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.2335398048 Oct 12 02:16:00 AM UTC 24 Oct 12 02:16:27 AM UTC 24 3747885620 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.264095551 Oct 12 01:48:47 AM UTC 24 Oct 12 02:16:32 AM UTC 24 669483386312 ps
T734 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.2192650272 Oct 12 02:09:49 AM UTC 24 Oct 12 02:16:33 AM UTC 24 495247532818 ps
T735 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.3915525517 Oct 12 02:14:50 AM UTC 24 Oct 12 02:16:39 AM UTC 24 166717053392 ps
T736 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.82859874 Oct 12 02:08:51 AM UTC 24 Oct 12 02:16:47 AM UTC 24 174344310750 ps
T737 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.1549247785 Oct 12 02:14:46 AM UTC 24 Oct 12 02:16:57 AM UTC 24 163876305513 ps
T738 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.4259738622 Oct 12 02:11:32 AM UTC 24 Oct 12 02:17:14 AM UTC 24 325693504663 ps
T739 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.2895231862 Oct 12 02:17:15 AM UTC 24 Oct 12 02:17:19 AM UTC 24 2734247926 ps
T740 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.16304785 Oct 12 02:14:45 AM UTC 24 Oct 12 02:17:26 AM UTC 24 326655110774 ps
T741 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.1008436929 Oct 12 01:57:32 AM UTC 24 Oct 12 02:17:33 AM UTC 24 493725618584 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.3015359021 Oct 12 02:10:04 AM UTC 24 Oct 12 02:17:37 AM UTC 24 337178489017 ps
T742 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.501302454 Oct 12 02:14:52 AM UTC 24 Oct 12 02:17:41 AM UTC 24 234113037272 ps
T743 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.1323447219 Oct 12 02:17:42 AM UTC 24 Oct 12 02:17:45 AM UTC 24 439587210 ps
T744 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.3542595171 Oct 12 02:17:34 AM UTC 24 Oct 12 02:17:56 AM UTC 24 16916917068 ps
T359 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.1708748118 Oct 12 01:43:00 AM UTC 24 Oct 12 02:18:04 AM UTC 24 550795875268 ps
T745 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.2370761504 Oct 12 02:00:32 AM UTC 24 Oct 12 02:18:10 AM UTC 24 329225755709 ps
T746 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.281550777 Oct 12 02:17:47 AM UTC 24 Oct 12 02:18:12 AM UTC 24 5715814886 ps
T747 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.2763118741 Oct 12 02:16:27 AM UTC 24 Oct 12 02:18:14 AM UTC 24 160015407240 ps
T748 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.1756177734 Oct 12 02:13:08 AM UTC 24 Oct 12 02:18:46 AM UTC 24 167880303338 ps
T309 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.1257490993 Oct 12 02:16:09 AM UTC 24 Oct 12 02:18:55 AM UTC 24 188414288647 ps
T749 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.2494916666 Oct 12 02:07:30 AM UTC 24 Oct 12 02:19:01 AM UTC 24 498355408138 ps
T750 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.2393484089 Oct 12 02:13:45 AM UTC 24 Oct 12 02:19:21 AM UTC 24 363390121410 ps
T751 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.3116161750 Oct 12 02:13:31 AM UTC 24 Oct 12 02:19:23 AM UTC 24 495282864489 ps
T752 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.4019884056 Oct 12 01:58:37 AM UTC 24 Oct 12 02:19:28 AM UTC 24 489603755318 ps
T753 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.2324750621 Oct 12 02:19:22 AM UTC 24 Oct 12 02:19:40 AM UTC 24 3708055489 ps
T754 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.1453593090 Oct 12 02:08:23 AM UTC 24 Oct 12 02:19:42 AM UTC 24 491378749141 ps
T755 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.1624346608 Oct 12 02:19:41 AM UTC 24 Oct 12 02:19:53 AM UTC 24 5364418531 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.323968091 Oct 12 02:09:19 AM UTC 24 Oct 12 02:19:54 AM UTC 24 166173987337 ps
T756 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.107068622 Oct 12 02:10:28 AM UTC 24 Oct 12 02:19:54 AM UTC 24 173401091544 ps
T757 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.451523199 Oct 12 02:19:54 AM UTC 24 Oct 12 02:19:58 AM UTC 24 450299484 ps
T758 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.2478182540 Oct 12 02:00:54 AM UTC 24 Oct 12 02:19:58 AM UTC 24 401242376838 ps
T759 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup_fixed.1075296102 Oct 12 02:18:47 AM UTC 24 Oct 12 02:20:00 AM UTC 24 203088919147 ps
T760 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.691128182 Oct 12 02:19:23 AM UTC 24 Oct 12 02:20:03 AM UTC 24 41762961985 ps
T327 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.2772235275 Oct 12 02:16:47 AM UTC 24 Oct 12 02:20:17 AM UTC 24 171095750458 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.296014802 Oct 12 02:15:17 AM UTC 24 Oct 12 02:20:22 AM UTC 24 516511952278 ps
T761 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.246210574 Oct 12 02:17:20 AM UTC 24 Oct 12 02:20:35 AM UTC 24 47697954617 ps
T762 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.1454130121 Oct 12 02:06:52 AM UTC 24 Oct 12 02:20:42 AM UTC 24 535209306066 ps
T763 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.3162323217 Oct 12 02:18:56 AM UTC 24 Oct 12 02:21:14 AM UTC 24 182735000388 ps
T764 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.21505153 Oct 12 02:16:33 AM UTC 24 Oct 12 02:21:23 AM UTC 24 491007927567 ps
T765 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.2145926955 Oct 12 02:12:10 AM UTC 24 Oct 12 02:21:30 AM UTC 24 193074078488 ps
T766 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup_fixed.3674157271 Oct 12 02:16:40 AM UTC 24 Oct 12 02:21:41 AM UTC 24 205468988668 ps
T767 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.2349991255 Oct 12 02:13:40 AM UTC 24 Oct 12 02:21:48 AM UTC 24 323708930618 ps
T768 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.996901756 Oct 12 02:13:11 AM UTC 24 Oct 12 02:22:15 AM UTC 24 490963841551 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.154414524 Oct 12 02:01:45 AM UTC 24 Oct 12 02:22:33 AM UTC 24 520511527253 ps
T769 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.3717885807 Oct 12 02:02:53 AM UTC 24 Oct 12 02:22:36 AM UTC 24 492173224060 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.785631418 Oct 12 02:11:30 AM UTC 24 Oct 12 02:22:57 AM UTC 24 494924111346 ps
T770 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.509811563 Oct 12 02:04:04 AM UTC 24 Oct 12 02:23:05 AM UTC 24 405983789665 ps
T771 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.2145091800 Oct 12 02:14:42 AM UTC 24 Oct 12 02:23:12 AM UTC 24 165478811089 ps
T772 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.1788293984 Oct 12 02:16:00 AM UTC 24 Oct 12 02:23:25 AM UTC 24 62722531640 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.152101942 Oct 12 02:01:00 AM UTC 24 Oct 12 02:23:26 AM UTC 24 531615659488 ps
T773 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.2555762726 Oct 12 02:11:53 AM UTC 24 Oct 12 02:23:46 AM UTC 24 488923405115 ps
T774 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.3385609516 Oct 12 02:12:38 AM UTC 24 Oct 12 02:23:55 AM UTC 24 131312988583 ps
T775 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.3273630998 Oct 12 02:16:34 AM UTC 24 Oct 12 02:24:06 AM UTC 24 165177804282 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.1345145531 Oct 12 02:18:15 AM UTC 24 Oct 12 02:24:11 AM UTC 24 531047026079 ps
T776 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.110935807 Oct 12 02:12:10 AM UTC 24 Oct 12 02:24:38 AM UTC 24 351323806951 ps
T777 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.3330896537 Oct 12 02:19:43 AM UTC 24 Oct 12 02:24:40 AM UTC 24 167946294617 ps
T354 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.261783981 Oct 12 02:14:29 AM UTC 24 Oct 12 02:25:24 AM UTC 24 104460848156 ps
T778 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.2862954726 Oct 12 02:03:53 AM UTC 24 Oct 12 02:25:25 AM UTC 24 485545914745 ps
T779 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.2596421380 Oct 12 02:01:29 AM UTC 24 Oct 12 02:25:42 AM UTC 24 492182593221 ps
T780 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.2967884085 Oct 12 02:10:56 AM UTC 24 Oct 12 02:25:47 AM UTC 24 125692023072 ps
T781 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.1148851040 Oct 12 02:09:05 AM UTC 24 Oct 12 02:25:53 AM UTC 24 281141385738 ps
T782 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.3829672211 Oct 12 02:17:27 AM UTC 24 Oct 12 02:26:04 AM UTC 24 73264199718 ps
T783 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.1319206503 Oct 12 02:18:13 AM UTC 24 Oct 12 02:26:18 AM UTC 24 163384273587 ps
T204 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.4012633485 Oct 12 02:14:15 AM UTC 24 Oct 12 02:26:23 AM UTC 24 512030867438 ps
T784 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.666170652 Oct 12 02:18:05 AM UTC 24 Oct 12 02:26:41 AM UTC 24 163351211444 ps
T785 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.2574435484 Oct 12 02:16:57 AM UTC 24 Oct 12 02:26:43 AM UTC 24 208220342669 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.3637977735 Oct 12 02:14:35 AM UTC 24 Oct 12 02:27:03 AM UTC 24 523032540299 ps
T235 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.3554893550 Oct 12 02:11:34 AM UTC 24 Oct 12 02:27:14 AM UTC 24 331773010098 ps
T786 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.1946406478 Oct 12 02:12:54 AM UTC 24 Oct 12 02:27:33 AM UTC 24 324220113290 ps
T787 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.1023266457 Oct 12 02:09:27 AM UTC 24 Oct 12 02:30:43 AM UTC 24 497058136635 ps
T788 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.552827004 Oct 12 02:14:04 AM UTC 24 Oct 12 02:30:48 AM UTC 24 396821724007 ps
T789 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.1163604144 Oct 12 02:19:29 AM UTC 24 Oct 12 02:31:02 AM UTC 24 97428391688 ps
T790 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.2079714503 Oct 12 02:10:15 AM UTC 24 Oct 12 02:31:03 AM UTC 24 408497550636 ps
T791 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.831395378 Oct 12 02:12:13 AM UTC 24 Oct 12 02:31:11 AM UTC 24 502028593205 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.1199879733 Oct 12 02:18:11 AM UTC 24 Oct 12 02:31:18 AM UTC 24 325750430925 ps
T792 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all.1878333572 Oct 12 02:17:37 AM UTC 24 Oct 12 02:31:46 AM UTC 24 632073030746 ps
T793 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.2123347339 Oct 12 02:06:26 AM UTC 24 Oct 12 02:32:33 AM UTC 24 492863852225 ps
T794 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.3744226441 Oct 12 02:01:49 AM UTC 24 Oct 12 02:32:55 AM UTC 24 604478218000 ps
T795 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.564988383 Oct 12 02:08:40 AM UTC 24 Oct 12 02:33:02 AM UTC 24 605415862050 ps
T796 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.407044229 Oct 12 02:16:23 AM UTC 24 Oct 12 02:33:55 AM UTC 24 337201346075 ps
T797 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.1112702692 Oct 12 02:12:05 AM UTC 24 Oct 12 02:34:10 AM UTC 24 536276034003 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.2577174868 Oct 12 02:19:02 AM UTC 24 Oct 12 02:35:44 AM UTC 24 371044712924 ps
T798 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.3351101292 Oct 12 02:06:47 AM UTC 24 Oct 12 02:35:47 AM UTC 24 594724498019 ps
T799 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.827746727 Oct 12 02:16:29 AM UTC 24 Oct 12 02:35:57 AM UTC 24 493010659765 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.73217127 Oct 12 02:15:24 AM UTC 24 Oct 12 02:36:27 AM UTC 24 498020213941 ps
T330 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.1270038153 Oct 12 02:00:07 AM UTC 24 Oct 12 02:36:28 AM UTC 24 452201045548 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.1521569032 Oct 12 02:17:57 AM UTC 24 Oct 12 02:36:36 AM UTC 24 495018804173 ps
T800 /workspaces/repo/scratch/os_regression_2024_10_11/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.1971037481 Oct 12 02:08:30 AM UTC 24 Oct 12 02:36:51 AM UTC 24 621601245072 ps
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