Testbench Group List
dashboard | hierarchy | modlist | groups | tests | asserts
Total Groups Coverage Summary 
COVEREDEXPECTEDSCORECOVEREDEXPECTEDINST SCOREWEIGHT
1965 4525 43.43 1965 4525 43.43 1


Total groups in report: 16
NAMECOVEREDEXPECTEDSCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSINGCOMMENT
aon_timer_env_pkg::aon_timer_env_cov::watchdog_timer_bite_thold_hit_cg 317 1028 30.84 1 100 1 0 64 64
aon_timer_env_pkg::aon_timer_env_cov::watchdog_timer_bark_thold_hit_cg 325 1028 31.61 1 100 1 0 64 64
aon_timer_env_pkg::aon_timer_env_cov::wake_up_timer_thold_hit_cg 916 2050 44.68 1 100 1 0 64 64
tl_agent_pkg::pending_req_on_rst_cg 1 2 50.00 50.00 1 100 1 1 64 64
cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=1} 13 20 65.00 1 100 1 0 64 64
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg 12 15 80.00 100.00 1 100 1 1 64 64
cip_base_pkg::tl_intg_err_cg_wrap::tl_intg_err_cg 13 14 92.86 100.00 1 100 1 1 64 64
aon_timer_env_pkg::aon_timer_env_cov::timer_cfg_cg 169 173 97.69 1 100 1 0 64 64
alert_esc_agent_pkg::alert_handshake_complete_cg 3 3 100.00 100.00 1 100 1 1 64 64
cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=1} 14 14 100.00 1 100 1 0 64 64
cip_base_pkg::intr_pins_cg::SHAPE{(num_interrupts - 1)=1} 14 14 100.00 1 100 1 0 64 64
dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg 2 2 100.00 100.00 1 100 1 1 64 64
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg 4 4 100.00 100.00 1 100 1 1 64 64
tb.dut.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=1} 1 1 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128} 137 137 100.00 100.00 1 100 1 1 64 64
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