ENTROPY_SRC Simulation Results

Saturday May 20 2023 07:05:26 UTC

GitHub Revision: e3fb01b5e

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 2781625531

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	5.000s	138.391us	50	50	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	3.000s	151.462us	5	5	100.00
V1	csr_rw	entropy_src_csr_rw	5.000s	51.471us	20	20	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	13.000s	1.659ms	5	5	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	7.000s	152.540us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	6.000s	89.106us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	5.000s	51.471us	20	20	100.00
		entropy_src_csr_aliasing	7.000s	152.540us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	firmware	entropy_src_smoke	5.000s	138.391us	50	50	100.00
		entropy_src_rng	10.633m	10.017ms	299	300	99.67
		entropy_src_fw_ov	1.917m	5.025ms	300	300	100.00
V2	firmware_mode	entropy_src_fw_ov	1.917m	5.025ms	300	300	100.00
V2	rng_mode	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2	rng_max_rate	entropy_src_rng_max_rate	10.667m	10.013ms	399	400	99.75
V2	health_checks	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2	conditioning	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2	interrupts	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2	alerts	entropy_src_rng	10.633m	10.017ms	299	300	99.67
		entropy_src_functional_alerts	6.000s	117.173us	50	50	100.00
V2	stress_all	entropy_src_stress_all	12.000s	602.799us	50	50	100.00
V2	functional_errors	entropy_src_functional_errors	6.000s	164.814us	1000	1000	100.00
V2	intr_test	entropy_src_intr_test	5.000s	43.160us	50	50	100.00
V2	alert_test	entropy_src_alert_test	4.000s	51.262us	50	50	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	7.000s	182.716us	20	20	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	7.000s	182.716us	20	20	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	3.000s	151.462us	5	5	100.00
		entropy_src_csr_rw	5.000s	51.471us	20	20	100.00
		entropy_src_csr_aliasing	7.000s	152.540us	5	5	100.00
		entropy_src_same_csr_outstanding	5.000s	525.159us	20	20	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	3.000s	151.462us	5	5	100.00
		entropy_src_csr_rw	5.000s	51.471us	20	20	100.00
		entropy_src_csr_aliasing	7.000s	152.540us	5	5	100.00
		entropy_src_same_csr_outstanding	5.000s	525.159us	20	20	100.00
V2		TOTAL			2238	2240	99.91
V2S	tl_intg_err	entropy_src_sec_cm	4.000s	49.880us	5	5	100.00
		entropy_src_tl_intg_err	7.000s	667.002us	20	20	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	10.633m	10.017ms	299	300	99.67
		entropy_src_cfg_regwen	4.000s	22.697us	50	50	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2S	sec_cm_config_redun	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2S	sec_cm_intersig_mubi	entropy_src_rng	10.633m	10.017ms	299	300	99.67
		entropy_src_fw_ov	1.917m	5.025ms	300	300	100.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	6.000s	164.814us	1000	1000	100.00
		entropy_src_sec_cm	4.000s	49.880us	5	5	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	6.000s	164.814us	1000	1000	100.00
		entropy_src_sec_cm	4.000s	49.880us	5	5	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	10.633m	10.017ms	299	300	99.67
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	6.000s	164.814us	1000	1000	100.00
		entropy_src_sec_cm	4.000s	49.880us	5	5	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	6.000s	164.814us	1000	1000	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	6.000s	117.173us	50	50	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	7.000s	667.002us	20	20	100.00
V2S		TOTAL			75	75	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	4.333m	10.022ms	50	50	100.00
V3	stress_all_with_rand_reset	entropy_src_stress_all_with_rand_reset			0	0	--
V3		TOTAL			50	50	100.00
		TOTAL			2468	2470	99.92

Testplan Progress

Items	Total	Written	Passing	Progress
V1	6	6	6	100.00
V2	10	10	8	80.00
V2S	3	3	3	100.00
V3	2	1	1	50.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.42	99.04	97.60	99.68	96.93	99.40	87.39	91.61	96.57

Failure Buckets

• UVM_ERROR (entropy_src_scoreboard.sv:1804) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.alert_summary_fail_counts has 1 failures:

  • Test entropy_src_rng has 1 failures.

    • 88.entropy_src_rng.1380588913
      Line 991, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/88.entropy_src_rng/latest/run.log

        UVM_ERROR @ 9874387454 ps: (entropy_src_scoreboard.sv:1804) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 0 [0x0]) reg name: entropy_src_reg_block.alert_summary_fail_counts
        UVM_INFO @ 9874387454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (entropy_src_base_vseq.sv:426) [entropy_src_rng_vseq] Timeout encountered while reading TlSrcObserveFIFO has 1 failures:

  • Test entropy_src_rng_max_rate has 1 failures.

    • 172.entropy_src_rng_max_rate.103265335
      Line 694, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/172.entropy_src_rng_max_rate/latest/run.log

        UVM_FATAL @ 8371813462 ps: (entropy_src_base_vseq.sv:426) [uvm_test_top.env.virtual_sequencer.entropy_src_rng_vseq] Timeout encountered while reading TlSrcObserveFIFO
        UVM_INFO @ 8371813462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

Past Results

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