ENTROPY_SRC Simulation Results

Sunday October 15 2023 19:02:25 UTC

GitHub Revision: `b2a255f8a`

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 1600673825

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	12.000s	25.158us	50	50	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	8.000s	45.064us	5	5	100.00
V1	csr_rw	entropy_src_csr_rw	13.000s	14.482us	20	20	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	16.000s	1.318ms	5	5	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	11.000s	146.257us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	14.000s	61.833us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	13.000s	14.482us	20	20	100.00
		entropy_src_csr_aliasing	11.000s	146.257us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	firmware	entropy_src_smoke	12.000s	25.158us	50	50	100.00
		entropy_src_rng	10.850m	10.015ms	300	300	100.00
		entropy_src_fw_ov	2.200m	5.080ms	298	300	99.33
V2	firmware_mode	entropy_src_fw_ov	2.200m	5.080ms	298	300	99.33
V2	rng_mode	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	11.033m	10.013ms	400	400	100.00
V2	health_checks	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2	conditioning	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2	interrupts	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2	alerts	entropy_src_rng	10.850m	10.015ms	300	300	100.00
		entropy_src_functional_alerts	10.000s	98.398us	50	50	100.00
V2	stress_all	entropy_src_stress_all	17.000s	1.026ms	50	50	100.00
V2	functional_errors	entropy_src_functional_errors	15.000s	122.136us	1000	1000	100.00
V2	intr_test	entropy_src_intr_test	17.000s	22.690us	50	50	100.00
V2	alert_test	entropy_src_alert_test	9.000s	91.574us	50	50	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	9.000s	310.468us	20	20	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	9.000s	310.468us	20	20	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	8.000s	45.064us	5	5	100.00
		entropy_src_csr_rw	13.000s	14.482us	20	20	100.00
		entropy_src_csr_aliasing	11.000s	146.257us	5	5	100.00
		entropy_src_same_csr_outstanding	10.000s	25.343us	20	20	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	8.000s	45.064us	5	5	100.00
		entropy_src_csr_rw	13.000s	14.482us	20	20	100.00
		entropy_src_csr_aliasing	11.000s	146.257us	5	5	100.00
		entropy_src_same_csr_outstanding	10.000s	25.343us	20	20	100.00
V2		TOTAL			2238	2240	99.91
V2S	tl_intg_err	entropy_src_sec_cm	6.000s	97.792us	5	5	100.00
		entropy_src_tl_intg_err	8.000s	193.169us	20	20	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	10.850m	10.015ms	300	300	100.00
		entropy_src_cfg_regwen	9.000s	15.787us	50	50	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2S	sec_cm_config_redun	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	10.850m	10.015ms	300	300	100.00
		entropy_src_fw_ov	2.200m	5.080ms	298	300	99.33
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	15.000s	122.136us	1000	1000	100.00
		entropy_src_sec_cm	6.000s	97.792us	5	5	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	15.000s	122.136us	1000	1000	100.00
		entropy_src_sec_cm	6.000s	97.792us	5	5	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	10.850m	10.015ms	300	300	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	15.000s	122.136us	1000	1000	100.00
		entropy_src_sec_cm	6.000s	97.792us	5	5	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	15.000s	122.136us	1000	1000	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	10.000s	98.398us	50	50	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	8.000s	193.169us	20	20	100.00
V2S		TOTAL			75	75	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	9.967m	10.016ms	50	50	100.00
V3	stress_all_with_rand_reset	entropy_src_stress_all_with_rand_reset			0	0	--
V3		TOTAL			50	50	100.00
		TOTAL			2468	2470	99.92

Testplan Progress

Items	Total	Written	Passing	Progress
V1	6	6	6	100.00
V2	10	10	9	90.00
V2S	3	3	3	100.00
V3	2	1	1	50.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.36	98.84	97.11	99.68	96.27	99.40	97.00	91.61	96.83

Failure Buckets

Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_*/rtl/entropy_src_core.sv,2990): Assertion AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed

has 2 failures:

Test entropy_src_fw_ov has 2 failures.

183.entropy_src_fw_ov.2998845756
Line 1632, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/183.entropy_src_fw_ov/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_0.1/rtl/entropy_src_core.sv,2990): (time 4796070557 PS) Assertion tb.dut.u_entropy_src_core.AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
  UVM_ERROR @ 4796070557 ps: (entropy_src_core.sv:2990) [ASSERT FAILED] AtReset_EsbitFifoPushedIntoPosthtFifo_A
  UVM_INFO @ 4796070557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

254.entropy_src_fw_ov.1312524433
Line 467, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/254.entropy_src_fw_ov/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_0.1/rtl/entropy_src_core.sv,2990): (time 1771708498 PS) Assertion tb.dut.u_entropy_src_core.AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
  UVM_ERROR @ 1771708498 ps: (entropy_src_core.sv:2990) [ASSERT FAILED] AtReset_EsbitFifoPushedIntoPosthtFifo_A
  UVM_INFO @ 1771708498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---