a9c19f09f3
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | entropy_src_smoke | 9.000s | 79.299us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | entropy_src_csr_hw_reset | 3.000s | 48.998us | 5 | 5 | 100.00 |
V1 | csr_rw | entropy_src_csr_rw | 12.000s | 129.166us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | entropy_src_csr_bit_bash | 20.000s | 2.764ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | entropy_src_csr_aliasing | 8.000s | 218.899us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 8.000s | 86.576us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 12.000s | 129.166us | 20 | 20 | 100.00 |
entropy_src_csr_aliasing | 8.000s | 218.899us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | firmware | entropy_src_smoke | 9.000s | 79.299us | 50 | 50 | 100.00 |
entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 | ||
entropy_src_fw_ov | 2.183m | 5.024ms | 297 | 300 | 99.00 | ||
V2 | firmware_mode | entropy_src_fw_ov | 2.183m | 5.024ms | 297 | 300 | 99.00 |
V2 | rng_mode | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2 | rng_max_rate | entropy_src_rng_max_rate | 11.233m | 10.013ms | 400 | 400 | 100.00 |
V2 | health_checks | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2 | conditioning | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2 | interrupts | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2 | alerts | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
entropy_src_functional_alerts | 13.000s | 60.743us | 50 | 50 | 100.00 | ||
V2 | stress_all | entropy_src_stress_all | 10.000s | 1.006ms | 50 | 50 | 100.00 |
V2 | functional_errors | entropy_src_functional_errors | 13.000s | 44.042us | 1000 | 1000 | 100.00 |
V2 | intr_test | entropy_src_intr_test | 14.000s | 16.905us | 50 | 50 | 100.00 |
V2 | alert_test | entropy_src_alert_test | 4.000s | 17.890us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 14.000s | 44.706us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | entropy_src_tl_errors | 14.000s | 44.706us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 3.000s | 48.998us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 12.000s | 129.166us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 8.000s | 218.899us | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 9.000s | 96.599us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 3.000s | 48.998us | 5 | 5 | 100.00 |
entropy_src_csr_rw | 12.000s | 129.166us | 20 | 20 | 100.00 | ||
entropy_src_csr_aliasing | 8.000s | 218.899us | 5 | 5 | 100.00 | ||
entropy_src_same_csr_outstanding | 9.000s | 96.599us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 2237 | 2240 | 99.87 | |||
V2S | tl_intg_err | entropy_src_sec_cm | 4.000s | 251.843us | 5 | 5 | 100.00 |
entropy_src_tl_intg_err | 11.000s | 348.528us | 20 | 20 | 100.00 | ||
V2S | sec_cm_config_regwen | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
entropy_src_cfg_regwen | 8.000s | 79.518us | 50 | 50 | 100.00 | ||
V2S | sec_cm_config_mubi | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2S | sec_cm_config_redun | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2S | sec_cm_intersig_mubi | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
entropy_src_fw_ov | 2.183m | 5.024ms | 297 | 300 | 99.00 | ||
V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 13.000s | 44.042us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 251.843us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 13.000s | 44.042us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 251.843us | 5 | 5 | 100.00 | ||
V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 11.333m | 10.015ms | 300 | 300 | 100.00 |
V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 13.000s | 44.042us | 1000 | 1000 | 100.00 |
entropy_src_sec_cm | 4.000s | 251.843us | 5 | 5 | 100.00 | ||
V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 13.000s | 44.042us | 1000 | 1000 | 100.00 |
V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 13.000s | 60.743us | 50 | 50 | 100.00 |
V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 11.000s | 348.528us | 20 | 20 | 100.00 |
V2S | TOTAL | 75 | 75 | 100.00 | |||
V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 9.300m | 10.014ms | 50 | 50 | 100.00 |
V3 | stress_all_with_rand_reset | entropy_src_stress_all_with_rand_reset | 0 | 0 | -- | ||
V3 | TOTAL | 50 | 50 | 100.00 | |||
TOTAL | 2467 | 2470 | 99.88 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 10 | 10 | 9 | 90.00 |
V2S | 3 | 3 | 3 | 100.00 |
V3 | 2 | 1 | 1 | 50.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.40 | 98.84 | 97.11 | 99.68 | 96.27 | 99.40 | 97.00 | 91.61 | 97.09 |
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_*/rtl/entropy_src_core.sv,2990): (time * NS) Assertion AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
has 1 failures:
2.entropy_src_fw_ov.10002642752711019169769247080596039061409217693992861298962903310907311807131
Line 606, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/2.entropy_src_fw_ov/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_0.1/rtl/entropy_src_core.sv,2990): (time 1489763 NS) Assertion tb.dut.u_entropy_src_core.AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
UVM_ERROR @ 1489763000 ps: (entropy_src_core.sv:2990) [ASSERT FAILED] AtReset_EsbitFifoPushedIntoPosthtFifo_A
UVM_INFO @ 1489763000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_ERROR (cip_base_scoreboard.sv:288) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
has 1 failures:
181.entropy_src_fw_ov.2811017028262004773781211322194074410861478984629305063037349051065798463682
Line 646, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/181.entropy_src_fw_ov/latest/run.log
UVM_ERROR @ 3508437434 ps: (cip_base_scoreboard.sv:288) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_alert did not trigger max_delay:5
UVM_INFO @ 3508437434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_*/rtl/entropy_src_core.sv,2990): Assertion AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
has 1 failures:
288.entropy_src_fw_ov.55580673529316585338893404148254956307308347295707547119774808182245184049648
Line 732, in log /container/opentitan-public/scratch/os_regression/entropy_src-sim-xcelium/288.entropy_src_fw_ov/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_entropy_src_0.1/rtl/entropy_src_core.sv,2990): (time 3319420494 PS) Assertion tb.dut.u_entropy_src_core.AtReset_EsbitFifoPushedIntoPosthtFifo_A has failed
UVM_ERROR @ 3319420494 ps: (entropy_src_core.sv:2990) [ASSERT FAILED] AtReset_EsbitFifoPushedIntoPosthtFifo_A
UVM_INFO @ 3319420494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---