ENTROPY_SRC Simulation Results

Tuesday August 06 2024 23:02:29 UTC

GitHub Revision: 5fd4ecc0fc

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 56304622830272859824235340993951659280265419461975949533183046575604373639200

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 4.000s 31.549us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 4.000s 175.461us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 4.000s 61.076us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 15.000s 10.920ms 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 6.000s 82.514us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 3.000s 157.619us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 4.000s 61.076us 20 20 100.00
entropy_src_csr_aliasing 6.000s 82.514us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 4.000s 31.549us 50 50 100.00
entropy_src_rng 10.250m 20.062ms 299 300 99.67
entropy_src_fw_ov 10.550m 20.036ms 252 300 84.00
V2 firmware_mode entropy_src_fw_ov 10.550m 20.036ms 252 300 84.00
V2 rng_mode entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2 rng_max_rate entropy_src_rng_max_rate 18.533m 20.083ms 394 400 98.50
V2 health_checks entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2 conditioning entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2 interrupts entropy_src_rng 10.250m 20.062ms 299 300 99.67
entropy_src_intr 34.000s 1.946ms 50 50 100.00
V2 alerts entropy_src_rng 10.250m 20.062ms 299 300 99.67
entropy_src_functional_alerts 4.000s 59.648us 50 50 100.00
V2 stress_all entropy_src_stress_all 8.800m 20.120ms 50 50 100.00
V2 functional_errors entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 26.000s 1.719ms 50 50 100.00
V2 intr_test entropy_src_intr_test 4.000s 31.316us 50 50 100.00
V2 alert_test entropy_src_alert_test 3.000s 20.930us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 7.000s 139.505us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 7.000s 139.505us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 4.000s 175.461us 5 5 100.00
entropy_src_csr_rw 4.000s 61.076us 20 20 100.00
entropy_src_csr_aliasing 6.000s 82.514us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 403.711us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 4.000s 175.461us 5 5 100.00
entropy_src_csr_rw 4.000s 61.076us 20 20 100.00
entropy_src_csr_aliasing 6.000s 82.514us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 403.711us 20 20 100.00
V2 TOTAL 2249 2340 96.11
V2S tl_intg_err entropy_src_sec_cm 4.000s 53.048us 5 5 100.00
entropy_src_tl_intg_err 6.000s 166.633us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 10.250m 20.062ms 299 300 99.67
entropy_src_cfg_regwen 4.000s 21.698us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2S sec_cm_config_redun entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2S sec_cm_intersig_mubi entropy_src_rng 10.250m 20.062ms 299 300 99.67
entropy_src_fw_ov 10.550m 20.036ms 252 300 84.00
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
entropy_src_sec_cm 4.000s 53.048us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
entropy_src_sec_cm 4.000s 53.048us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 10.250m 20.062ms 299 300 99.67
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
entropy_src_sec_cm 4.000s 53.048us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
entropy_src_sec_cm 4.000s 53.048us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 9.933m 10.012ms 964 1000 96.40
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 4.000s 59.648us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 6.000s 166.633us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 9.450m 18.078ms 50 50 100.00
V3 stress_all_with_rand_reset entropy_src_stress_all_with_rand_reset 0 0 --
V3 TOTAL 50 50 100.00
TOTAL 2479 2570 96.46

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 12 12 8 66.67
V2S 3 3 3 100.00
V3 2 1 1 50.00

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
97.16 98.19 95.43 98.36 95.88 96.59 97.92 90.49 95.93

Failure Buckets

Past Results