Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.57 99.54 98.47 100.00 100.00 99.76 99.49 99.72


Total tests in report: 907
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
56.01 56.01 40.36 40.36 46.01 46.01 91.96 91.96 100.00 100.00 28.94 28.94 79.55 79.55 5.23 5.23 /workspace/coverage/cover_reg_top/15.hmac_csr_mem_rw_with_rand_reset.217696081
91.55 35.54 98.22 57.86 92.02 46.01 96.48 4.52 100.00 0.00 97.88 68.94 93.94 14.39 62.31 57.08 /workspace/coverage/default/16.hmac_stress_all_with_rand_reset.1864372520
95.54 3.99 99.23 1.01 95.08 3.06 96.98 0.50 100.00 0.00 98.12 0.24 95.45 1.52 83.91 21.60 /workspace/coverage/cover_reg_top/9.hmac_tl_errors.2687572241
97.15 1.61 99.38 0.15 97.16 2.08 98.24 1.26 100.00 0.00 99.06 0.94 95.71 0.25 90.51 6.60 /workspace/coverage/cover_reg_top/49.hmac_intr_test.1582306162
97.98 0.83 99.54 0.15 97.60 0.44 98.99 0.75 100.00 0.00 99.53 0.47 95.96 0.25 94.22 3.71 /workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.3454004603
98.27 0.29 99.54 0.00 97.60 0.00 98.99 0.00 100.00 0.00 99.53 0.00 97.98 2.02 94.22 0.00 /workspace/coverage/cover_reg_top/2.hmac_csr_rw.3553022841
98.54 0.28 99.54 0.00 97.60 0.00 98.99 0.00 100.00 0.00 99.53 0.00 97.98 0.00 96.15 1.93 /workspace/coverage/default/31.hmac_stress_all.2535221519
98.72 0.18 99.54 0.00 97.81 0.22 99.50 0.50 100.00 0.00 99.53 0.00 98.23 0.25 96.42 0.28 /workspace/coverage/default/1.hmac_sec_cm.346698133
98.83 0.11 99.54 0.00 97.81 0.00 100.00 0.50 100.00 0.00 99.53 0.00 98.23 0.00 96.70 0.28 /workspace/coverage/cover_reg_top/16.hmac_tl_intg_err.3235036139
98.91 0.08 99.54 0.00 98.03 0.22 100.00 0.00 100.00 0.00 99.76 0.24 98.23 0.00 96.84 0.14 /workspace/coverage/default/13.hmac_long_msg.1044238322
98.99 0.08 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 97.39 0.55 /workspace/coverage/cover_reg_top/27.hmac_intr_test.3238599254
99.05 0.06 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 97.80 0.41 /workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.389137171
99.11 0.06 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 98.21 0.41 /workspace/coverage/default/145.hmac_stress_all_with_rand_reset.3368727201
99.17 0.06 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.23 0.00 98.62 0.41 /workspace/coverage/default/37.hmac_stress_all_with_rand_reset.1091903696
99.23 0.06 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.25 98.76 0.14 /workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.3524481980
99.26 0.04 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.04 0.28 /workspace/coverage/default/158.hmac_stress_all_with_rand_reset.2034926733
99.30 0.04 99.54 0.00 98.03 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.28 /workspace/coverage/default/190.hmac_stress_all_with_rand_reset.752280483
99.34 0.03 99.54 0.00 98.25 0.22 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.00 /workspace/coverage/cover_reg_top/0.hmac_csr_mem_rw_with_rand_reset.2676263612
99.37 0.03 99.54 0.00 98.47 0.22 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.31 0.00 /workspace/coverage/default/12.hmac_alert_test.3177841204
99.39 0.02 99.54 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.45 0.14 /workspace/coverage/cover_reg_top/9.hmac_tl_intg_err.156887079
99.41 0.02 99.54 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.59 0.14 /workspace/coverage/default/182.hmac_stress_all_with_rand_reset.1217468470
99.43 0.02 99.54 0.00 98.47 0.00 100.00 0.00 100.00 0.00 99.76 0.00 98.48 0.00 99.72 0.14 /workspace/coverage/default/22.hmac_stress_all_with_rand_reset.999052835

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.hmac_csr_aliasing.531777858
/workspace/coverage/cover_reg_top/0.hmac_csr_bit_bash.4252843025
/workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.159284202
/workspace/coverage/cover_reg_top/0.hmac_csr_rw.2518258768
/workspace/coverage/cover_reg_top/0.hmac_intr_test.442418361
/workspace/coverage/cover_reg_top/0.hmac_same_csr_outstanding.1478425515
/workspace/coverage/cover_reg_top/0.hmac_tl_errors.2583268740
/workspace/coverage/cover_reg_top/0.hmac_tl_intg_err.3694924290
/workspace/coverage/cover_reg_top/1.hmac_csr_aliasing.2119944182
/workspace/coverage/cover_reg_top/1.hmac_csr_bit_bash.4141087526
/workspace/coverage/cover_reg_top/1.hmac_csr_hw_reset.2220739959
/workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.1724107671
/workspace/coverage/cover_reg_top/1.hmac_csr_rw.2447002971
/workspace/coverage/cover_reg_top/1.hmac_intr_test.69239656
/workspace/coverage/cover_reg_top/1.hmac_same_csr_outstanding.1044597240
/workspace/coverage/cover_reg_top/1.hmac_tl_errors.1483998062
/workspace/coverage/cover_reg_top/1.hmac_tl_intg_err.417577914
/workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.869338993
/workspace/coverage/cover_reg_top/10.hmac_csr_rw.3306412730
/workspace/coverage/cover_reg_top/10.hmac_intr_test.300377991
/workspace/coverage/cover_reg_top/10.hmac_same_csr_outstanding.2757040585
/workspace/coverage/cover_reg_top/10.hmac_tl_errors.2834983428
/workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.2842016890
/workspace/coverage/cover_reg_top/11.hmac_csr_mem_rw_with_rand_reset.543356543
/workspace/coverage/cover_reg_top/11.hmac_csr_rw.3669543292
/workspace/coverage/cover_reg_top/11.hmac_intr_test.3798169038
/workspace/coverage/cover_reg_top/11.hmac_same_csr_outstanding.1517305492
/workspace/coverage/cover_reg_top/11.hmac_tl_errors.8302703
/workspace/coverage/cover_reg_top/11.hmac_tl_intg_err.2027759492
/workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.1670488115
/workspace/coverage/cover_reg_top/12.hmac_csr_rw.104344756
/workspace/coverage/cover_reg_top/12.hmac_intr_test.2441279552
/workspace/coverage/cover_reg_top/12.hmac_same_csr_outstanding.1347349551
/workspace/coverage/cover_reg_top/12.hmac_tl_errors.3413930150
/workspace/coverage/cover_reg_top/12.hmac_tl_intg_err.519192790
/workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.1065176446
/workspace/coverage/cover_reg_top/13.hmac_csr_rw.3189428819
/workspace/coverage/cover_reg_top/13.hmac_intr_test.3950979440
/workspace/coverage/cover_reg_top/13.hmac_same_csr_outstanding.3556200105
/workspace/coverage/cover_reg_top/13.hmac_tl_errors.3090985272
/workspace/coverage/cover_reg_top/13.hmac_tl_intg_err.3859954124
/workspace/coverage/cover_reg_top/14.hmac_csr_mem_rw_with_rand_reset.4017366069
/workspace/coverage/cover_reg_top/14.hmac_csr_rw.991183843
/workspace/coverage/cover_reg_top/14.hmac_intr_test.2875495072
/workspace/coverage/cover_reg_top/14.hmac_tl_errors.4095658883
/workspace/coverage/cover_reg_top/15.hmac_csr_rw.2202543273
/workspace/coverage/cover_reg_top/15.hmac_intr_test.1360514509
/workspace/coverage/cover_reg_top/15.hmac_same_csr_outstanding.4095317246
/workspace/coverage/cover_reg_top/15.hmac_tl_errors.1819329994
/workspace/coverage/cover_reg_top/15.hmac_tl_intg_err.2196781545
/workspace/coverage/cover_reg_top/16.hmac_csr_mem_rw_with_rand_reset.3283169865
/workspace/coverage/cover_reg_top/16.hmac_csr_rw.469466354
/workspace/coverage/cover_reg_top/16.hmac_intr_test.242148264
/workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.3657053686
/workspace/coverage/cover_reg_top/16.hmac_tl_errors.2228464705
/workspace/coverage/cover_reg_top/17.hmac_csr_mem_rw_with_rand_reset.2206724661
/workspace/coverage/cover_reg_top/17.hmac_csr_rw.2596090631
/workspace/coverage/cover_reg_top/17.hmac_intr_test.4126136542
/workspace/coverage/cover_reg_top/17.hmac_same_csr_outstanding.4125083489
/workspace/coverage/cover_reg_top/17.hmac_tl_errors.149464316
/workspace/coverage/cover_reg_top/17.hmac_tl_intg_err.44871395
/workspace/coverage/cover_reg_top/18.hmac_csr_mem_rw_with_rand_reset.1724392238
/workspace/coverage/cover_reg_top/18.hmac_csr_rw.898695405
/workspace/coverage/cover_reg_top/18.hmac_intr_test.2995228273
/workspace/coverage/cover_reg_top/18.hmac_same_csr_outstanding.195657685
/workspace/coverage/cover_reg_top/18.hmac_tl_errors.1503250694
/workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.414377428
/workspace/coverage/cover_reg_top/19.hmac_csr_mem_rw_with_rand_reset.580169984
/workspace/coverage/cover_reg_top/19.hmac_csr_rw.1881053508
/workspace/coverage/cover_reg_top/19.hmac_intr_test.4048443939
/workspace/coverage/cover_reg_top/19.hmac_same_csr_outstanding.3633099379
/workspace/coverage/cover_reg_top/19.hmac_tl_errors.4107937026
/workspace/coverage/cover_reg_top/19.hmac_tl_intg_err.455731370
/workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.144143198
/workspace/coverage/cover_reg_top/2.hmac_csr_bit_bash.858341028
/workspace/coverage/cover_reg_top/2.hmac_csr_hw_reset.620236903
/workspace/coverage/cover_reg_top/2.hmac_csr_mem_rw_with_rand_reset.1504795944
/workspace/coverage/cover_reg_top/2.hmac_intr_test.4168846485
/workspace/coverage/cover_reg_top/2.hmac_same_csr_outstanding.630244201
/workspace/coverage/cover_reg_top/2.hmac_tl_errors.4052686941
/workspace/coverage/cover_reg_top/2.hmac_tl_intg_err.494052726
/workspace/coverage/cover_reg_top/20.hmac_intr_test.2352332432
/workspace/coverage/cover_reg_top/21.hmac_intr_test.942611234
/workspace/coverage/cover_reg_top/22.hmac_intr_test.1351081127
/workspace/coverage/cover_reg_top/23.hmac_intr_test.4078506010
/workspace/coverage/cover_reg_top/24.hmac_intr_test.1560227102
/workspace/coverage/cover_reg_top/25.hmac_intr_test.2348561636
/workspace/coverage/cover_reg_top/26.hmac_intr_test.159006148
/workspace/coverage/cover_reg_top/28.hmac_intr_test.3612870025
/workspace/coverage/cover_reg_top/29.hmac_intr_test.2469562548
/workspace/coverage/cover_reg_top/3.hmac_csr_aliasing.1277659878
/workspace/coverage/cover_reg_top/3.hmac_csr_bit_bash.2969336681
/workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.2326992375
/workspace/coverage/cover_reg_top/3.hmac_csr_mem_rw_with_rand_reset.4146483804
/workspace/coverage/cover_reg_top/3.hmac_csr_rw.230374822
/workspace/coverage/cover_reg_top/3.hmac_intr_test.94521523
/workspace/coverage/cover_reg_top/3.hmac_same_csr_outstanding.1911127787
/workspace/coverage/cover_reg_top/3.hmac_tl_errors.3148435606
/workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.3100875329
/workspace/coverage/cover_reg_top/30.hmac_intr_test.3299988232
/workspace/coverage/cover_reg_top/31.hmac_intr_test.2541417624
/workspace/coverage/cover_reg_top/32.hmac_intr_test.3662512111
/workspace/coverage/cover_reg_top/33.hmac_intr_test.15266609
/workspace/coverage/cover_reg_top/34.hmac_intr_test.1349536814
/workspace/coverage/cover_reg_top/35.hmac_intr_test.2933821967
/workspace/coverage/cover_reg_top/36.hmac_intr_test.1940878794
/workspace/coverage/cover_reg_top/37.hmac_intr_test.399738483
/workspace/coverage/cover_reg_top/38.hmac_intr_test.3908543034
/workspace/coverage/cover_reg_top/39.hmac_intr_test.2813021456
/workspace/coverage/cover_reg_top/4.hmac_csr_aliasing.3919938552
/workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.1725164126
/workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.1069684775
/workspace/coverage/cover_reg_top/4.hmac_csr_mem_rw_with_rand_reset.1425946289
/workspace/coverage/cover_reg_top/4.hmac_csr_rw.1696014888
/workspace/coverage/cover_reg_top/4.hmac_intr_test.3536524296
/workspace/coverage/cover_reg_top/4.hmac_same_csr_outstanding.3221007609
/workspace/coverage/cover_reg_top/4.hmac_tl_errors.546136390
/workspace/coverage/cover_reg_top/4.hmac_tl_intg_err.858670158
/workspace/coverage/cover_reg_top/40.hmac_intr_test.1553617768
/workspace/coverage/cover_reg_top/41.hmac_intr_test.2861437745
/workspace/coverage/cover_reg_top/42.hmac_intr_test.1772306328
/workspace/coverage/cover_reg_top/43.hmac_intr_test.654109113
/workspace/coverage/cover_reg_top/44.hmac_intr_test.3049334054
/workspace/coverage/cover_reg_top/45.hmac_intr_test.1877775919
/workspace/coverage/cover_reg_top/46.hmac_intr_test.2836980015
/workspace/coverage/cover_reg_top/47.hmac_intr_test.2899667269
/workspace/coverage/cover_reg_top/48.hmac_intr_test.3588413114
/workspace/coverage/cover_reg_top/5.hmac_csr_mem_rw_with_rand_reset.2811850678
/workspace/coverage/cover_reg_top/5.hmac_csr_rw.1394557580
/workspace/coverage/cover_reg_top/5.hmac_intr_test.3273498772
/workspace/coverage/cover_reg_top/5.hmac_same_csr_outstanding.1217500370
/workspace/coverage/cover_reg_top/5.hmac_tl_errors.3761030110
/workspace/coverage/cover_reg_top/5.hmac_tl_intg_err.1863382309
/workspace/coverage/cover_reg_top/6.hmac_csr_mem_rw_with_rand_reset.2729920989
/workspace/coverage/cover_reg_top/6.hmac_csr_rw.2179328493
/workspace/coverage/cover_reg_top/6.hmac_intr_test.4068650535
/workspace/coverage/cover_reg_top/6.hmac_same_csr_outstanding.396801133
/workspace/coverage/cover_reg_top/6.hmac_tl_errors.1019893678
/workspace/coverage/cover_reg_top/7.hmac_csr_mem_rw_with_rand_reset.1784751937
/workspace/coverage/cover_reg_top/7.hmac_csr_rw.2410394461
/workspace/coverage/cover_reg_top/7.hmac_intr_test.2411354752
/workspace/coverage/cover_reg_top/7.hmac_same_csr_outstanding.1358000865
/workspace/coverage/cover_reg_top/7.hmac_tl_errors.1225361513
/workspace/coverage/cover_reg_top/7.hmac_tl_intg_err.3517918592
/workspace/coverage/cover_reg_top/8.hmac_csr_mem_rw_with_rand_reset.2960591527
/workspace/coverage/cover_reg_top/8.hmac_csr_rw.1255627126
/workspace/coverage/cover_reg_top/8.hmac_intr_test.1305153582
/workspace/coverage/cover_reg_top/8.hmac_same_csr_outstanding.2677559460
/workspace/coverage/cover_reg_top/8.hmac_tl_errors.3217503018
/workspace/coverage/cover_reg_top/8.hmac_tl_intg_err.188331701
/workspace/coverage/cover_reg_top/9.hmac_csr_mem_rw_with_rand_reset.1367802491
/workspace/coverage/cover_reg_top/9.hmac_csr_rw.2871151391
/workspace/coverage/cover_reg_top/9.hmac_intr_test.1706285136
/workspace/coverage/cover_reg_top/9.hmac_same_csr_outstanding.1781505119
/workspace/coverage/default/0.hmac_alert_test.637154237
/workspace/coverage/default/0.hmac_back_pressure.166939660
/workspace/coverage/default/0.hmac_burst_wr.2066092513
/workspace/coverage/default/0.hmac_datapath_stress.1663541189
/workspace/coverage/default/0.hmac_error.3095671100
/workspace/coverage/default/0.hmac_long_msg.2197108091
/workspace/coverage/default/0.hmac_sec_cm.1157710453
/workspace/coverage/default/0.hmac_smoke.3236843596
/workspace/coverage/default/0.hmac_stress_all.2014875672
/workspace/coverage/default/0.hmac_stress_all_with_rand_reset.3048088807
/workspace/coverage/default/0.hmac_test_hmac_vectors.3223986940
/workspace/coverage/default/0.hmac_test_sha_vectors.185552934
/workspace/coverage/default/0.hmac_wipe_secret.323435036
/workspace/coverage/default/1.hmac_alert_test.595508551
/workspace/coverage/default/1.hmac_back_pressure.107731027
/workspace/coverage/default/1.hmac_burst_wr.1088510365
/workspace/coverage/default/1.hmac_datapath_stress.81889142
/workspace/coverage/default/1.hmac_error.2496060210
/workspace/coverage/default/1.hmac_long_msg.1612648346
/workspace/coverage/default/1.hmac_smoke.2749543474
/workspace/coverage/default/1.hmac_stress_all.4258276063
/workspace/coverage/default/1.hmac_test_hmac_vectors.834742388
/workspace/coverage/default/1.hmac_test_sha_vectors.596231380
/workspace/coverage/default/1.hmac_wipe_secret.2809012119
/workspace/coverage/default/10.hmac_alert_test.1605471695
/workspace/coverage/default/10.hmac_back_pressure.3554597804
/workspace/coverage/default/10.hmac_burst_wr.3154411176
/workspace/coverage/default/10.hmac_datapath_stress.1827354459
/workspace/coverage/default/10.hmac_error.375705522
/workspace/coverage/default/10.hmac_long_msg.860431731
/workspace/coverage/default/10.hmac_smoke.3467514985
/workspace/coverage/default/10.hmac_stress_all.445751771
/workspace/coverage/default/10.hmac_stress_all_with_rand_reset.1254071434
/workspace/coverage/default/10.hmac_test_hmac_vectors.3315544255
/workspace/coverage/default/10.hmac_test_sha_vectors.271363343
/workspace/coverage/default/10.hmac_wipe_secret.3577524833
/workspace/coverage/default/100.hmac_stress_all_with_rand_reset.73579915
/workspace/coverage/default/101.hmac_stress_all_with_rand_reset.2479953613
/workspace/coverage/default/102.hmac_stress_all_with_rand_reset.490847982
/workspace/coverage/default/103.hmac_stress_all_with_rand_reset.3818640611
/workspace/coverage/default/104.hmac_stress_all_with_rand_reset.1978953624
/workspace/coverage/default/105.hmac_stress_all_with_rand_reset.758452484
/workspace/coverage/default/107.hmac_stress_all_with_rand_reset.1143881853
/workspace/coverage/default/108.hmac_stress_all_with_rand_reset.585328328
/workspace/coverage/default/109.hmac_stress_all_with_rand_reset.1736516445
/workspace/coverage/default/11.hmac_alert_test.3734082502
/workspace/coverage/default/11.hmac_back_pressure.897212261
/workspace/coverage/default/11.hmac_burst_wr.1925365941
/workspace/coverage/default/11.hmac_datapath_stress.1022443223
/workspace/coverage/default/11.hmac_error.4194244769
/workspace/coverage/default/11.hmac_long_msg.2428468095
/workspace/coverage/default/11.hmac_smoke.1742681084
/workspace/coverage/default/11.hmac_stress_all.3746496570
/workspace/coverage/default/11.hmac_stress_all_with_rand_reset.2544423332
/workspace/coverage/default/11.hmac_test_hmac_vectors.3216870075
/workspace/coverage/default/11.hmac_test_sha_vectors.3923751400
/workspace/coverage/default/11.hmac_wipe_secret.3925927771
/workspace/coverage/default/110.hmac_stress_all_with_rand_reset.3590387620
/workspace/coverage/default/111.hmac_stress_all_with_rand_reset.220569069
/workspace/coverage/default/112.hmac_stress_all_with_rand_reset.975792083
/workspace/coverage/default/113.hmac_stress_all_with_rand_reset.1947572944
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/workspace/coverage/default/8.hmac_burst_wr.2656841012
/workspace/coverage/default/8.hmac_datapath_stress.2086116384
/workspace/coverage/default/8.hmac_error.3966575060
/workspace/coverage/default/8.hmac_long_msg.1052972591
/workspace/coverage/default/8.hmac_smoke.2215033902
/workspace/coverage/default/8.hmac_stress_all.2911660962
/workspace/coverage/default/8.hmac_stress_all_with_rand_reset.140261539
/workspace/coverage/default/8.hmac_test_hmac_vectors.3597082544
/workspace/coverage/default/8.hmac_test_sha_vectors.740329374
/workspace/coverage/default/8.hmac_wipe_secret.1892656066
/workspace/coverage/default/80.hmac_stress_all_with_rand_reset.3515899182
/workspace/coverage/default/81.hmac_stress_all_with_rand_reset.4126774846
/workspace/coverage/default/82.hmac_stress_all_with_rand_reset.624737739
/workspace/coverage/default/83.hmac_stress_all_with_rand_reset.2980410981
/workspace/coverage/default/84.hmac_stress_all_with_rand_reset.158655526
/workspace/coverage/default/85.hmac_stress_all_with_rand_reset.3853571825
/workspace/coverage/default/86.hmac_stress_all_with_rand_reset.748763123
/workspace/coverage/default/87.hmac_stress_all_with_rand_reset.3811827259
/workspace/coverage/default/88.hmac_stress_all_with_rand_reset.238721384
/workspace/coverage/default/89.hmac_stress_all_with_rand_reset.1410792682
/workspace/coverage/default/9.hmac_alert_test.1749459889
/workspace/coverage/default/9.hmac_back_pressure.4138856083
/workspace/coverage/default/9.hmac_burst_wr.3498488411
/workspace/coverage/default/9.hmac_datapath_stress.471033275
/workspace/coverage/default/9.hmac_error.2172393294
/workspace/coverage/default/9.hmac_long_msg.102919983
/workspace/coverage/default/9.hmac_smoke.3449919933
/workspace/coverage/default/9.hmac_stress_all.2007612734
/workspace/coverage/default/9.hmac_stress_all_with_rand_reset.3948245121
/workspace/coverage/default/9.hmac_test_hmac_vectors.1028408666
/workspace/coverage/default/9.hmac_test_sha_vectors.1095572443
/workspace/coverage/default/9.hmac_wipe_secret.3185015696
/workspace/coverage/default/90.hmac_stress_all_with_rand_reset.706962778
/workspace/coverage/default/91.hmac_stress_all_with_rand_reset.66887855
/workspace/coverage/default/92.hmac_stress_all_with_rand_reset.1563635818
/workspace/coverage/default/93.hmac_stress_all_with_rand_reset.3518634007
/workspace/coverage/default/94.hmac_stress_all_with_rand_reset.159885706
/workspace/coverage/default/95.hmac_stress_all_with_rand_reset.2168499249
/workspace/coverage/default/97.hmac_stress_all_with_rand_reset.2798016726
/workspace/coverage/default/98.hmac_stress_all_with_rand_reset.2996876336
/workspace/coverage/default/99.hmac_stress_all_with_rand_reset.2823502858



Total test records in report: 907
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T16 /workspace/coverage/cover_reg_top/15.hmac_csr_mem_rw_with_rand_reset.217696081 May 27 12:57:57 AM PDT 23 May 27 12:57:59 AM PDT 23 53268376 ps
T17 /workspace/coverage/cover_reg_top/48.hmac_intr_test.3588413114 May 27 12:58:23 AM PDT 23 May 27 12:58:24 AM PDT 23 56653854 ps
T18 /workspace/coverage/cover_reg_top/17.hmac_csr_mem_rw_with_rand_reset.2206724661 May 27 12:58:04 AM PDT 23 May 27 12:58:07 AM PDT 23 113708901 ps
T19 /workspace/coverage/cover_reg_top/15.hmac_same_csr_outstanding.4095317246 May 27 12:58:04 AM PDT 23 May 27 12:58:05 AM PDT 23 65469255 ps
T20 /workspace/coverage/cover_reg_top/0.hmac_csr_rw.2518258768 May 27 12:55:48 AM PDT 23 May 27 12:55:49 AM PDT 23 19628259 ps
T21 /workspace/coverage/cover_reg_top/27.hmac_intr_test.3238599254 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 22175167 ps
T22 /workspace/coverage/cover_reg_top/49.hmac_intr_test.1582306162 May 27 12:58:23 AM PDT 23 May 27 12:58:24 AM PDT 23 20624146 ps
T23 /workspace/coverage/cover_reg_top/2.hmac_tl_errors.4052686941 May 27 12:56:05 AM PDT 23 May 27 12:56:09 AM PDT 23 578124607 ps
T24 /workspace/coverage/cover_reg_top/10.hmac_csr_rw.3306412730 May 27 12:56:51 AM PDT 23 May 27 12:56:52 AM PDT 23 15172540 ps
T25 /workspace/coverage/cover_reg_top/18.hmac_intr_test.2995228273 May 27 12:58:02 AM PDT 23 May 27 12:58:02 AM PDT 23 39698427 ps
T26 /workspace/coverage/cover_reg_top/14.hmac_csr_mem_rw_with_rand_reset.4017366069 May 27 12:57:59 AM PDT 23 May 27 12:58:01 AM PDT 23 233222917 ps
T27 /workspace/coverage/cover_reg_top/9.hmac_tl_errors.2687572241 May 27 12:57:08 AM PDT 23 May 27 12:57:12 AM PDT 23 161712136 ps
T60 /workspace/coverage/cover_reg_top/14.hmac_tl_intg_err.3454004603 May 27 12:57:58 AM PDT 23 May 27 12:58:00 AM PDT 23 175204924 ps
T28 /workspace/coverage/cover_reg_top/12.hmac_tl_errors.3413930150 May 27 12:57:30 AM PDT 23 May 27 12:57:33 AM PDT 23 182727095 ps
T29 /workspace/coverage/cover_reg_top/10.hmac_csr_mem_rw_with_rand_reset.869338993 May 27 12:57:07 AM PDT 23 May 27 12:57:09 AM PDT 23 90332609 ps
T72 /workspace/coverage/cover_reg_top/14.hmac_same_csr_outstanding.3524481980 May 27 12:57:57 AM PDT 23 May 27 12:57:59 AM PDT 23 53919544 ps
T30 /workspace/coverage/cover_reg_top/1.hmac_tl_errors.1483998062 May 27 12:56:08 AM PDT 23 May 27 12:56:10 AM PDT 23 28115808 ps
T73 /workspace/coverage/cover_reg_top/8.hmac_same_csr_outstanding.2677559460 May 27 12:57:08 AM PDT 23 May 27 12:57:10 AM PDT 23 86026539 ps
T61 /workspace/coverage/cover_reg_top/16.hmac_tl_intg_err.3235036139 May 27 12:57:57 AM PDT 23 May 27 12:57:59 AM PDT 23 721664438 ps
T74 /workspace/coverage/cover_reg_top/4.hmac_csr_hw_reset.1069684775 May 27 12:56:45 AM PDT 23 May 27 12:56:46 AM PDT 23 89984683 ps
T31 /workspace/coverage/cover_reg_top/0.hmac_tl_errors.2583268740 May 27 12:55:47 AM PDT 23 May 27 12:55:52 AM PDT 23 214122771 ps
T101 /workspace/coverage/cover_reg_top/19.hmac_csr_rw.1881053508 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 15998239 ps
T62 /workspace/coverage/cover_reg_top/17.hmac_tl_intg_err.44871395 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 155307333 ps
T32 /workspace/coverage/cover_reg_top/11.hmac_csr_mem_rw_with_rand_reset.543356543 May 27 12:57:30 AM PDT 23 May 27 12:57:32 AM PDT 23 25160465 ps
T133 /workspace/coverage/cover_reg_top/30.hmac_intr_test.3299988232 May 27 12:57:56 AM PDT 23 May 27 12:57:57 AM PDT 23 12203417 ps
T65 /workspace/coverage/cover_reg_top/19.hmac_tl_errors.4107937026 May 27 12:57:49 AM PDT 23 May 27 12:57:50 AM PDT 23 28176083 ps
T75 /workspace/coverage/cover_reg_top/11.hmac_csr_rw.3669543292 May 27 12:57:31 AM PDT 23 May 27 12:57:32 AM PDT 23 35273940 ps
T76 /workspace/coverage/cover_reg_top/9.hmac_same_csr_outstanding.1781505119 May 27 12:57:08 AM PDT 23 May 27 12:57:09 AM PDT 23 28965298 ps
T77 /workspace/coverage/cover_reg_top/4.hmac_csr_bit_bash.1725164126 May 27 12:57:10 AM PDT 23 May 27 12:57:14 AM PDT 23 234718170 ps
T78 /workspace/coverage/cover_reg_top/2.hmac_csr_hw_reset.620236903 May 27 12:56:42 AM PDT 23 May 27 12:56:43 AM PDT 23 25441523 ps
T79 /workspace/coverage/cover_reg_top/46.hmac_intr_test.2836980015 May 27 12:58:29 AM PDT 23 May 27 12:58:29 AM PDT 23 48003354 ps
T66 /workspace/coverage/cover_reg_top/13.hmac_csr_mem_rw_with_rand_reset.1065176446 May 27 12:57:59 AM PDT 23 May 27 12:58:01 AM PDT 23 22518571 ps
T134 /workspace/coverage/cover_reg_top/1.hmac_intr_test.69239656 May 27 12:56:24 AM PDT 23 May 27 12:56:25 AM PDT 23 17610746 ps
T80 /workspace/coverage/cover_reg_top/2.hmac_csr_rw.3553022841 May 27 12:56:55 AM PDT 23 May 27 12:56:56 AM PDT 23 16890352 ps
T63 /workspace/coverage/cover_reg_top/0.hmac_csr_mem_rw_with_rand_reset.2676263612 May 27 12:56:21 AM PDT 23 May 27 01:09:51 AM PDT 23 89546609975 ps
T81 /workspace/coverage/cover_reg_top/18.hmac_csr_rw.898695405 May 27 12:57:58 AM PDT 23 May 27 12:58:00 AM PDT 23 17252358 ps
T64 /workspace/coverage/cover_reg_top/13.hmac_tl_errors.3090985272 May 27 12:57:30 AM PDT 23 May 27 12:57:32 AM PDT 23 74631773 ps
T67 /workspace/coverage/cover_reg_top/6.hmac_csr_mem_rw_with_rand_reset.2729920989 May 27 12:57:07 AM PDT 23 May 27 12:57:08 AM PDT 23 83270815 ps
T71 /workspace/coverage/cover_reg_top/8.hmac_tl_intg_err.188331701 May 27 12:57:08 AM PDT 23 May 27 12:57:11 AM PDT 23 118945339 ps
T82 /workspace/coverage/cover_reg_top/15.hmac_csr_rw.2202543273 May 27 12:57:53 AM PDT 23 May 27 12:57:54 AM PDT 23 16894438 ps
T144 /workspace/coverage/cover_reg_top/16.hmac_tl_errors.2228464705 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 49296193 ps
T135 /workspace/coverage/cover_reg_top/16.hmac_intr_test.242148264 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 41414922 ps
T68 /workspace/coverage/cover_reg_top/23.hmac_intr_test.4078506010 May 27 12:57:56 AM PDT 23 May 27 12:57:57 AM PDT 23 175283744 ps
T139 /workspace/coverage/cover_reg_top/10.hmac_tl_intg_err.2842016890 May 27 12:57:01 AM PDT 23 May 27 12:57:03 AM PDT 23 256924468 ps
T69 /workspace/coverage/cover_reg_top/3.hmac_csr_aliasing.1277659878 May 27 12:56:55 AM PDT 23 May 27 12:56:57 AM PDT 23 292844147 ps
T83 /workspace/coverage/cover_reg_top/10.hmac_same_csr_outstanding.2757040585 May 27 12:57:08 AM PDT 23 May 27 12:57:09 AM PDT 23 26293017 ps
T140 /workspace/coverage/cover_reg_top/3.hmac_tl_intg_err.3100875329 May 27 12:56:36 AM PDT 23 May 27 12:56:38 AM PDT 23 200804112 ps
T145 /workspace/coverage/cover_reg_top/32.hmac_intr_test.3662512111 May 27 12:57:53 AM PDT 23 May 27 12:57:53 AM PDT 23 112363518 ps
T146 /workspace/coverage/cover_reg_top/34.hmac_intr_test.1349536814 May 27 12:58:17 AM PDT 23 May 27 12:58:18 AM PDT 23 188477120 ps
T84 /workspace/coverage/cover_reg_top/3.hmac_csr_hw_reset.2326992375 May 27 12:56:46 AM PDT 23 May 27 12:56:46 AM PDT 23 73157619 ps
T85 /workspace/coverage/cover_reg_top/0.hmac_tl_intg_err.3694924290 May 27 12:55:47 AM PDT 23 May 27 12:55:49 AM PDT 23 144687017 ps
T93 /workspace/coverage/cover_reg_top/22.hmac_intr_test.1351081127 May 27 12:58:02 AM PDT 23 May 27 12:58:02 AM PDT 23 15217011 ps
T147 /workspace/coverage/cover_reg_top/9.hmac_csr_mem_rw_with_rand_reset.1367802491 May 27 12:57:07 AM PDT 23 May 27 12:57:08 AM PDT 23 245648429 ps
T100 /workspace/coverage/cover_reg_top/4.hmac_same_csr_outstanding.3221007609 May 27 12:56:52 AM PDT 23 May 27 12:56:54 AM PDT 23 86436920 ps
T148 /workspace/coverage/cover_reg_top/20.hmac_intr_test.2352332432 May 27 12:58:09 AM PDT 23 May 27 12:58:10 AM PDT 23 34448240 ps
T86 /workspace/coverage/cover_reg_top/9.hmac_csr_rw.2871151391 May 27 12:57:17 AM PDT 23 May 27 12:57:18 AM PDT 23 14076342 ps
T149 /workspace/coverage/cover_reg_top/4.hmac_csr_rw.1696014888 May 27 12:57:10 AM PDT 23 May 27 12:57:11 AM PDT 23 13984057 ps
T150 /workspace/coverage/cover_reg_top/5.hmac_intr_test.3273498772 May 27 12:57:20 AM PDT 23 May 27 12:57:21 AM PDT 23 21012778 ps
T136 /workspace/coverage/cover_reg_top/18.hmac_tl_intg_err.414377428 May 27 12:57:56 AM PDT 23 May 27 12:57:59 AM PDT 23 292679300 ps
T151 /workspace/coverage/cover_reg_top/17.hmac_intr_test.4126136542 May 27 12:58:04 AM PDT 23 May 27 12:58:05 AM PDT 23 12570083 ps
T137 /workspace/coverage/cover_reg_top/6.hmac_tl_intg_err.389137171 May 27 12:57:00 AM PDT 23 May 27 12:57:03 AM PDT 23 305852904 ps
T87 /workspace/coverage/cover_reg_top/1.hmac_csr_rw.2447002971 May 27 12:56:24 AM PDT 23 May 27 12:56:25 AM PDT 23 79939624 ps
T152 /workspace/coverage/cover_reg_top/43.hmac_intr_test.654109113 May 27 12:58:23 AM PDT 23 May 27 12:58:24 AM PDT 23 20622420 ps
T153 /workspace/coverage/cover_reg_top/40.hmac_intr_test.1553617768 May 27 12:58:05 AM PDT 23 May 27 12:58:05 AM PDT 23 24074748 ps
T154 /workspace/coverage/cover_reg_top/19.hmac_same_csr_outstanding.3633099379 May 27 12:58:02 AM PDT 23 May 27 12:58:03 AM PDT 23 47483925 ps
T155 /workspace/coverage/cover_reg_top/16.hmac_same_csr_outstanding.3657053686 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 49763708 ps
T91 /workspace/coverage/cover_reg_top/2.hmac_csr_bit_bash.858341028 May 27 12:56:42 AM PDT 23 May 27 12:56:48 AM PDT 23 264600788 ps
T156 /workspace/coverage/cover_reg_top/0.hmac_csr_hw_reset.159284202 May 27 12:55:35 AM PDT 23 May 27 12:55:36 AM PDT 23 86263338 ps
T157 /workspace/coverage/cover_reg_top/1.hmac_csr_mem_rw_with_rand_reset.1724107671 May 27 12:56:24 AM PDT 23 May 27 12:56:25 AM PDT 23 15404801 ps
T158 /workspace/coverage/cover_reg_top/8.hmac_tl_errors.3217503018 May 27 12:57:07 AM PDT 23 May 27 12:57:09 AM PDT 23 73484346 ps
T159 /workspace/coverage/cover_reg_top/3.hmac_intr_test.94521523 May 27 12:56:34 AM PDT 23 May 27 12:56:35 AM PDT 23 73757850 ps
T160 /workspace/coverage/cover_reg_top/2.hmac_intr_test.4168846485 May 27 12:56:43 AM PDT 23 May 27 12:56:44 AM PDT 23 11019875 ps
T88 /workspace/coverage/cover_reg_top/5.hmac_csr_rw.1394557580 May 27 12:56:54 AM PDT 23 May 27 12:56:55 AM PDT 23 25251108 ps
T161 /workspace/coverage/cover_reg_top/14.hmac_tl_errors.4095658883 May 27 12:57:49 AM PDT 23 May 27 12:57:51 AM PDT 23 57220834 ps
T162 /workspace/coverage/cover_reg_top/44.hmac_intr_test.3049334054 May 27 12:58:22 AM PDT 23 May 27 12:58:23 AM PDT 23 17448280 ps
T163 /workspace/coverage/cover_reg_top/0.hmac_same_csr_outstanding.1478425515 May 27 12:56:08 AM PDT 23 May 27 12:56:09 AM PDT 23 31931620 ps
T164 /workspace/coverage/cover_reg_top/4.hmac_csr_mem_rw_with_rand_reset.1425946289 May 27 12:57:10 AM PDT 23 May 27 12:57:11 AM PDT 23 26133720 ps
T165 /workspace/coverage/cover_reg_top/12.hmac_intr_test.2441279552 May 27 12:57:34 AM PDT 23 May 27 12:57:35 AM PDT 23 49630489 ps
T166 /workspace/coverage/cover_reg_top/38.hmac_intr_test.3908543034 May 27 12:58:07 AM PDT 23 May 27 12:58:07 AM PDT 23 21306734 ps
T89 /workspace/coverage/cover_reg_top/3.hmac_csr_rw.230374822 May 27 12:56:48 AM PDT 23 May 27 12:56:49 AM PDT 23 178898930 ps
T167 /workspace/coverage/cover_reg_top/17.hmac_same_csr_outstanding.4125083489 May 27 12:57:59 AM PDT 23 May 27 12:58:01 AM PDT 23 43161630 ps
T168 /workspace/coverage/cover_reg_top/18.hmac_tl_errors.1503250694 May 27 12:57:58 AM PDT 23 May 27 12:58:00 AM PDT 23 42285471 ps
T169 /workspace/coverage/cover_reg_top/13.hmac_same_csr_outstanding.3556200105 May 27 12:57:57 AM PDT 23 May 27 12:57:59 AM PDT 23 234983324 ps
T170 /workspace/coverage/cover_reg_top/2.hmac_csr_mem_rw_with_rand_reset.1504795944 May 27 12:56:46 AM PDT 23 May 27 12:56:48 AM PDT 23 83832450 ps
T138 /workspace/coverage/cover_reg_top/11.hmac_tl_intg_err.2027759492 May 27 12:57:28 AM PDT 23 May 27 12:57:31 AM PDT 23 171645586 ps
T171 /workspace/coverage/cover_reg_top/1.hmac_same_csr_outstanding.1044597240 May 27 12:56:24 AM PDT 23 May 27 12:56:25 AM PDT 23 67007745 ps
T172 /workspace/coverage/cover_reg_top/10.hmac_intr_test.300377991 May 27 12:57:07 AM PDT 23 May 27 12:57:08 AM PDT 23 15039032 ps
T90 /workspace/coverage/cover_reg_top/6.hmac_csr_rw.2179328493 May 27 12:57:06 AM PDT 23 May 27 12:57:07 AM PDT 23 40838580 ps
T173 /workspace/coverage/cover_reg_top/36.hmac_intr_test.1940878794 May 27 12:58:29 AM PDT 23 May 27 12:58:29 AM PDT 23 46001248 ps
T174 /workspace/coverage/cover_reg_top/15.hmac_tl_errors.1819329994 May 27 12:57:47 AM PDT 23 May 27 12:57:50 AM PDT 23 86454251 ps
T141 /workspace/coverage/cover_reg_top/12.hmac_tl_intg_err.519192790 May 27 12:57:34 AM PDT 23 May 27 12:57:37 AM PDT 23 536746741 ps
T175 /workspace/coverage/cover_reg_top/6.hmac_same_csr_outstanding.396801133 May 27 12:57:01 AM PDT 23 May 27 12:57:02 AM PDT 23 43123504 ps
T142 /workspace/coverage/cover_reg_top/1.hmac_tl_intg_err.417577914 May 27 12:56:20 AM PDT 23 May 27 12:56:23 AM PDT 23 112174305 ps
T176 /workspace/coverage/cover_reg_top/26.hmac_intr_test.159006148 May 27 12:58:05 AM PDT 23 May 27 12:58:06 AM PDT 23 15220183 ps
T177 /workspace/coverage/cover_reg_top/3.hmac_csr_bit_bash.2969336681 May 27 12:56:40 AM PDT 23 May 27 12:56:43 AM PDT 23 73776933 ps
T178 /workspace/coverage/cover_reg_top/29.hmac_intr_test.2469562548 May 27 12:58:04 AM PDT 23 May 27 12:58:04 AM PDT 23 41568266 ps
T179 /workspace/coverage/cover_reg_top/14.hmac_intr_test.2875495072 May 27 12:58:04 AM PDT 23 May 27 12:58:06 AM PDT 23 46427584 ps
T180 /workspace/coverage/cover_reg_top/31.hmac_intr_test.2541417624 May 27 12:58:02 AM PDT 23 May 27 12:58:03 AM PDT 23 95761373 ps
T181 /workspace/coverage/cover_reg_top/11.hmac_intr_test.3798169038 May 27 12:57:31 AM PDT 23 May 27 12:57:32 AM PDT 23 14987570 ps
T182 /workspace/coverage/cover_reg_top/5.hmac_csr_mem_rw_with_rand_reset.2811850678 May 27 12:57:06 AM PDT 23 May 27 12:57:09 AM PDT 23 56472397 ps
T183 /workspace/coverage/cover_reg_top/2.hmac_csr_aliasing.144143198 May 27 12:56:45 AM PDT 23 May 27 12:56:47 AM PDT 23 28256940 ps
T184 /workspace/coverage/cover_reg_top/11.hmac_same_csr_outstanding.1517305492 May 27 12:57:30 AM PDT 23 May 27 12:57:31 AM PDT 23 61583550 ps
T185 /workspace/coverage/cover_reg_top/47.hmac_intr_test.2899667269 May 27 12:58:31 AM PDT 23 May 27 12:58:32 AM PDT 23 80090939 ps
T186 /workspace/coverage/cover_reg_top/7.hmac_intr_test.2411354752 May 27 12:56:51 AM PDT 23 May 27 12:56:51 AM PDT 23 85941885 ps
T187 /workspace/coverage/cover_reg_top/7.hmac_tl_intg_err.3517918592 May 27 12:57:07 AM PDT 23 May 27 12:57:08 AM PDT 23 380581673 ps
T188 /workspace/coverage/cover_reg_top/21.hmac_intr_test.942611234 May 27 12:57:57 AM PDT 23 May 27 12:57:58 AM PDT 23 17580474 ps
T189 /workspace/coverage/cover_reg_top/12.hmac_csr_mem_rw_with_rand_reset.1670488115 May 27 12:57:31 AM PDT 23 May 27 12:57:34 AM PDT 23 117285227 ps
T1 /workspace/coverage/default/12.hmac_alert_test.3177841204 May 27 01:48:28 AM PDT 23 May 27 01:48:29 AM PDT 23 55880698 ps
T2 /workspace/coverage/default/46.hmac_stress_all_with_rand_reset.2187498049 May 27 01:50:34 AM PDT 23 May 27 02:04:08 AM PDT 23 153476004810 ps
T3 /workspace/coverage/default/3.hmac_wipe_secret.3304865383 May 27 01:48:02 AM PDT 23 May 27 01:48:46 AM PDT 23 6629102764 ps
T4 /workspace/coverage/default/17.hmac_test_hmac_vectors.33133073 May 27 01:49:07 AM PDT 23 May 27 01:49:08 AM PDT 23 104645027 ps
T11 /workspace/coverage/default/1.hmac_long_msg.1612648346 May 27 01:47:44 AM PDT 23 May 27 01:49:00 AM PDT 23 1488973310 ps
T12 /workspace/coverage/default/16.hmac_test_sha_vectors.1454060115 May 27 01:48:53 AM PDT 23 May 27 01:55:55 AM PDT 23 24662592003 ps
T13 /workspace/coverage/default/31.hmac_long_msg.1368017453 May 27 01:49:33 AM PDT 23 May 27 01:49:55 AM PDT 23 6891925563 ps
T5 /workspace/coverage/default/40.hmac_stress_all_with_rand_reset.3737923785 May 27 01:49:51 AM PDT 23 May 27 02:00:49 AM PDT 23 380295352703 ps
T6 /workspace/coverage/default/16.hmac_stress_all_with_rand_reset.1864372520 May 27 01:48:58 AM PDT 23 May 27 02:47:34 AM PDT 23 97289975479 ps
T14 /workspace/coverage/default/43.hmac_burst_wr.3745491948 May 27 01:49:58 AM PDT 23 May 27 01:50:20 AM PDT 23 1954155329 ps
T15 /workspace/coverage/default/1.hmac_test_sha_vectors.596231380 May 27 01:47:47 AM PDT 23 May 27 01:54:13 AM PDT 23 23997445742 ps
T7 /workspace/coverage/default/13.hmac_long_msg.1044238322 May 27 01:48:36 AM PDT 23 May 27 01:50:34 AM PDT 23 8732104782 ps
T8 /workspace/coverage/default/32.hmac_long_msg.2836877022 May 27 01:49:43 AM PDT 23 May 27 01:50:40 AM PDT 23 4190605880 ps
T10 /workspace/coverage/default/29.hmac_long_msg.2482005119 May 27 01:49:08 AM PDT 23 May 27 01:49:52 AM PDT 23 4194959122 ps
T43 /workspace/coverage/default/67.hmac_stress_all_with_rand_reset.1770334829 May 27 01:50:41 AM PDT 23 May 27 02:05:05 AM PDT 23 68330446348 ps
T9 /workspace/coverage/default/31.hmac_wipe_secret.760907859 May 27 01:49:47 AM PDT 23 May 27 01:50:34 AM PDT 23 21834099437 ps
T33 /workspace/coverage/default/198.hmac_stress_all_with_rand_reset.1991891134 May 27 01:51:23 AM PDT 23 May 27 02:11:47 AM PDT 23 101106931037 ps
T34 /workspace/coverage/default/178.hmac_stress_all_with_rand_reset.3883419698 May 27 01:51:13 AM PDT 23 May 27 02:21:50 AM PDT 23 149156483976 ps
T102 /workspace/coverage/default/122.hmac_stress_all_with_rand_reset.2374702484 May 27 01:50:43 AM PDT 23 May 27 01:59:04 AM PDT 23 54724851872 ps
T70 /workspace/coverage/default/153.hmac_stress_all_with_rand_reset.1921973753 May 27 01:51:07 AM PDT 23 May 27 02:17:05 AM PDT 23 432270541573 ps
T190 /workspace/coverage/default/25.hmac_test_hmac_vectors.2205188499 May 27 01:49:20 AM PDT 23 May 27 01:49:21 AM PDT 23 65236158 ps
T39 /workspace/coverage/default/87.hmac_stress_all_with_rand_reset.3811827259 May 27 01:50:49 AM PDT 23 May 27 02:16:14 AM PDT 23 655886902261 ps
T35 /workspace/coverage/default/27.hmac_back_pressure.408558671 May 27 01:49:17 AM PDT 23 May 27 01:49:23 AM PDT 23 224284743 ps
T44 /workspace/coverage/default/3.hmac_alert_test.124512535 May 27 01:48:16 AM PDT 23 May 27 01:48:17 AM PDT 23 55519266 ps
T109 /workspace/coverage/default/15.hmac_stress_all_with_rand_reset.270623915 May 27 01:48:56 AM PDT 23 May 27 01:55:06 AM PDT 23 24449801779 ps
T36 /workspace/coverage/default/39.hmac_stress_all.2740817518 May 27 01:49:37 AM PDT 23 May 27 02:00:32 AM PDT 23 71471104903 ps
T191 /workspace/coverage/default/14.hmac_wipe_secret.319366337 May 27 01:49:08 AM PDT 23 May 27 01:49:43 AM PDT 23 9926630439 ps
T192 /workspace/coverage/default/181.hmac_stress_all_with_rand_reset.3091373150 May 27 01:51:14 AM PDT 23 May 27 01:54:57 AM PDT 23 29704844266 ps
T193 /workspace/coverage/default/23.hmac_smoke.975122950 May 27 01:49:01 AM PDT 23 May 27 01:49:05 AM PDT 23 779960013 ps
T194 /workspace/coverage/default/17.hmac_wipe_secret.501945781 May 27 01:48:57 AM PDT 23 May 27 01:50:01 AM PDT 23 3680776458 ps
T40 /workspace/coverage/default/20.hmac_datapath_stress.2702671771 May 27 01:49:10 AM PDT 23 May 27 01:49:26 AM PDT 23 329162736 ps
T195 /workspace/coverage/default/18.hmac_error.3169789178 May 27 01:49:03 AM PDT 23 May 27 01:49:43 AM PDT 23 14702985213 ps
T45 /workspace/coverage/default/24.hmac_alert_test.3680822809 May 27 01:49:20 AM PDT 23 May 27 01:49:20 AM PDT 23 29372242 ps
T37 /workspace/coverage/default/15.hmac_back_pressure.3639918499 May 27 01:48:56 AM PDT 23 May 27 01:49:27 AM PDT 23 1010834115 ps
T108 /workspace/coverage/default/143.hmac_stress_all_with_rand_reset.2071334990 May 27 01:51:10 AM PDT 23 May 27 01:54:05 AM PDT 23 9035933048 ps
T38 /workspace/coverage/default/2.hmac_stress_all_with_rand_reset.3109193103 May 27 01:47:57 AM PDT 23 May 27 02:30:24 AM PDT 23 199724764372 ps
T107 /workspace/coverage/default/175.hmac_stress_all_with_rand_reset.2056301955 May 27 01:51:09 AM PDT 23 May 27 02:00:56 AM PDT 23 80657456394 ps
T196 /workspace/coverage/default/44.hmac_test_hmac_vectors.485095552 May 27 01:50:01 AM PDT 23 May 27 01:50:02 AM PDT 23 26483449 ps
T197 /workspace/coverage/default/9.hmac_smoke.3449919933 May 27 01:48:18 AM PDT 23 May 27 01:48:20 AM PDT 23 1282113108 ps
T41 /workspace/coverage/default/30.hmac_back_pressure.3961176525 May 27 01:49:29 AM PDT 23 May 27 01:50:06 AM PDT 23 1148868659 ps
T198 /workspace/coverage/default/88.hmac_stress_all_with_rand_reset.238721384 May 27 01:50:52 AM PDT 23 May 27 01:57:17 AM PDT 23 92679998876 ps
T42 /workspace/coverage/default/31.hmac_stress_all.2535221519 May 27 01:49:26 AM PDT 23 May 27 02:03:13 AM PDT 23 283700738610 ps
T46 /workspace/coverage/default/3.hmac_sec_cm.1320412936 May 27 01:48:12 AM PDT 23 May 27 01:48:13 AM PDT 23 192229246 ps
T51 /workspace/coverage/default/32.hmac_alert_test.595279615 May 27 01:50:21 AM PDT 23 May 27 01:50:23 AM PDT 23 35158835 ps
T52 /workspace/coverage/default/24.hmac_burst_wr.1636037991 May 27 01:49:13 AM PDT 23 May 27 01:49:35 AM PDT 23 493890512 ps
T53 /workspace/coverage/default/10.hmac_stress_all.445751771 May 27 01:48:20 AM PDT 23 May 27 01:54:03 AM PDT 23 134745398554 ps
T54 /workspace/coverage/default/103.hmac_stress_all_with_rand_reset.3818640611 May 27 01:50:43 AM PDT 23 May 27 02:05:58 AM PDT 23 271749962173 ps
T55 /workspace/coverage/default/25.hmac_stress_all.1655904095 May 27 01:49:20 AM PDT 23 May 27 01:56:59 AM PDT 23 35649830865 ps
T56 /workspace/coverage/default/49.hmac_burst_wr.3325767028 May 27 01:50:40 AM PDT 23 May 27 01:51:13 AM PDT 23 7089510471 ps
T57 /workspace/coverage/default/194.hmac_stress_all_with_rand_reset.708811291 May 27 01:51:09 AM PDT 23 May 27 02:49:19 AM PDT 23 99462054551 ps
T58 /workspace/coverage/default/29.hmac_smoke.3281625938 May 27 01:49:07 AM PDT 23 May 27 01:49:10 AM PDT 23 1107140150 ps
T59 /workspace/coverage/default/23.hmac_error.2605424074 May 27 01:49:04 AM PDT 23 May 27 01:51:14 AM PDT 23 31608604884 ps
T199 /workspace/coverage/default/165.hmac_stress_all_with_rand_reset.3189729888 May 27 01:51:10 AM PDT 23 May 27 01:56:53 AM PDT 23 71415587574 ps
T200 /workspace/coverage/default/21.hmac_long_msg.80874074 May 27 01:49:09 AM PDT 23 May 27 01:50:12 AM PDT 23 2314099778 ps
T201 /workspace/coverage/default/24.hmac_datapath_stress.3729620431 May 27 01:49:14 AM PDT 23 May 27 01:50:22 AM PDT 23 1371515503 ps
T202 /workspace/coverage/default/42.hmac_stress_all.2413205958 May 27 01:49:59 AM PDT 23 May 27 01:50:01 AM PDT 23 559659787 ps
T103 /workspace/coverage/default/187.hmac_stress_all_with_rand_reset.817878415 May 27 01:51:33 AM PDT 23 May 27 02:01:23 AM PDT 23 37888875196 ps
T105 /workspace/coverage/default/132.hmac_stress_all_with_rand_reset.3308964833 May 27 01:51:05 AM PDT 23 May 27 02:23:26 AM PDT 23 213083922493 ps
T203 /workspace/coverage/default/23.hmac_test_sha_vectors.1152480871 May 27 01:49:12 AM PDT 23 May 27 01:55:36 AM PDT 23 130939593452 ps
T204 /workspace/coverage/default/18.hmac_test_hmac_vectors.1990420606 May 27 01:49:02 AM PDT 23 May 27 01:49:03 AM PDT 23 69338854 ps
T132 /workspace/coverage/default/6.hmac_datapath_stress.1331851767 May 27 01:48:16 AM PDT 23 May 27 01:49:01 AM PDT 23 1704422427 ps
T205 /workspace/coverage/default/42.hmac_smoke.458466524 May 27 01:49:58 AM PDT 23 May 27 01:50:00 AM PDT 23 115999759 ps
T206 /workspace/coverage/default/19.hmac_back_pressure.768736547 May 27 01:49:01 AM PDT 23 May 27 01:49:11 AM PDT 23 296072716 ps
T207 /workspace/coverage/default/0.hmac_stress_all_with_rand_reset.3048088807 May 27 01:47:57 AM PDT 23 May 27 02:23:07 AM PDT 23 171602245917 ps
T208 /workspace/coverage/default/41.hmac_error.3060304536 May 27 01:50:19 AM PDT 23 May 27 01:50:56 AM PDT 23 3929815517 ps
T209 /workspace/coverage/default/45.hmac_burst_wr.3951342830 May 27 01:50:04 AM PDT 23 May 27 01:50:16 AM PDT 23 2689209263 ps
T106 /workspace/coverage/default/41.hmac_stress_all.342538180 May 27 01:49:48 AM PDT 23 May 27 02:10:55 AM PDT 23 222629326941 ps
T210 /workspace/coverage/default/24.hmac_smoke.1002682365 May 27 01:49:00 AM PDT 23 May 27 01:49:03 AM PDT 23 3134289684 ps
T211 /workspace/coverage/default/20.hmac_test_sha_vectors.980333887 May 27 01:48:59 AM PDT 23 May 27 01:55:54 AM PDT 23 17358612187 ps
T212 /workspace/coverage/default/47.hmac_wipe_secret.539859210 May 27 01:50:35 AM PDT 23 May 27 01:51:36 AM PDT 23 2552836399 ps
T213 /workspace/coverage/default/23.hmac_test_hmac_vectors.4183283045 May 27 01:49:03 AM PDT 23 May 27 01:49:05 AM PDT 23 81047453 ps
T214 /workspace/coverage/default/38.hmac_long_msg.3160190004 May 27 01:49:36 AM PDT 23 May 27 01:49:44 AM PDT 23 444783977 ps
T215 /workspace/coverage/default/4.hmac_error.2467364768 May 27 01:48:12 AM PDT 23 May 27 01:48:26 AM PDT 23 1222592795 ps
T124 /workspace/coverage/default/57.hmac_stress_all_with_rand_reset.639924239 May 27 01:50:42 AM PDT 23 May 27 02:21:45 AM PDT 23 99106228924 ps
T216 /workspace/coverage/default/9.hmac_wipe_secret.3185015696 May 27 01:48:16 AM PDT 23 May 27 01:48:51 AM PDT 23 846148842 ps
T217 /workspace/coverage/default/22.hmac_test_hmac_vectors.2827203303 May 27 01:49:00 AM PDT 23 May 27 01:49:01 AM PDT 23 113394051 ps
T47 /workspace/coverage/default/1.hmac_sec_cm.346698133 May 27 01:48:11 AM PDT 23 May 27 01:48:12 AM PDT 23 68175961 ps
T218 /workspace/coverage/default/121.hmac_stress_all_with_rand_reset.986528212 May 27 01:50:46 AM PDT 23 May 27 02:14:40 AM PDT 23 382149488140 ps
T121 /workspace/coverage/default/5.hmac_burst_wr.1392266933 May 27 01:48:21 AM PDT 23 May 27 01:49:10 AM PDT 23 3212746921 ps
T219 /workspace/coverage/default/13.hmac_wipe_secret.3772000163 May 27 01:48:21 AM PDT 23 May 27 01:49:35 AM PDT 23 5319984509 ps
T220 /workspace/coverage/default/37.hmac_test_hmac_vectors.3980384809 May 27 01:49:48 AM PDT 23 May 27 01:49:49 AM PDT 23 35425362 ps
T221 /workspace/coverage/default/27.hmac_burst_wr.3691160025 May 27 01:49:18 AM PDT 23 May 27 01:49:29 AM PDT 23 552596952 ps
T222 /workspace/coverage/default/9.hmac_alert_test.1749459889 May 27 01:48:35 AM PDT 23 May 27 01:48:35 AM PDT 23 10658911 ps
T223 /workspace/coverage/default/112.hmac_stress_all_with_rand_reset.975792083 May 27 01:50:42 AM PDT 23 May 27 02:29:37 AM PDT 23 202079157254 ps
T224 /workspace/coverage/default/167.hmac_stress_all_with_rand_reset.15261484 May 27 01:51:06 AM PDT 23 May 27 02:06:56 AM PDT 23 107344379801 ps
T225 /workspace/coverage/default/1.hmac_back_pressure.107731027 May 27 01:47:57 AM PDT 23 May 27 01:48:06 AM PDT 23 1063830568 ps
T110 /workspace/coverage/default/72.hmac_stress_all_with_rand_reset.941994591 May 27 01:50:41 AM PDT 23 May 27 02:04:16 AM PDT 23 169531331250 ps
T226 /workspace/coverage/default/11.hmac_test_hmac_vectors.3216870075 May 27 01:48:19 AM PDT 23 May 27 01:48:20 AM PDT 23 139584544 ps
T227 /workspace/coverage/default/28.hmac_alert_test.3841956325 May 27 01:49:40 AM PDT 23 May 27 01:49:41 AM PDT 23 29332178 ps
T228 /workspace/coverage/default/3.hmac_test_hmac_vectors.3274020020 May 27 01:48:02 AM PDT 23 May 27 01:48:03 AM PDT 23 108059335 ps
T229 /workspace/coverage/default/19.hmac_error.1079586976 May 27 01:48:56 AM PDT 23 May 27 01:50:44 AM PDT 23 41063462359 ps
T230 /workspace/coverage/default/192.hmac_stress_all_with_rand_reset.2821660093 May 27 01:51:13 AM PDT 23 May 27 02:04:49 AM PDT 23 57252792562 ps
T231 /workspace/coverage/default/33.hmac_error.1647815582 May 27 01:49:37 AM PDT 23 May 27 01:51:00 AM PDT 23 7200680852 ps
T232 /workspace/coverage/default/48.hmac_test_sha_vectors.124365637 May 27 01:50:38 AM PDT 23 May 27 01:56:57 AM PDT 23 31339703620 ps
T114 /workspace/coverage/default/190.hmac_stress_all_with_rand_reset.752280483 May 27 01:51:32 AM PDT 23 May 27 02:44:40 AM PDT 23 172004002933 ps
T233 /workspace/coverage/default/53.hmac_stress_all_with_rand_reset.3068045867 May 27 01:50:37 AM PDT 23 May 27 02:08:00 AM PDT 23 63093539063 ps
T234 /workspace/coverage/default/25.hmac_datapath_stress.166832617 May 27 01:49:25 AM PDT 23 May 27 01:50:42 AM PDT 23 6172726552 ps
T235 /workspace/coverage/default/34.hmac_back_pressure.113898195 May 27 01:49:35 AM PDT 23 May 27 01:49:42 AM PDT 23 2310095159 ps
T236 /workspace/coverage/default/2.hmac_burst_wr.3659479193 May 27 01:48:01 AM PDT 23 May 27 01:48:05 AM PDT 23 191433593 ps
T237 /workspace/coverage/default/48.hmac_alert_test.312433321 May 27 01:50:34 AM PDT 23 May 27 01:50:35 AM PDT 23 48797215 ps
T238 /workspace/coverage/default/35.hmac_back_pressure.1966380623 May 27 01:49:36 AM PDT 23 May 27 01:49:49 AM PDT 23 415181671 ps
T239 /workspace/coverage/default/40.hmac_test_hmac_vectors.3333808315 May 27 01:49:59 AM PDT 23 May 27 01:50:00 AM PDT 23 126314701 ps
T240 /workspace/coverage/default/41.hmac_burst_wr.2607620276 May 27 01:50:19 AM PDT 23 May 27 01:50:43 AM PDT 23 984415891 ps
T241 /workspace/coverage/default/30.hmac_burst_wr.3669847208 May 27 01:49:33 AM PDT 23 May 27 01:49:41 AM PDT 23 513730611 ps
T242 /workspace/coverage/default/10.hmac_test_hmac_vectors.3315544255 May 27 01:48:16 AM PDT 23 May 27 01:48:18 AM PDT 23 85666279 ps
T243 /workspace/coverage/default/28.hmac_back_pressure.4211417780 May 27 01:49:43 AM PDT 23 May 27 01:50:01 AM PDT 23 1128750148 ps
T244 /workspace/coverage/default/191.hmac_stress_all_with_rand_reset.3429885933 May 27 01:51:15 AM PDT 23 May 27 01:55:00 AM PDT 23 16601081411 ps
T245 /workspace/coverage/default/149.hmac_stress_all_with_rand_reset.2415113165 May 27 01:51:08 AM PDT 23 May 27 01:53:52 AM PDT 23 17959516492 ps
T246 /workspace/coverage/default/93.hmac_stress_all_with_rand_reset.3518634007 May 27 01:50:52 AM PDT 23 May 27 02:34:45 AM PDT 23 340782278554 ps
T247 /workspace/coverage/default/7.hmac_datapath_stress.107240784 May 27 01:48:21 AM PDT 23 May 27 01:49:34 AM PDT 23 5844045196 ps
T248 /workspace/coverage/default/34.hmac_alert_test.2728211704 May 27 01:49:29 AM PDT 23 May 27 01:49:30 AM PDT 23 38886870 ps
T249 /workspace/coverage/default/45.hmac_datapath_stress.647358281 May 27 01:50:04 AM PDT 23 May 27 01:50:05 AM PDT 23 49379378 ps
T250 /workspace/coverage/default/30.hmac_datapath_stress.1173239222 May 27 01:49:28 AM PDT 23 May 27 01:49:58 AM PDT 23 627096953 ps
T251 /workspace/coverage/default/17.hmac_alert_test.1506072261 May 27 01:49:02 AM PDT 23 May 27 01:49:03 AM PDT 23 102917044 ps
T252 /workspace/coverage/default/39.hmac_wipe_secret.906553667 May 27 01:49:36 AM PDT 23 May 27 01:50:08 AM PDT 23 2000524531 ps
T253 /workspace/coverage/default/9.hmac_test_hmac_vectors.1028408666 May 27 01:48:21 AM PDT 23 May 27 01:48:22 AM PDT 23 434124642 ps
T254 /workspace/coverage/default/19.hmac_test_hmac_vectors.2996001397 May 27 01:49:03 AM PDT 23 May 27 01:49:04 AM PDT 23 186691847 ps
T255 /workspace/coverage/default/12.hmac_back_pressure.3301276447 May 27 01:48:25 AM PDT 23 May 27 01:49:08 AM PDT 23 12417778149 ps
T256 /workspace/coverage/default/37.hmac_datapath_stress.4134827678 May 27 01:49:44 AM PDT 23 May 27 01:51:16 AM PDT 23 7301932357 ps
T257 /workspace/coverage/default/164.hmac_stress_all_with_rand_reset.2930103809 May 27 01:51:06 AM PDT 23 May 27 01:58:34 AM PDT 23 89045522886 ps
T258 /workspace/coverage/default/52.hmac_stress_all_with_rand_reset.4161306343 May 27 01:50:42 AM PDT 23 May 27 02:01:12 AM PDT 23 53909350350 ps
T259 /workspace/coverage/default/110.hmac_stress_all_with_rand_reset.3590387620 May 27 01:50:43 AM PDT 23 May 27 02:01:49 AM PDT 23 50287421254 ps
T260 /workspace/coverage/default/35.hmac_datapath_stress.3069538931 May 27 01:49:34 AM PDT 23 May 27 01:51:29 AM PDT 23 2419803745 ps
T261 /workspace/coverage/default/1.hmac_stress_all.4258276063 May 27 01:47:57 AM PDT 23 May 27 01:50:35 AM PDT 23 23501286789 ps
T262 /workspace/coverage/default/19.hmac_smoke.247762597 May 27 01:48:58 AM PDT 23 May 27 01:49:00 AM PDT 23 46743680 ps
T263 /workspace/coverage/default/12.hmac_test_sha_vectors.4010069853 May 27 01:48:15 AM PDT 23 May 27 01:55:50 AM PDT 23 139193766773 ps
T264 /workspace/coverage/default/36.hmac_stress_all_with_rand_reset.2185457361 May 27 01:49:28 AM PDT 23 May 27 02:10:15 AM PDT 23 252441133306 ps
T265 /workspace/coverage/default/18.hmac_back_pressure.2823315105 May 27 01:48:58 AM PDT 23 May 27 01:49:19 AM PDT 23 727012836 ps
T266 /workspace/coverage/default/36.hmac_test_sha_vectors.2506727959 May 27 01:49:34 AM PDT 23 May 27 01:55:42 AM PDT 23 30913498749 ps
T267 /workspace/coverage/default/15.hmac_test_sha_vectors.901668770 May 27 01:48:53 AM PDT 23 May 27 01:55:20 AM PDT 23 30068579849 ps
T268 /workspace/coverage/default/43.hmac_back_pressure.3272535354 May 27 01:49:56 AM PDT 23 May 27 01:50:05 AM PDT 23 1386888841 ps
T269 /workspace/coverage/default/83.hmac_stress_all_with_rand_reset.2980410981 May 27 01:50:42 AM PDT 23 May 27 02:14:44 AM PDT 23 101235858713 ps
T270 /workspace/coverage/default/27.hmac_stress_all.3706042842 May 27 01:49:17 AM PDT 23 May 27 01:58:34 AM PDT 23 32515294283 ps
T271 /workspace/coverage/default/2.hmac_error.212243654 May 27 01:47:57 AM PDT 23 May 27 01:48:55 AM PDT 23 5866713576 ps
T272 /workspace/coverage/default/19.hmac_alert_test.1846007220 May 27 01:48:57 AM PDT 23 May 27 01:48:58 AM PDT 23 11610814 ps
T104 /workspace/coverage/default/32.hmac_stress_all_with_rand_reset.1196103338 May 27 01:49:27 AM PDT 23 May 27 01:53:34 AM PDT 23 48476471673 ps
T273 /workspace/coverage/default/48.hmac_stress_all_with_rand_reset.3776579687 May 27 01:50:39 AM PDT 23 May 27 02:09:04 AM PDT 23 248534570988 ps
T123 /workspace/coverage/default/4.hmac_long_msg.184910464 May 27 01:48:12 AM PDT 23 May 27 01:50:00 AM PDT 23 5921440174 ps
T274 /workspace/coverage/default/94.hmac_stress_all_with_rand_reset.159885706 May 27 01:50:40 AM PDT 23 May 27 02:14:44 AM PDT 23 60295269534 ps
T275 /workspace/coverage/default/12.hmac_error.2526664550 May 27 01:48:07 AM PDT 23 May 27 01:49:45 AM PDT 23 5768745979 ps
T276 /workspace/coverage/default/2.hmac_long_msg.1023708934 May 27 01:47:55 AM PDT 23 May 27 01:48:50 AM PDT 23 4512163554 ps
T277 /workspace/coverage/default/8.hmac_stress_all.2911660962 May 27 01:48:22 AM PDT 23 May 27 01:51:18 AM PDT 23 14424387838 ps
T278 /workspace/coverage/default/24.hmac_test_sha_vectors.2002558470 May 27 01:49:14 AM PDT 23 May 27 01:55:55 AM PDT 23 64320557780 ps
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