Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34923044 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 35918407 1 T1 3287 T2 2518 T3 167342



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 28358657 1 T1 2907 T2 110 T3 136677
values[0x0] 19841305 1 T1 1893 T2 1341 T3 95714
values[0x1] 22641489 1 T1 2390 T2 1417 T3 107901



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 26054614 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 44786837 1 T1 4356 T2 2648 T3 208342



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 279730 1 T1 34 T2 13 T3 1237
valid_sources[0x01] 252742 1 T1 31 T2 7 T3 1330
valid_sources[0x02] 244993 1 T1 29 T2 8 T3 1236
valid_sources[0x03] 261219 1 T1 35 T2 14 T3 1278
valid_sources[0x04] 275710 1 T1 16 T2 10 T3 1266
valid_sources[0x05] 269832 1 T1 34 T2 13 T3 1341
valid_sources[0x06] 256716 1 T1 42 T2 9 T3 1227
valid_sources[0x07] 273940 1 T1 34 T2 12 T3 1366
valid_sources[0x08] 252181 1 T1 22 T2 5 T3 1368
valid_sources[0x09] 731869 1 T1 37 T2 10 T3 1299
valid_sources[0x0a] 253917 1 T1 43 T2 23 T3 1379
valid_sources[0x0b] 238965 1 T1 40 T2 8 T3 1215
valid_sources[0x0c] 262603 1 T1 24 T2 8 T3 1341
valid_sources[0x0d] 290769 1 T1 22 T2 8 T3 1415
valid_sources[0x0e] 280085 1 T1 25 T2 16 T3 1372
valid_sources[0x0f] 240285 1 T1 25 T2 6 T3 1293
valid_sources[0x10] 249967 1 T1 17 T2 8 T3 1334
valid_sources[0x11] 257969 1 T1 30 T2 8 T3 1347
valid_sources[0x12] 257483 1 T1 28 T2 9 T3 1357
valid_sources[0x13] 246760 1 T1 29 T2 12 T3 1259
valid_sources[0x14] 248149 1 T1 31 T2 14 T3 1352
valid_sources[0x15] 247777 1 T1 29 T2 5 T3 1257
valid_sources[0x16] 247412 1 T1 26 T2 7 T3 1295
valid_sources[0x17] 260372 1 T1 33 T2 13 T3 1438
valid_sources[0x18] 247323 1 T1 33 T2 12 T3 1285
valid_sources[0x19] 268614 1 T1 29 T2 16 T3 1285
valid_sources[0x1a] 242122 1 T1 29 T2 16 T3 1281
valid_sources[0x1b] 241969 1 T1 29 T2 14 T3 1350
valid_sources[0x1c] 253277 1 T1 35 T2 7 T3 1247
valid_sources[0x1d] 246312 1 T1 28 T2 12 T3 1364
valid_sources[0x1e] 277320 1 T1 16 T2 16 T3 1350
valid_sources[0x1f] 253753 1 T1 33 T2 10 T3 1343
valid_sources[0x20] 245733 1 T1 16 T2 9 T3 1263
valid_sources[0x21] 255518 1 T1 36 T2 10 T3 1316
valid_sources[0x22] 278616 1 T1 32 T2 8 T3 1476
valid_sources[0x23] 241200 1 T1 20 T2 14 T3 1373
valid_sources[0x24] 245066 1 T1 24 T2 9 T3 1366
valid_sources[0x25] 252674 1 T1 23 T2 12 T3 1270
valid_sources[0x26] 249865 1 T1 32 T2 9 T3 1267
valid_sources[0x27] 269248 1 T1 33 T2 7 T3 1328
valid_sources[0x28] 250003 1 T1 21 T2 12 T3 1417
valid_sources[0x29] 251844 1 T1 35 T2 16 T3 1327
valid_sources[0x2a] 273815 1 T1 27 T2 7 T3 1370
valid_sources[0x2b] 255035 1 T1 30 T2 18 T3 1350
valid_sources[0x2c] 259757 1 T1 23 T2 11 T3 1431
valid_sources[0x2d] 248000 1 T1 22 T2 11 T3 1396
valid_sources[0x2e] 292021 1 T1 22 T2 12 T3 1340
valid_sources[0x2f] 249517 1 T1 29 T2 9 T3 1316
valid_sources[0x30] 261123 1 T1 34 T2 17 T3 1362
valid_sources[0x31] 254878 1 T1 43 T2 6 T3 1292
valid_sources[0x32] 617748 1 T1 20 T2 14 T3 1464
valid_sources[0x33] 240798 1 T1 21 T2 12 T3 1333
valid_sources[0x34] 251307 1 T1 33 T2 3 T3 1268
valid_sources[0x35] 272878 1 T1 29 T2 16 T3 1287
valid_sources[0x36] 625233 1 T1 32 T2 15 T3 1344
valid_sources[0x37] 244003 1 T1 22 T2 8 T3 1254
valid_sources[0x38] 559345 1 T1 32 T2 14 T3 1376
valid_sources[0x39] 246993 1 T1 24 T2 7 T3 1378
valid_sources[0x3a] 251504 1 T1 25 T2 6 T3 1416
valid_sources[0x3b] 241741 1 T1 21 T2 13 T3 1453
valid_sources[0x3c] 242693 1 T1 33 T2 9 T3 1384
valid_sources[0x3d] 308896 1 T1 28 T2 18 T3 1340
valid_sources[0x3e] 259377 1 T1 23 T2 13 T3 1360
valid_sources[0x3f] 255548 1 T1 22 T2 10 T3 1383
valid_sources[0x40] 241301 1 T1 26 T2 8 T3 1310
valid_sources[0x41] 279532 1 T1 35 T2 11 T3 1310
valid_sources[0x42] 248205 1 T1 22 T2 18 T3 1379
valid_sources[0x43] 239499 1 T1 26 T2 7 T3 1366
valid_sources[0x44] 249975 1 T1 27 T2 10 T3 1332
valid_sources[0x45] 276842 1 T1 32 T2 13 T3 1315
valid_sources[0x46] 245161 1 T1 35 T2 13 T3 1305
valid_sources[0x47] 241157 1 T1 23 T2 16 T3 1381
valid_sources[0x48] 247864 1 T1 29 T2 13 T3 1419
valid_sources[0x49] 239309 1 T1 23 T2 8 T3 1303
valid_sources[0x4a] 245019 1 T1 37 T2 7 T3 1380
valid_sources[0x4b] 245607 1 T1 20 T2 13 T3 1342
valid_sources[0x4c] 288242 1 T1 35 T2 17 T3 1226
valid_sources[0x4d] 236760 1 T1 28 T2 20 T3 1289
valid_sources[0x4e] 654801 1 T1 31 T2 9 T3 1290
valid_sources[0x4f] 240011 1 T1 38 T2 12 T3 1328
valid_sources[0x50] 242578 1 T1 44 T2 10 T3 1349
valid_sources[0x51] 243728 1 T1 32 T2 13 T3 1366
valid_sources[0x52] 243732 1 T1 26 T2 5 T3 1399
valid_sources[0x53] 250839 1 T1 33 T2 4 T3 1224
valid_sources[0x54] 277523 1 T1 33 T2 12 T3 1361
valid_sources[0x55] 241493 1 T1 24 T2 16 T3 1227
valid_sources[0x56] 257808 1 T1 29 T2 4 T3 1271
valid_sources[0x57] 249259 1 T1 30 T2 11 T3 1398
valid_sources[0x58] 243932 1 T1 29 T2 9 T3 1342
valid_sources[0x59] 247734 1 T1 25 T2 8 T3 1300
valid_sources[0x5a] 242296 1 T1 31 T2 14 T3 1373
valid_sources[0x5b] 296263 1 T1 27 T2 16 T3 1405
valid_sources[0x5c] 240973 1 T1 30 T2 10 T3 1264
valid_sources[0x5d] 259211 1 T1 36 T2 3 T3 1289
valid_sources[0x5e] 244744 1 T1 28 T2 13 T3 1365
valid_sources[0x5f] 254652 1 T1 25 T2 14 T3 1354
valid_sources[0x60] 245981 1 T1 18 T2 10 T3 1311
valid_sources[0x61] 249619 1 T1 28 T2 13 T3 1391
valid_sources[0x62] 248321 1 T1 37 T2 9 T3 1337
valid_sources[0x63] 301971 1 T1 23 T2 12 T3 1270
valid_sources[0x64] 239747 1 T1 24 T2 13 T3 1374
valid_sources[0x65] 250103 1 T1 20 T2 13 T3 1380
valid_sources[0x66] 266964 1 T1 35 T2 8 T3 1413
valid_sources[0x67] 242720 1 T1 29 T2 8 T3 1280
valid_sources[0x68] 244104 1 T1 28 T2 11 T3 1300
valid_sources[0x69] 254049 1 T1 33 T2 18 T3 1351
valid_sources[0x6a] 251525 1 T1 23 T2 7 T3 1338
valid_sources[0x6b] 260505 1 T1 25 T2 12 T3 1352
valid_sources[0x6c] 236947 1 T1 25 T2 13 T3 1307
valid_sources[0x6d] 252253 1 T1 26 T2 15 T3 1346
valid_sources[0x6e] 240740 1 T1 15 T2 19 T3 1240
valid_sources[0x6f] 242188 1 T1 24 T2 9 T3 1261
valid_sources[0x70] 258520 1 T1 17 T2 17 T3 1427
valid_sources[0x71] 668950 1 T1 36 T2 12 T3 1310
valid_sources[0x72] 283423 1 T1 31 T2 4 T3 1430
valid_sources[0x73] 251724 1 T1 22 T2 17 T3 1258
valid_sources[0x74] 250843 1 T1 34 T2 9 T3 1364
valid_sources[0x75] 263896 1 T1 37 T2 6 T3 1324
valid_sources[0x76] 282031 1 T1 33 T2 15 T3 1416
valid_sources[0x77] 244558 1 T1 30 T2 13 T3 1422
valid_sources[0x78] 251034 1 T1 16 T2 13 T3 1249
valid_sources[0x79] 252037 1 T1 26 T2 15 T3 1271
valid_sources[0x7a] 247418 1 T1 32 T2 14 T3 1373
valid_sources[0x7b] 965130 1 T1 17 T2 14 T3 1295
valid_sources[0x7c] 261700 1 T1 37 T2 14 T3 1405
valid_sources[0x7d] 238500 1 T1 19 T2 9 T3 1309
valid_sources[0x7e] 252218 1 T1 31 T2 11 T3 1371
valid_sources[0x7f] 245912 1 T1 28 T2 14 T3 1283
valid_sources[0x80] 245523 1 T1 23 T2 10 T3 1360



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 13618986 1 T1 1467 T2 48 T3 68369
values[0x0] all_enables biggest_size 11705526 1 T1 946 T2 1246 T3 52688
values[0x1] all_enables biggest_size 10593895 1 T1 874 T2 1224 T3 46285

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%