Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53887526	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

18246512

1

T18

21

T19

352

T20

248

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	63131764	1			T18	20		T19	638		T20	76
values[0x0]	4501505	1			T18	11		T19	17		T20	88
values[0x1]	4500769	1			T18	9		T19	23		T20	101

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39612762	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

32521276

1

T18

21

T19

406

T20

259

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	274918	1			T19	3		T21	1		T22	12
valid_sources[0x01]	247857	1			T19	1		T21	1		T22	4
valid_sources[0x02]	270644	1			T19	4		T22	8		T25	1
valid_sources[0x03]	245412	1			T19	4		T22	30		T24	1
valid_sources[0x04]	247576	1			T19	8		T22	14		T23	2
valid_sources[0x05]	265276	1			T21	1		T22	12		T24	2
valid_sources[0x06]	246404	1			T19	2		T22	11		T121	1
valid_sources[0x07]	256431	1			T19	1		T22	6		T68	2
valid_sources[0x08]	257392	1			T19	5		T22	9		T25	1
valid_sources[0x09]	240721	1			T19	2		T21	1		T22	16
valid_sources[0x0a]	262312	1			T19	5		T21	4		T22	6
valid_sources[0x0b]	624745	1			T19	1		T22	19		T27	3
valid_sources[0x0c]	268340	1			T19	2		T22	13		T27	3
valid_sources[0x0d]	778089	1			T20	8		T22	2		T107	1
valid_sources[0x0e]	356325	1			T21	1		T22	11		T27	3
valid_sources[0x0f]	237179	1			T22	11		T25	3		T27	2
valid_sources[0x10]	251326	1			T19	2		T22	21		T27	4
valid_sources[0x11]	266959	1			T19	1		T21	1		T22	7
valid_sources[0x12]	546322	1			T19	5		T21	1		T22	9
valid_sources[0x13]	382978	1			T19	2		T21	2		T22	12
valid_sources[0x14]	260308	1			T19	4		T21	1		T22	7
valid_sources[0x15]	262226	1			T19	5		T21	1		T22	17
valid_sources[0x16]	266642	1			T19	5		T22	18		T27	4
valid_sources[0x17]	249783	1			T19	2		T22	11		T27	5
valid_sources[0x18]	245950	1			T19	3		T22	14		T25	1
valid_sources[0x19]	250867	1			T19	2		T21	2		T22	11
valid_sources[0x1a]	254268	1			T19	3		T21	2		T22	16
valid_sources[0x1b]	388657	1			T21	1		T22	29		T27	5
valid_sources[0x1c]	265125	1			T19	1		T21	2		T22	10
valid_sources[0x1d]	244486	1			T19	4		T22	23		T27	2
valid_sources[0x1e]	565500	1			T22	9		T23	1		T25	3
valid_sources[0x1f]	259954	1			T19	2		T20	72		T21	4
valid_sources[0x20]	240201	1			T19	1		T20	1		T22	6
valid_sources[0x21]	248702	1			T19	1		T21	2		T22	14
valid_sources[0x22]	258224	1			T19	2		T20	16		T21	1
valid_sources[0x23]	281970	1			T19	3		T21	1		T22	10
valid_sources[0x24]	288166	1			T19	4		T22	45		T27	6
valid_sources[0x25]	793595	1			T19	2		T21	2		T22	21
valid_sources[0x26]	245807	1			T21	1		T22	38		T27	3
valid_sources[0x27]	246042	1			T19	2		T22	24		T121	1
valid_sources[0x28]	285602	1			T19	1		T21	1		T22	1
valid_sources[0x29]	244091	1			T19	3		T22	12		T27	3
valid_sources[0x2a]	256404	1			T18	6		T19	1		T21	1
valid_sources[0x2b]	270616	1			T19	3		T21	1		T22	2
valid_sources[0x2c]	260022	1			T19	4		T21	1		T22	8
valid_sources[0x2d]	404649	1			T19	4		T21	1		T22	7
valid_sources[0x2e]	465657	1			T19	2		T22	4		T27	4
valid_sources[0x2f]	243267	1			T19	1		T21	3		T22	22
valid_sources[0x30]	241796	1			T19	3		T21	1		T22	13
valid_sources[0x31]	312864	1			T18	1		T19	5		T21	2
valid_sources[0x32]	251659	1			T19	1		T22	15		T27	1
valid_sources[0x33]	237637	1			T19	1		T21	2		T22	31
valid_sources[0x34]	242900	1			T19	2		T22	12		T25	1
valid_sources[0x35]	276346	1			T19	4		T20	9		T21	2
valid_sources[0x36]	237178	1			T19	1		T21	2		T22	15
valid_sources[0x37]	242412	1			T19	1		T21	2		T22	17
valid_sources[0x38]	257107	1			T19	1		T21	2		T22	17
valid_sources[0x39]	286165	1			T19	2		T21	1		T22	7
valid_sources[0x3a]	257048	1			T19	1		T21	1		T22	40
valid_sources[0x3b]	245545	1			T19	4		T22	18		T68	1
valid_sources[0x3c]	240124	1			T19	2		T21	3		T22	4
valid_sources[0x3d]	282402	1			T19	1		T21	2		T22	10
valid_sources[0x3e]	268983	1			T19	5		T21	1		T22	8
valid_sources[0x3f]	313293	1			T19	1		T22	6		T27	3
valid_sources[0x40]	280723	1			T19	2		T21	1		T22	13
valid_sources[0x41]	263404	1			T19	2		T21	1		T22	31
valid_sources[0x42]	254379	1			T18	1		T19	3		T21	2
valid_sources[0x43]	248433	1			T19	2		T21	1		T22	31
valid_sources[0x44]	256874	1			T19	1		T22	9		T27	2
valid_sources[0x45]	268225	1			T19	2		T22	6		T27	2
valid_sources[0x46]	538634	1			T19	1		T21	1		T22	15
valid_sources[0x47]	233879	1			T19	7		T21	1		T22	19
valid_sources[0x48]	261652	1			T19	2		T22	14		T24	1
valid_sources[0x49]	275305	1			T19	2		T21	2		T22	10
valid_sources[0x4a]	269396	1			T19	6		T22	6		T27	2
valid_sources[0x4b]	237584	1			T19	5		T22	9		T25	1
valid_sources[0x4c]	240943	1			T19	1		T21	1		T22	18
valid_sources[0x4d]	259649	1			T19	7		T21	2		T22	34
valid_sources[0x4e]	267639	1			T19	3		T22	11		T27	2
valid_sources[0x4f]	268874	1			T19	3		T21	1		T22	32
valid_sources[0x50]	236215	1			T19	1		T22	43		T24	1
valid_sources[0x51]	245763	1			T19	3		T20	30		T27	2
valid_sources[0x52]	283435	1			T19	7		T21	1		T22	13
valid_sources[0x53]	270403	1			T19	7		T20	2		T22	26
valid_sources[0x54]	247780	1			T19	6		T22	11		T25	3
valid_sources[0x55]	269230	1			T19	6		T22	2		T27	5
valid_sources[0x56]	271552	1			T19	3		T22	16		T27	3
valid_sources[0x57]	248232	1			T22	16		T25	1		T27	3
valid_sources[0x58]	299082	1			T19	2		T22	5		T27	2
valid_sources[0x59]	263990	1			T19	3		T21	1		T22	14
valid_sources[0x5a]	265874	1			T19	3		T21	2		T22	19
valid_sources[0x5b]	294388	1			T21	2		T22	15		T27	4
valid_sources[0x5c]	273288	1			T19	2		T21	3		T22	9
valid_sources[0x5d]	281264	1			T19	3		T22	25		T27	1
valid_sources[0x5e]	263208	1			T21	1		T22	10		T23	1
valid_sources[0x5f]	256035	1			T22	6		T24	1		T27	3
valid_sources[0x60]	270022	1			T19	2		T22	5		T23	2
valid_sources[0x61]	275233	1			T19	5		T21	1		T22	9
valid_sources[0x62]	250095	1			T19	4		T21	2		T22	18
valid_sources[0x63]	245686	1			T19	6		T21	2		T22	36
valid_sources[0x64]	266529	1			T19	1		T22	9		T27	2
valid_sources[0x65]	246491	1			T19	2		T22	15		T24	2
valid_sources[0x66]	249594	1			T19	1		T22	18		T27	1
valid_sources[0x67]	243343	1			T19	1		T21	1		T22	43
valid_sources[0x68]	353749	1			T19	4		T21	1		T22	20
valid_sources[0x69]	284975	1			T19	1		T22	27		T24	1
valid_sources[0x6a]	238823	1			T19	1		T21	1		T22	5
valid_sources[0x6b]	275298	1			T19	1		T21	2		T22	16
valid_sources[0x6c]	269945	1			T19	4		T21	1		T22	12
valid_sources[0x6d]	237346	1			T19	2		T22	7		T27	2
valid_sources[0x6e]	259606	1			T19	3		T21	3		T22	15
valid_sources[0x6f]	548957	1			T19	1		T21	1		T22	2
valid_sources[0x70]	259730	1			T19	4		T21	2		T22	7
valid_sources[0x71]	267765	1			T18	14		T19	1		T22	16
valid_sources[0x72]	411782	1			T19	1		T21	3		T22	8
valid_sources[0x73]	255005	1			T19	6		T22	8		T24	1
valid_sources[0x74]	252706	1			T20	16		T22	19		T107	1
valid_sources[0x75]	263994	1			T19	3		T22	14		T25	1
valid_sources[0x76]	237521	1			T19	3		T21	2		T22	26
valid_sources[0x77]	265276	1			T19	5		T21	1		T22	27
valid_sources[0x78]	243505	1			T19	3		T22	4		T24	1
valid_sources[0x79]	272602	1			T19	2		T22	14		T134	1
valid_sources[0x7a]	245598	1			T19	3		T21	1		T22	12
valid_sources[0x7b]	254425	1			T19	2		T21	1		T22	28
valid_sources[0x7c]	269645	1			T19	4		T21	1		T22	20
valid_sources[0x7d]	276151	1			T19	4		T21	2		T22	29
valid_sources[0x7e]	247721	1			T18	1		T19	3		T20	1
valid_sources[0x7f]	248205	1			T22	22		T27	5		T74	1
valid_sources[0x80]	241688	1			T19	1		T22	3		T23	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

14829965

1

T18

12

T19

327

T20

73

values[0x0]

all_enables

biggest_size

2206505

1

T18

6

T19

13

T20

86

values[0x1]

all_enables

biggest_size

1210042

1

T18

3

T19

12

T20

89