Unified Coverage Report :: Module :: i2c_fsm

Module : i2c_fsm

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.i2c_core.u_i2c_fsm	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.i2c_core.u_i2c_fsm

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		i2c_core

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

Line Coverage for Module : i2c_fsm

	Line No.	Total	Covered	Percent
TOTAL		554	0	0.00
ALWAYS	155	17	0	0.00
CONT_ASSIGN	179	1	0	0.00
ALWAYS	182	3	0	0.00
ALWAYS	195	9	0	0.00
ALWAYS	211	7	0	0.00
ALWAYS	224	6	0	0.00
ALWAYS	235	5	0	0.00
ALWAYS	242	7	0	0.00
ALWAYS	255	5	0	0.00
ALWAYS	269	8	0	0.00
ALWAYS	281	8	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	296	1	0	0.00
CONT_ASSIGN	299	1	0	0.00
ALWAYS	303	9	0	0.00
CONT_ASSIGN	318	1	0	0.00
CONT_ASSIGN	319	1	0	0.00
CONT_ASSIGN	320	1	0	0.00
ALWAYS	324	7	0	0.00
ALWAYS	335	5	0	0.00
CONT_ASSIGN	348	1	0	0.00
CONT_ASSIGN	349	1	0	0.00
CONT_ASSIGN	407	1	0	0.00
ALWAYS	412	6	0	0.00
CONT_ASSIGN	430	1	0	0.00
ALWAYS	435	4	0	0.00
CONT_ASSIGN	452	1	0	0.00
CONT_ASSIGN	456	1	0	0.00
ALWAYS	460	180	0	0.00
CONT_ASSIGN	806	1	0	0.00
CONT_ASSIGN	815	1	0	0.00
CONT_ASSIGN	820	1	0	0.00
ALWAYS	824	239	0	0.00
ALWAYS	1324	3	0	0.00
ALWAYS	1333	5	0	0.00
CONT_ASSIGN	1342	1	0	0.00
CONT_ASSIGN	1343	1	0	0.00
CONT_ASSIGN	1346	1	0	0.00
CONT_ASSIGN	1349	1	0	0.00
CONT_ASSIGN	1353	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
155	0	1
156	0	1
157	0	1
158	0	1
159	0	1
160	0	1
161	0	1
162	0	1
163	0	1
164	0	1
165	0	1
166	0	1
167	0	1
168	0	1
171	0	1
172	0	1
174	0	1
179	0	1
182	0	1
183	0	1
185	0	1
195	0	1
196	0	1
197	0	1
198	0	1
199	0	1
201	0	1
202	0	1
203	0	1
205	0	1
211	0	1
212	0	1
213	0	1
214	0	1
215	0	1
216	0	1
218	0	1
224	0	1
225	0	1
226	0	1
227	0	1
228	0	1
229	0	1
			==> MISSING_ELSE
235	0	2
236	0	2
237	0	1
242	0	1
243	0	1
244	0	1
245	0	1
246	0	1
247	0	1
249	0	1
255	0	1
256	0	1
257	0	1
259	0	1
260	0	1
269	0	1
270	0	1
271	0	1
272	0	1
273	0	1
274	0	1
275	0	1
276	0	1
			==> MISSING_ELSE
281	0	1
282	0	1
283	0	1
284	0	1
285	0	1
286	0	1
287	0	1
288	0	1
			==> MISSING_ELSE
293	0	1
296	0	1
299	0	1
303	0	1
304	0	1
305	0	1
306	0	1
307	0	1
310	0	2
311	0	1
313	0	1
318	0	1
319	0	1
320	0	1
324	0	1
325	0	1
326	0	1
327	0	1
328	0	1
329	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
335	0	1
336	0	1
337	0	1
338	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
348	0	1
349	0	1
407	0	1
412	0	1
413	0	1
414	0	1
418	0	1
419	0	1
420	0	1
			==> MISSING_ELSE
430	0	1
435	0	1
436	0	1
437	0	1
438	0	1
			==> MISSING_ELSE
452	0	1
456	0	1
460	0	1
461	0	1
462	0	1
463	0	1
464	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
472	0	1
473	0	1
474	0	1
475	0	1
476	0	1
477	0	1
482	0	1
483	0	1
484	0	1
485	0	1
487	0	1
488	0	1
493	0	1
494	0	1
495	0	1
496	0	2
			==> MISSING_ELSE
500	0	1
501	0	1
502	0	1
506	0	1
507	0	1
508	0	1
511	0	1
512	0	1
513	0	1
515	0	1
517	0	1
521	0	1
522	0	1
523	0	1
524	0	1
525	0	2
			==> MISSING_ELSE
526	0	2
			==> MISSING_ELSE
530	0	1
531	0	1
532	0	1
536	0	1
537	0	1
538	0	1
542	0	1
543	0	1
544	0	1
545	0	2
			==> MISSING_ELSE
546	0	1
547	0	2
			==> MISSING_ELSE
548	0	2
			==> MISSING_ELSE
552	0	1
553	0	1
554	0	1
558	0	1
559	0	1
560	0	1
564	0	1
565	0	1
566	0	1
567	0	2
			==> MISSING_ELSE
568	0	2
			==> MISSING_ELSE
572	0	1
573	0	1
574	0	1
575	0	1
576	0	1
			==> MISSING_ELSE
581	0	1
582	0	1
586	0	2
587	0	2
588	0	1
592	0	1
593	0	2
594	0	2
595	0	1
596	0	1
597	0	1
598	0	2
			==> MISSING_ELSE
599	0	2
			==> MISSING_ELSE
603	0	1
604	0	2
605	0	2
606	0	1
607	0	1
611	0	1
612	0	1
613	0	1
617	0	1
618	0	1
619	0	1
623	0	1
624	0	1
625	0	1
626	0	1
630	0	1
636	0	1
640	0	1
641	0	2
642	0	1
643	0	1
647	0	1
651	0	1
652	0	1
656	0	1
660	0	1
661	0	1
665	0	1
666	0	1
670	0	1
671	0	1
674	0	1
676	0	1
677	0	1
			==> MISSING_ELSE
682	0	1
686	0	1
687	0	1
691	0	1
694	0	1
698	0	1
701	0	1
705	0	1
708	0	1
709	0	1
711	0	1
			==> MISSING_ELSE
716	0	1
717	0	1
718	0	1
722	0	1
726	0	1
730	0	1
731	0	1
735	0	1
736	0	1
740	0	1
741	0	1
743	0	1
744	0	1
745	0	1
			==> MISSING_ELSE
751	0	1
752	0	1
754	0	1
755	0	1
759	0	1
760	0	1
764	0	1
765	0	1
766	0	1
770	0	1
771	0	1
774	0	1
775	0	1
797	0	1
799	0	1
800	0	1
802	0	1
			==> MISSING_ELSE
806	0	1
815	0	1
820	0	1
824	0	1
825	0	1
826	0	1
827	0	1
828	0	1
829	0	1
830	0	1
831	0	1
832	0	1
833	0	1
834	0	1
835	0	1
836	0	1
837	0	1
838	0	1
840	0	1
843	0	2
844	0	1
845	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
851	0	1
852	0	1
853	0	1
854	0	1
855	0	1
			==> MISSING_ELSE
860	0	1
861	0	1
862	0	1
863	0	1
			==> MISSING_ELSE
868	0	1
869	0	1
870	0	1
871	0	1
			==> MISSING_ELSE
876	0	1
877	0	1
878	0	1
879	0	1
880	0	1
881	0	1
883	0	1
884	0	1
			==> MISSING_ELSE
891	0	1
892	0	1
893	0	1
894	0	1
895	0	1
			==> MISSING_ELSE
900	0	1
901	0	1
902	0	1
903	0	1
904	0	1
905	0	1
906	0	1
907	0	1
909	0	1
910	0	1
			==> MISSING_ELSE
917	0	1
918	0	1
919	0	1
920	0	1
			==> MISSING_ELSE
925	0	1
926	0	1
927	0	1
928	0	1
			==> MISSING_ELSE
933	0	1
934	0	1
935	0	1
936	0	1
937	0	1
939	0	1
940	0	1
941	0	1
			==> MISSING_ELSE
947	0	1
948	0	1
949	0	1
950	0	1
			==> MISSING_ELSE
955	0	1
956	0	1
957	0	1
958	0	1
959	0	1
			==> MISSING_ELSE
964	0	1
965	0	1
966	0	1
967	0	1
968	0	1
969	0	1
970	0	1
972	0	1
973	0	1
			==> MISSING_ELSE
980	0	1
981	0	1
982	0	1
983	0	1
984	0	1
			==> MISSING_ELSE
989	0	1
990	0	1
991	0	1
992	0	1
993	0	1
			==> MISSING_ELSE
998	0	1
999	0	1
1000	0	1
1001	0	1
1002	0	1
1003	0	1
1004	0	1
1005	0	1
1007	0	1
1008	0	1
1009	0	1
1012	0	1
1013	0	1
1014	0	1
1015	0	1
			==> MISSING_ELSE
1022	0	1
1023	0	1
1024	0	1
1025	0	1
			==> MISSING_ELSE
1030	0	1
1031	0	1
1032	0	1
1033	0	1
1034	0	1
			==> MISSING_ELSE
1039	0	1
1040	0	1
1041	0	1
1042	0	1
1043	0	1
1044	0	1
1045	0	1
1047	0	1
1048	0	1
1049	0	1
			==> MISSING_ELSE
1056	0	1
1057	0	1
1058	0	1
1059	0	1
1060	0	1
1061	0	1
1062	0	1
1063	0	1
1064	0	1
1066	0	1
1067	0	1
1068	0	1
1069	0	1
1075	0	1
1076	0	1
1077	0	1
1078	0	1
1079	0	1
1080	0	1
1081	0	1
1082	0	1
1084	0	1
1085	0	1
1086	0	1
1092	0	1
1094	0	1
1095	0	1
			==> MISSING_ELSE
1101	0	1
1102	0	1
1103	0	1
1104	0	1
1105	0	1
1106	0	1
			==> MISSING_ELSE
1112	0	1
1113	0	1
			==> MISSING_ELSE
1118	0	2
			==> MISSING_ELSE
1122	0	1
1123	0	1
1124	0	1
1125	0	1
			==> MISSING_ELSE
1130	0	1
1134	0	1
1135	0	1
1136	0	1
1137	0	1
1138	0	1
1139	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
1145	0	1
1146	0	1
1148	0	1
1149	0	1
1150	0	1
1155	0	2
			==> MISSING_ELSE
1159	0	1
1160	0	1
1161	0	1
1162	0	1
			==> MISSING_ELSE
1167	0	1
1168	0	1
1169	0	1
1171	0	1
1172	0	1
1173	0	1
			==> MISSING_ELSE
1180	0	1
1181	0	1
			==> MISSING_ELSE
1188	0	1
1190	0	1
1191	0	1
1194	0	1
			==> MISSING_ELSE
1203	0	1
1208	0	1
1209	0	1
1210	0	1
1211	0	1
			==> MISSING_ELSE
1217	0	1
1218	0	1
			==> MISSING_ELSE
1223	0	2
			==> MISSING_ELSE
1227	0	1
1228	0	1
1229	0	1
1230	0	1
			==> MISSING_ELSE
1235	0	1
1238	0	1
			==> MISSING_ELSE
1244	0	1
1250	0	1
			==> MISSING_ELSE
1256	0	1
1257	0	1
1264	0	1
1265	0	1
1266	0	1
1269	0	1
			==> MISSING_ELSE
1273	0	1
1274	0	1
			==> MISSING_ELSE
1281	0	2
			==> MISSING_ELSE
1305	0	1
1314	0	1
1315	0	1
1316	0	1
1317	0	1
1318	0	1
			==> MISSING_ELSE
1324	0	1
1325	0	1
1327	0	1
1333	0	1
1334	0	1
1335	0	1
1337	0	1
1338	0	1
1342	0	1
1343	0	1
1346	0	1
1349	0	1
1353	0	1

---

Cond Coverage for Module : i2c_fsm

	Total	Covered	Percent
Conditions	242	0	0.00
Logical	242	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       171
 EXPRESSION ((stretch_idle_cnt == '0) || target_enable_i)
             ------------1-----------    -------2-------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       171
 SUB-EXPRESSION (stretch_idle_cnt == '0)
                ------------1-----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       197
 EXPRESSION (stretch_en && scl_d && ((!scl_i)))
             -----1----    --2--    -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       199
 EXPRESSION (((!target_idle_o)) && event_host_timeout_o)
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       202
 EXPRESSION (((!target_idle_o)) && scl_i)
             ---------1--------    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       236
 EXPRESSION (fmt_byte_i == '0)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       271
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       283
 EXPRESSION (pend_restart && ((!host_enable_i)))
             ------1-----    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i)))))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i))))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION (sda_i_q && ((!sda_i)))
                 ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i)))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION (((!sda_i_q)) && sda_i)
                 ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       299
 EXPRESSION (bit_idx == 4'd8)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       307
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       310
 EXPRESSION (input_byte_clr || bit_ack)
             -------1------    ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       318
 EXPRESSION ((input_byte[7:1] & target_mask0_i) == target_address0_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       319
 EXPRESSION ((input_byte[7:1] & target_mask1_i) == target_address1_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       320
 EXPRESSION (address0_match || address1_match)
             -------1------    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       328
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       337
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       414
 EXPRESSION (((!en_sda_interf_det)) && ((|sda_rise_cnt)))
             -----------1----------    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       419
 EXPRESSION (en_sda_interf_det && (sda_rise_cnt < sda_rise_latency))
             --------1--------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       430
 EXPRESSION ((host_idle_o & host_enable_i & ((!sda_i))) | ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i))))
             ---------------------1--------------------   ----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       430
 SUB-EXPRESSION (host_idle_o & host_enable_i & ((!sda_i)))
                 -----1-----   ------2------   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       430
 SUB-EXPRESSION ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i)))
                 -----------------1----------------   --2--   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       430
 SUB-EXPRESSION (sda_rise_cnt == sda_rise_latency)
                -----------------1----------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       437
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       456
 EXPRESSION (((!target_idle)) & rw_bit_q & stop_det & ((!expect_stop)))
             --------1-------   ----2---   ----3---   --------4-------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       483
 EXPRESSION (host_enable_i && trans_started)
             ------1------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       525
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       526
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       545
 EXPRESSION (((!scl_i_q)) && scl_i && sda_i && ((!fmt_flag_nak_ok_i)))
             ------1-----    --2--    --3--    -----------4----------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       547
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       548
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       567
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       568
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       574
 EXPRESSION ((bit_index == '0) && (tcount_q == 20'b1))
             --------1--------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       574
 SUB-EXPRESSION (bit_index == '0)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       574
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       587
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       594
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       598
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       599
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       605
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       636
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       674
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       743
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       797
 EXPRESSION (start_det || stop_det)
             ----1----    ----2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       800
 EXPRESSION (start_det ? ({AcqRestart, input_byte}) : ({AcqStop, input_byte}))
             ----1----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       815
 EXPRESSION (((~tx_fifo_rvalid_i)) | (acq_fifo_depth_i > 9'(1'b1)))
             ----------1----------   --------------2--------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       843
 EXPRESSION (((!host_enable_i)) && ((!target_enable_i)))
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       851
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       860
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       868
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       877
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       892
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       901
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       905
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       917
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       925
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       933
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       947
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       955
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       964
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       967
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       981
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       990
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       999
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1001
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1022
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1030
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1040
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1061
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1079
 EXPRESSION (fmt_fifo_depth_i == 7'b1)
            -------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1092
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1101
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1105
 EXPRESSION (bit_ack && ((!address_match)))
             ---1---    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1112
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1112
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1130
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1167
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1217
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1217
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1235
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1238
 EXPRESSION (acq_fifo_wready ? AcquireByte : StretchAcqFull)
             -------1-------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1250
 EXPRESSION (rw_bit_q ? StretchTx : AcquireByte)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1273
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1305
 EXPRESSION (((!target_idle)) && ((!target_enable_i)))
             --------1-------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1346
 EXPRESSION (((!target_idle_o)) & (stretch_idle_cnt > host_timeout_i))
             ---------1--------   -----------------2-----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1349
 EXPRESSION (stretch_en && (stretch_idle_cnt[30:0] > stretch_timeout_i) && timeout_enable_i)
             -----1----    ----------------------2---------------------    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

---

FSM Coverage for Module : i2c_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	43	0	0.00	(Not included in score)
Transitions	142	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
AcquireAckHold	1228	Not Covered
AcquireAckPulse	1223	Not Covered
AcquireAckSetup	1218	Not Covered
AcquireAckWait	1209	Not Covered
AcquireByte	1139	Not Covered
AcquireStart	1316	Not Covered
Active	845	Not Covered
AddrAckHold	1123	Not Covered
AddrAckPulse	1118	Not Covered
AddrAckSetup	1113	Not Covered
AddrAckWait	1102	Not Covered
AddrRead	1094	Not Covered
ClockLow	869	Not Covered
ClockLowAck	906	Not Covered
ClockPulse	883	Not Covered
ClockPulseAck	918	Not Covered
ClockStart	861	Not Covered
ClockStop	935	Not Covered
HoldBit	893	Not Covered
HoldDevAck	926	Not Covered
HoldStart	852	Not Covered
HoldStop	1031	Not Covered
HostClockLowAck	968	Not Covered
HostClockPulseAck	982	Not Covered
HostHoldBitAck	991	Not Covered
Idle	843	Not Covered
PopFmtFifo	939	Not Covered
ReadClockLow	972	Not Covered
ReadClockPulse	948	Not Covered
ReadHoldBit	956	Not Covered
SetupStart	880	Not Covered
SetupStop	1023	Not Covered
StretchAcqFull	1238	Not Covered
StretchAddr	1135	Not Covered
StretchTx	1146	Not Covered
StretchTxSetup	1264	Not Covered
TransmitAck	1169	Not Covered
TransmitAckPulse	1181	Not Covered
TransmitHold	1160	Not Covered
TransmitPulse	1155	Not Covered
TransmitSetup	1148	Not Covered
TransmitWait	1137	Not Covered
WaitForStop	1194	Not Covered

transitions	Line No.	Covered	Tests
AcquireAckHold->AcquireByte	1238	Not Covered
AcquireAckHold->AcquireStart	1316	Not Covered
AcquireAckHold->Idle	1314	Not Covered
AcquireAckHold->StretchAcqFull	1238	Not Covered
AcquireAckPulse->AcquireAckHold	1228	Not Covered
AcquireAckPulse->AcquireStart	1316	Not Covered
AcquireAckPulse->Idle	1314	Not Covered
AcquireAckSetup->AcquireAckPulse	1223	Not Covered
AcquireAckSetup->AcquireStart	1316	Not Covered
AcquireAckSetup->Idle	1314	Not Covered
AcquireAckWait->AcquireAckSetup	1218	Not Covered
AcquireAckWait->AcquireStart	1316	Not Covered
AcquireAckWait->Idle	1314	Not Covered
AcquireByte->AcquireAckWait	1209	Not Covered
AcquireByte->AcquireStart	1316	Not Covered
AcquireByte->Idle	1314	Not Covered
AcquireStart->AddrRead	1094	Not Covered
AcquireStart->Idle	1314	Not Covered
Active->AcquireStart	1316	Not Covered
Active->ClockLow	1066	Not Covered
Active->Idle	1314	Not Covered
Active->ReadClockLow	1058	Not Covered
Active->SetupStart	1062	Not Covered
AddrAckHold->AcquireByte	1139	Not Covered
AddrAckHold->AcquireStart	1316	Not Covered
AddrAckHold->Idle	1314	Not Covered
AddrAckHold->StretchAddr	1135	Not Covered
AddrAckHold->TransmitWait	1137	Not Covered
AddrAckPulse->AcquireStart	1316	Not Covered
AddrAckPulse->AddrAckHold	1123	Not Covered
AddrAckPulse->Idle	1314	Not Covered
AddrAckSetup->AcquireStart	1316	Not Covered
AddrAckSetup->AddrAckPulse	1118	Not Covered
AddrAckSetup->Idle	1314	Not Covered
AddrAckWait->AcquireStart	1316	Not Covered
AddrAckWait->AddrAckSetup	1113	Not Covered
AddrAckWait->Idle	1314	Not Covered
AddrRead->AcquireStart	1316	Not Covered
AddrRead->AddrAckWait	1102	Not Covered
AddrRead->Idle	1106	Not Covered
ClockLow->AcquireStart	1316	Not Covered
ClockLow->ClockPulse	883	Not Covered
ClockLow->Idle	1314	Not Covered
ClockLow->SetupStart	880	Not Covered
ClockLowAck->AcquireStart	1316	Not Covered
ClockLowAck->ClockPulseAck	918	Not Covered
ClockLowAck->Idle	1314	Not Covered
ClockPulse->AcquireStart	1316	Not Covered
ClockPulse->HoldBit	893	Not Covered
ClockPulse->Idle	1314	Not Covered
ClockPulseAck->AcquireStart	1316	Not Covered
ClockPulseAck->HoldDevAck	926	Not Covered
ClockPulseAck->Idle	1314	Not Covered
ClockStart->AcquireStart	1316	Not Covered
ClockStart->ClockLow	869	Not Covered
ClockStart->Idle	1314	Not Covered
ClockStop->AcquireStart	1316	Not Covered
ClockStop->Idle	1314	Not Covered
ClockStop->SetupStop	1023	Not Covered
HoldBit->AcquireStart	1316	Not Covered
HoldBit->ClockLow	909	Not Covered
HoldBit->ClockLowAck	906	Not Covered
HoldBit->Idle	1314	Not Covered
HoldDevAck->AcquireStart	1316	Not Covered
HoldDevAck->ClockStop	935	Not Covered
HoldDevAck->Idle	1314	Not Covered
HoldDevAck->PopFmtFifo	939	Not Covered
HoldStart->AcquireStart	1316	Not Covered
HoldStart->ClockStart	861	Not Covered
HoldStart->Idle	1314	Not Covered
HoldStop->AcquireStart	1316	Not Covered
HoldStop->Idle	1043	Not Covered
HoldStop->PopFmtFifo	1047	Not Covered
HostClockLowAck->AcquireStart	1316	Not Covered
HostClockLowAck->HostClockPulseAck	982	Not Covered
HostClockLowAck->Idle	1314	Not Covered
HostClockPulseAck->AcquireStart	1316	Not Covered
HostClockPulseAck->HostHoldBitAck	991	Not Covered
HostClockPulseAck->Idle	1314	Not Covered
HostHoldBitAck->AcquireStart	1316	Not Covered
HostHoldBitAck->ClockStop	1003	Not Covered
HostHoldBitAck->Idle	1314	Not Covered
HostHoldBitAck->PopFmtFifo	1007	Not Covered
HostHoldBitAck->ReadClockLow	1012	Not Covered
Idle->AcquireStart	1316	Not Covered
Idle->Active	845	Not Covered
PopFmtFifo->AcquireStart	1316	Not Covered
PopFmtFifo->Active	1084	Not Covered
PopFmtFifo->ClockStop	1076	Not Covered
PopFmtFifo->Idle	1080	Not Covered
ReadClockLow->AcquireStart	1316	Not Covered
ReadClockLow->Idle	1314	Not Covered
ReadClockLow->ReadClockPulse	948	Not Covered
ReadClockPulse->AcquireStart	1316	Not Covered
ReadClockPulse->Idle	1314	Not Covered
ReadClockPulse->ReadHoldBit	956	Not Covered
ReadHoldBit->AcquireStart	1316	Not Covered
ReadHoldBit->HostClockLowAck	968	Not Covered
ReadHoldBit->Idle	1314	Not Covered
ReadHoldBit->ReadClockLow	972	Not Covered
SetupStart->AcquireStart	1316	Not Covered
SetupStart->HoldStart	852	Not Covered
SetupStart->Idle	1314	Not Covered
SetupStop->AcquireStart	1316	Not Covered
SetupStop->HoldStop	1031	Not Covered
SetupStop->Idle	1314	Not Covered
StretchAcqFull->AcquireByte	1281	Not Covered
StretchAcqFull->AcquireStart	1316	Not Covered
StretchAcqFull->Idle	1314	Not Covered
StretchAddr->AcquireByte	1250	Not Covered
StretchAddr->AcquireStart	1316	Not Covered
StretchAddr->Idle	1314	Not Covered
StretchAddr->StretchTx	1250	Not Covered
StretchTx->AcquireStart	1316	Not Covered
StretchTx->Idle	1314	Not Covered
StretchTx->StretchTxSetup	1264	Not Covered
StretchTxSetup->AcquireStart	1316	Not Covered
StretchTxSetup->Idle	1314	Not Covered
StretchTxSetup->TransmitSetup	1274	Not Covered
TransmitAck->AcquireStart	1316	Not Covered
TransmitAck->Idle	1314	Not Covered
TransmitAck->TransmitAckPulse	1181	Not Covered
TransmitAckPulse->AcquireStart	1316	Not Covered
TransmitAckPulse->Idle	1314	Not Covered
TransmitAckPulse->TransmitWait	1191	Not Covered
TransmitAckPulse->WaitForStop	1194	Not Covered
TransmitHold->AcquireStart	1316	Not Covered
TransmitHold->Idle	1314	Not Covered
TransmitHold->TransmitAck	1169	Not Covered
TransmitHold->TransmitSetup	1173	Not Covered
TransmitPulse->AcquireStart	1316	Not Covered
TransmitPulse->Idle	1314	Not Covered
TransmitPulse->TransmitHold	1160	Not Covered
TransmitSetup->AcquireStart	1316	Not Covered
TransmitSetup->Idle	1314	Not Covered
TransmitSetup->TransmitPulse	1155	Not Covered
TransmitWait->AcquireStart	1316	Not Covered
TransmitWait->Idle	1314	Not Covered
TransmitWait->StretchTx	1146	Not Covered
TransmitWait->TransmitSetup	1148	Not Covered
WaitForStop->AcquireStart	1316	Not Covered
WaitForStop->Idle	1314	Not Covered

---

Branch Coverage for Module : i2c_fsm

	Line No.	Total	Covered	Percent
Branches		258	0	0.00
IF	156	14	0	0.00
IF	182	2	0	0.00
IF	195	5	0	0.00
IF	211	4	0	0.00
IF	224	4	0	0.00
IF	235	3	0	0.00
IF	242	4	0	0.00
IF	255	2	0	0.00
IF	269	5	0	0.00
IF	281	5	0	0.00
IF	303	5	0	0.00
IF	324	5	0	0.00
IF	335	4	0	0.00
IF	412	4	0	0.00
IF	435	3	0	0.00
CASE	477	73	0	0.00
IF	797	3	0	0.00
CASE	840	105	0	0.00
IF	1305	4	0	0.00
IF	1324	2	0	0.00
IF	1333	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	156	if (load_tcount)
-2-:	157	case (tcount_sel)
-3-:	171	if (((stretch_idle_cnt == '0) || target_enable_i))

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupStart	-	Not Covered
1	tHoldStart	-	Not Covered
1	tSetupData	-	Not Covered
1	tClockStart	-	Not Covered
1	tClockLow	-	Not Covered
1	tClockPulse	-	Not Covered
1	tHoldBit	-	Not Covered
1	tClockStop	-	Not Covered
1	tSetupStop	-	Not Covered
1	tHoldStop	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	182	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	195	if ((!rst_ni))
-2-:	197	if (((stretch_en && scl_d) && (!scl_i)))
-3-:	199	if (((!target_idle_o) && event_host_timeout_o))
-4-:	202	if (((!target_idle_o) && scl_i))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	211	if ((!rst_ni))
-2-:	213	if (bit_clr)
-3-:	215	if (bit_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	224	if ((!rst_ni))
-2-:	226	if (read_byte_clr)
-3-:	228	if (shift_data_en)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	235	if ((!fmt_flag_read_bytes_i))
-2-:	236	if ((fmt_byte_i == '0))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	242	if ((!rst_ni))
-2-:	244	if (byte_clr)
-3-:	246	if (byte_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	255	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	269	if ((!rst_ni))
-2-:	271	if ((trans_started && (!host_enable_i)))
-3-:	273	if (log_start)
-4-:	275	if (log_stop)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	281	if ((!rst_ni))
-2-:	283	if ((pend_restart && (!host_enable_i)))
-3-:	285	if (req_restart)
-4-:	287	if (log_start)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	303	if ((!rst_ni))
-2-:	305	if (start_det)
-3-:	307	if ((scl_i_q && (!scl_i)))
-4-:	310	if ((input_byte_clr || bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	324	if ((!rst_ni))
-2-:	326	if (input_byte_clr)
-3-:	328	if (((!scl_i_q) && scl_i))
-4-:	329	if ((!bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	335	if ((!rst_ni))
-2-:	337	if (((!scl_i_q) && scl_i))
-3-:	338	if (bit_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	412	if ((!rst_ni))
-2-:	414	if (((!en_sda_interf_det) && (|sda_rise_cnt)))
-3-:	419	if ((en_sda_interf_det && (sda_rise_cnt < sda_rise_latency)))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	435	if ((!rst_ni))
-2-:	437	if ((bit_ack && address_match))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	477	case (state_q)
-2-:	483	if ((host_enable_i && trans_started))
-3-:	496	if (log_start)
-4-:	512	if (pend_restart)
-5-:	525	if ((scl_i_q && (!scl_i)))
-6-:	526	if ((sda_i_q != sda_i))
-7-:	545	if (((((!scl_i_q) && scl_i) && sda_i) && (!fmt_flag_nak_ok_i)))
-8-:	547	if ((scl_i_q && (!scl_i)))
-9-:	548	if ((sda_i_q != sda_i))
-10-:	567	if ((scl_i_q && (!scl_i)))
-11-:	568	if ((sda_i_q != sda_i))
-12-:	574	if (((bit_index == '0) && (tcount_q == 20'b1)))
-13-:	586	if (fmt_flag_read_continue_i)
-14-:	587	if ((byte_index == 9'b1))
-15-:	593	if (fmt_flag_read_continue_i)
-16-:	594	if ((byte_index == 9'b1))
-17-:	598	if ((scl_i_q && (!scl_i)))
-18-:	599	if ((sda_i_q != sda_i))
-19-:	604	if (fmt_flag_read_continue_i)
-20-:	605	if ((byte_index == 9'b1))
-21-:	641	if (fmt_flag_stop_after_i)
-22-:	674	if ((tcount_q == 20'b1))
-23-:	709	if ((!scl_i))
-24-:	743	if ((tcount_q == 20'b1))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	Status	Tests
Idle	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
AcquireStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	797	if ((start_det || stop_det))
-2-:	800	(start_det) ? 

Branches:

-1-	-2-	Status	Tests
1	1	Not Covered
1	0	Not Covered
0	-	Not Covered

	LineNo.	Expression
-1-:	840	case (state_q)
-2-:	843	if (((!host_enable_i) && (!target_enable_i)))
-3-:	844	if (host_enable_i)
-4-:	845	if (fmt_fifo_rvalid_i)
-5-:	851	if ((tcount_q == 20'b1))
-6-:	860	if ((tcount_q == 20'b1))
-7-:	868	if ((tcount_q == 20'b1))
-8-:	877	if ((tcount_q == 20'b1))
-9-:	879	if (pend_restart)
-10-:	892	if ((tcount_q == 20'b1))
-11-:	901	if ((tcount_q == 20'b1))
-12-:	905	if ((bit_index == '0))
-13-:	917	if ((tcount_q == 20'b1))
-14-:	925	if ((tcount_q == 20'b1))
-15-:	933	if ((tcount_q == 20'b1))
-16-:	934	if (fmt_flag_stop_after_i)
-17-:	947	if ((tcount_q == 20'b1))
-18-:	955	if ((tcount_q == 20'b1))
-19-:	964	if ((tcount_q == 20'b1))
-20-:	967	if ((bit_index == '0))
-21-:	981	if ((tcount_q == 20'b1))
-22-:	990	if ((tcount_q == 20'b1))
-23-:	999	if ((tcount_q == 20'b1))
-24-:	1001	if ((byte_index == 9'b1))
-25-:	1002	if (fmt_flag_stop_after_i)
-26-:	1022	if ((tcount_q == 20'b1))
-27-:	1030	if ((tcount_q == 20'b1))
-28-:	1040	if ((tcount_q == 20'b1))
-29-:	1042	if ((!host_enable_i))
-30-:	1056	if (fmt_flag_read_bytes_i)
-31-:	1061	if ((fmt_flag_start_before_i && (!trans_started)))
-32-:	1075	if ((!host_enable_i))
-33-:	1079	if ((fmt_fifo_depth_i == 7'b1))
-34-:	1092	if ((scl_i_q && (!scl_i)))
-35-:	1101	if ((bit_ack && address_match))
-36-:	1105	if ((bit_ack && (!address_match)))
-37-:	1112	if (((tcount_q == 20'b1) && (!scl_i)))
-38-:	1118	if (scl_i)
-39-:	1122	if ((!scl_i))
-40-:	1130	if ((tcount_q == 20'b1))
-41-:	1134	if (stretch_addr)
-42-:	1136	if (rw_bit_q)
-43-:	1138	if ((!rw_bit_q))
-44-:	1145	if (stretch_tx)
-45-:	1155	if (scl_i)
-46-:	1159	if ((!scl_i))
-47-:	1167	if ((tcount_q == 20'b1))
-48-:	1168	if (bit_ack)
-49-:	1180	if (scl_i)
-50-:	1188	if ((!scl_i))
-51-:	1190	if (host_ack)
-52-:	1208	if (bit_ack)
-53-:	1217	if (((tcount_q == 20'b1) && (!scl_i)))
-54-:	1223	if (scl_i)
-55-:	1227	if ((!scl_i))
-56-:	1235	if ((tcount_q == 20'b1))
-57-:	1238	(acq_fifo_wready) ? 
-58-:	1244	if ((!stretch_addr))
-59-:	1250	(rw_bit_q) ? 
-60-:	1257	if ((!stretch_tx))
-61-:	1273	if ((tcount_q == 20'b1))
-62-:	1281	if (acq_fifo_wready)

Branches:

Branch	Status	Tests
(1.Idle )->(2)	Not Covered
(1.Idle )->(!2)->(3)->(4)	Not Covered
(1.Idle )->(!2)->(3)->(!4)	Not Covered
(1.Idle )->(!2)->(!3)	Not Covered
(1.SetupStart )->(5)	Not Covered
(1.SetupStart )->(!5)	Not Covered
(1.HoldStart )->(6)	Not Covered
(1.HoldStart )->(!6)	Not Covered
(1.ClockStart )->(7)	Not Covered
(1.ClockStart )->(!7)	Not Covered
(1.ClockLow )->(8)->(9)	Not Covered
(1.ClockLow )->(8)->(!9)	Not Covered
(1.ClockLow )->(!8)	Not Covered
(1.ClockPulse )->(10)	Not Covered
(1.ClockPulse )->(!10)	Not Covered
(1.HoldBit )->(11)->(12)	Not Covered
(1.HoldBit )->(11)->(!12)	Not Covered
(1.HoldBit )->(!11)	Not Covered
(1.ClockLowAck )->(13)	Not Covered
(1.ClockLowAck )->(!13)	Not Covered
(1.ClockPulseAck )->(14)	Not Covered
(1.ClockPulseAck )->(!14)	Not Covered
(1.HoldDevAck )->(15)->(16)	Not Covered
(1.HoldDevAck )->(15)->(!16)	Not Covered
(1.HoldDevAck )->(!15)	Not Covered
(1.ReadClockLow )->(17)	Not Covered
(1.ReadClockLow )->(!17)	Not Covered
(1.ReadClockPulse )->(18)	Not Covered
(1.ReadClockPulse )->(!18)	Not Covered
(1.ReadHoldBit )->(19)->(20)	Not Covered
(1.ReadHoldBit )->(19)->(!20)	Not Covered
(1.ReadHoldBit )->(!19)	Not Covered
(1.HostClockLowAck )->(21)	Not Covered
(1.HostClockLowAck )->(!21)	Not Covered
(1.HostClockPulseAck )->(22)	Not Covered
(1.HostClockPulseAck )->(!22)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(25)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(!25)	Not Covered
(1.HostHoldBitAck )->(23)->(!24)	Not Covered
(1.HostHoldBitAck )->(!23)	Not Covered
(1.ClockStop )->(26)	Not Covered
(1.ClockStop )->(!26)	Not Covered
(1.SetupStop )->(27)	Not Covered
(1.SetupStop )->(!27)	Not Covered
(1.HoldStop )->(28)->(29)	Not Covered
(1.HoldStop )->(28)->(!29)	Not Covered
(1.HoldStop )->(!28)	Not Covered
(1.Active )->(30)	Not Covered
(1.Active )->(!30)->(31)	Not Covered
(1.Active )->(!30)->(!31)	Not Covered
(1.PopFmtFifo )->(32)	Not Covered
(1.PopFmtFifo )->(!32)->(33)	Not Covered
(1.PopFmtFifo )->(!32)->(!33)	Not Covered
(1.AcquireStart )->(34)	Not Covered
(1.AcquireStart )->(!34)	Not Covered
(1.AddrRead )->(35)	Not Covered
(1.AddrRead )->(!35)->(36)	Not Covered
(1.AddrRead )->(!35)->(!36)	Not Covered
(1.AddrAckWait )->(37)	Not Covered
(1.AddrAckWait )->(!37)	Not Covered
(1.AddrAckSetup )->(38)	Not Covered
(1.AddrAckSetup )->(!38)	Not Covered
(1.AddrAckPulse )->(39)	Not Covered
(1.AddrAckPulse )->(!39)	Not Covered
(1.AddrAckHold )->(40)->(41)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(42)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(43)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(!43)	Not Covered
(1.AddrAckHold )->(!40)	Not Covered
(1.TransmitWait )->(44)	Not Covered
(1.TransmitWait )->(!44)	Not Covered
(1.TransmitSetup )->(45)	Not Covered
(1.TransmitSetup )->(!45)	Not Covered
(1.TransmitPulse )->(46)	Not Covered
(1.TransmitPulse )->(!46)	Not Covered
(1.TransmitHold )->(47)->(48)	Not Covered
(1.TransmitHold )->(47)->(!48)	Not Covered
(1.TransmitHold )->(!47)	Not Covered
(1.TransmitAck )->(49)	Not Covered
(1.TransmitAck )->(!49)	Not Covered
(1.TransmitAckPulse )->(50)->(51)	Not Covered
(1.TransmitAckPulse )->(50)->(!51)	Not Covered
(1.TransmitAckPulse )->(!50)	Not Covered
(1.WaitForStop )	Not Covered
(1.AcquireByte )->(52)	Not Covered
(1.AcquireByte )->(!52)	Not Covered
(1.AcquireAckWait )->(53)	Not Covered
(1.AcquireAckWait )->(!53)	Not Covered
(1.AcquireAckSetup )->(54)	Not Covered
(1.AcquireAckSetup )->(!54)	Not Covered
(1.AcquireAckPulse )->(55)	Not Covered
(1.AcquireAckPulse )->(!55)	Not Covered
(1.AcquireAckHold )->(56)->(57)	Not Covered
(1.AcquireAckHold )->(56)->(!57)	Not Covered
(1.AcquireAckHold )->(!56)	Not Covered
(1.StretchAddr )->(58)->(59)	Not Covered
(1.StretchAddr )->(58)->(!59)	Not Covered
(1.StretchAddr )->(!58)	Not Covered
(1.StretchTx )->(60)	Not Covered
(1.StretchTx )->(!60)	Not Covered
(1.StretchTxSetup )->(61)	Not Covered
(1.StretchTxSetup )->(!61)	Not Covered
(1.StretchAcqFull )->(62)	Not Covered
(1.StretchAcqFull )->(!62)	Not Covered
(1.default)	Not Covered

	LineNo.	Expression
-1-:	1305	if (((!target_idle) && (!target_enable_i)))
-2-:	1315	if (start_det)
-3-:	1317	if (stop_det)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	1324	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	1333	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

Line Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Line No.	Total	Covered	Percent
TOTAL		554	0	0.00
ALWAYS	155	17	0	0.00
CONT_ASSIGN	179	1	0	0.00
ALWAYS	182	3	0	0.00
ALWAYS	195	9	0	0.00
ALWAYS	211	7	0	0.00
ALWAYS	224	6	0	0.00
ALWAYS	235	5	0	0.00
ALWAYS	242	7	0	0.00
ALWAYS	255	5	0	0.00
ALWAYS	269	8	0	0.00
ALWAYS	281	8	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	296	1	0	0.00
CONT_ASSIGN	299	1	0	0.00
ALWAYS	303	9	0	0.00
CONT_ASSIGN	318	1	0	0.00
CONT_ASSIGN	319	1	0	0.00
CONT_ASSIGN	320	1	0	0.00
ALWAYS	324	7	0	0.00
ALWAYS	335	5	0	0.00
CONT_ASSIGN	348	1	0	0.00
CONT_ASSIGN	349	1	0	0.00
CONT_ASSIGN	407	1	0	0.00
ALWAYS	412	6	0	0.00
CONT_ASSIGN	430	1	0	0.00
ALWAYS	435	4	0	0.00
CONT_ASSIGN	452	1	0	0.00
CONT_ASSIGN	456	1	0	0.00
ALWAYS	460	180	0	0.00
CONT_ASSIGN	806	1	0	0.00
CONT_ASSIGN	815	1	0	0.00
CONT_ASSIGN	820	1	0	0.00
ALWAYS	824	239	0	0.00
ALWAYS	1324	3	0	0.00
ALWAYS	1333	5	0	0.00
CONT_ASSIGN	1342	1	0	0.00
CONT_ASSIGN	1343	1	0	0.00
CONT_ASSIGN	1346	1	0	0.00
CONT_ASSIGN	1349	1	0	0.00
CONT_ASSIGN	1353	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
155	0	1
156	0	1
157	0	1
158	0	1
159	0	1
160	0	1
161	0	1
162	0	1
163	0	1
164	0	1
165	0	1
166	0	1
167	0	1
168	0	1
171	0	1
172	0	1
174	0	1
179	0	1
182	0	1
183	0	1
185	0	1
195	0	1
196	0	1
197	0	1
198	0	1
199	0	1
201	0	1
202	0	1
203	0	1
205	0	1
211	0	1
212	0	1
213	0	1
214	0	1
215	0	1
216	0	1
218	0	1
224	0	1
225	0	1
226	0	1
227	0	1
228	0	1
229	0	1
			==> MISSING_ELSE
235	0	2
236	0	2
237	0	1
242	0	1
243	0	1
244	0	1
245	0	1
246	0	1
247	0	1
249	0	1
255	0	1
256	0	1
257	0	1
259	0	1
260	0	1
269	0	1
270	0	1
271	0	1
272	0	1
273	0	1
274	0	1
275	0	1
276	0	1
			==> MISSING_ELSE
281	0	1
282	0	1
283	0	1
284	0	1
285	0	1
286	0	1
287	0	1
288	0	1
			==> MISSING_ELSE
293	0	1
296	0	1
299	0	1
303	0	1
304	0	1
305	0	1
306	0	1
307	0	1
310	0	2
311	0	1
313	0	1
318	0	1
319	0	1
320	0	1
324	0	1
325	0	1
326	0	1
327	0	1
328	0	1
329	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
335	0	1
336	0	1
337	0	1
338	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
348	0	1
349	0	1
407	0	1
412	0	1
413	0	1
414	0	1
418	0	1
419	0	1
420	0	1
			==> MISSING_ELSE
430	0	1
435	0	1
436	0	1
437	0	1
438	0	1
			==> MISSING_ELSE
452	0	1
456	0	1
460	0	1
461	0	1
462	0	1
463	0	1
464	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
472	0	1
473	0	1
474	0	1
475	0	1
476	0	1
477	0	1
482	0	1
483	0	1
484	0	1
485	0	1
487	0	1
488	0	1
493	0	1
494	0	1
495	0	1
496	0	2
			==> MISSING_ELSE
500	0	1
501	0	1
502	0	1
506	0	1
507	0	1
508	0	1
511	0	1
512	0	1
513	0	1
515	0	1
517	0	1
521	0	1
522	0	1
523	0	1
524	0	1
525	0	2
			==> MISSING_ELSE
526	0	2
			==> MISSING_ELSE
530	0	1
531	0	1
532	0	1
536	0	1
537	0	1
538	0	1
542	0	1
543	0	1
544	0	1
545	0	2
			==> MISSING_ELSE
546	0	1
547	0	2
			==> MISSING_ELSE
548	0	2
			==> MISSING_ELSE
552	0	1
553	0	1
554	0	1
558	0	1
559	0	1
560	0	1
564	0	1
565	0	1
566	0	1
567	0	2
			==> MISSING_ELSE
568	0	2
			==> MISSING_ELSE
572	0	1
573	0	1
574	0	1
575	0	1
576	0	1
			==> MISSING_ELSE
581	0	1
582	0	1
586	0	2
587	0	2
588	0	1
592	0	1
593	0	2
594	0	2
595	0	1
596	0	1
597	0	1
598	0	2
			==> MISSING_ELSE
599	0	2
			==> MISSING_ELSE
603	0	1
604	0	2
605	0	2
606	0	1
607	0	1
611	0	1
612	0	1
613	0	1
617	0	1
618	0	1
619	0	1
623	0	1
624	0	1
625	0	1
626	0	1
630	0	1
636	0	1
640	0	1
641	0	2
642	0	1
643	0	1
647	0	1
651	0	1
652	0	1
656	0	1
660	0	1
661	0	1
665	0	1
666	0	1
670	0	1
671	0	1
674	0	1
676	0	1
677	0	1
			==> MISSING_ELSE
682	0	1
686	0	1
687	0	1
691	0	1
694	0	1
698	0	1
701	0	1
705	0	1
708	0	1
709	0	1
711	0	1
			==> MISSING_ELSE
716	0	1
717	0	1
718	0	1
722	0	1
726	0	1
730	0	1
731	0	1
735	0	1
736	0	1
740	0	1
741	0	1
743	0	1
744	0	1
745	0	1
			==> MISSING_ELSE
751	0	1
752	0	1
754	0	1
755	0	1
759	0	1
760	0	1
764	0	1
765	0	1
766	0	1
770	0	1
771	0	1
774	0	1
775	0	1
797	0	1
799	0	1
800	0	1
802	0	1
			==> MISSING_ELSE
806	0	1
815	0	1
820	0	1
824	0	1
825	0	1
826	0	1
827	0	1
828	0	1
829	0	1
830	0	1
831	0	1
832	0	1
833	0	1
834	0	1
835	0	1
836	0	1
837	0	1
838	0	1
840	0	1
843	0	2
844	0	1
845	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
851	0	1
852	0	1
853	0	1
854	0	1
855	0	1
			==> MISSING_ELSE
860	0	1
861	0	1
862	0	1
863	0	1
			==> MISSING_ELSE
868	0	1
869	0	1
870	0	1
871	0	1
			==> MISSING_ELSE
876	0	1
877	0	1
878	0	1
879	0	1
880	0	1
881	0	1
883	0	1
884	0	1
			==> MISSING_ELSE
891	0	1
892	0	1
893	0	1
894	0	1
895	0	1
			==> MISSING_ELSE
900	0	1
901	0	1
902	0	1
903	0	1
904	0	1
905	0	1
906	0	1
907	0	1
909	0	1
910	0	1
			==> MISSING_ELSE
917	0	1
918	0	1
919	0	1
920	0	1
			==> MISSING_ELSE
925	0	1
926	0	1
927	0	1
928	0	1
			==> MISSING_ELSE
933	0	1
934	0	1
935	0	1
936	0	1
937	0	1
939	0	1
940	0	1
941	0	1
			==> MISSING_ELSE
947	0	1
948	0	1
949	0	1
950	0	1
			==> MISSING_ELSE
955	0	1
956	0	1
957	0	1
958	0	1
959	0	1
			==> MISSING_ELSE
964	0	1
965	0	1
966	0	1
967	0	1
968	0	1
969	0	1
970	0	1
972	0	1
973	0	1
			==> MISSING_ELSE
980	0	1
981	0	1
982	0	1
983	0	1
984	0	1
			==> MISSING_ELSE
989	0	1
990	0	1
991	0	1
992	0	1
993	0	1
			==> MISSING_ELSE
998	0	1
999	0	1
1000	0	1
1001	0	1
1002	0	1
1003	0	1
1004	0	1
1005	0	1
1007	0	1
1008	0	1
1009	0	1
1012	0	1
1013	0	1
1014	0	1
1015	0	1
			==> MISSING_ELSE
1022	0	1
1023	0	1
1024	0	1
1025	0	1
			==> MISSING_ELSE
1030	0	1
1031	0	1
1032	0	1
1033	0	1
1034	0	1
			==> MISSING_ELSE
1039	0	1
1040	0	1
1041	0	1
1042	0	1
1043	0	1
1044	0	1
1045	0	1
1047	0	1
1048	0	1
1049	0	1
			==> MISSING_ELSE
1056	0	1
1057	0	1
1058	0	1
1059	0	1
1060	0	1
1061	0	1
1062	0	1
1063	0	1
1064	0	1
1066	0	1
1067	0	1
1068	0	1
1069	0	1
1075	0	1
1076	0	1
1077	0	1
1078	0	1
1079	0	1
1080	0	1
1081	0	1
1082	0	1
1084	0	1
1085	0	1
1086	0	1
1092	0	1
1094	0	1
1095	0	1
			==> MISSING_ELSE
1101	0	1
1102	0	1
1103	0	1
1104	0	1
1105	0	1
1106	0	1
			==> MISSING_ELSE
1112	0	1
1113	0	1
			==> MISSING_ELSE
1118	0	2
			==> MISSING_ELSE
1122	0	1
1123	0	1
1124	0	1
1125	0	1
			==> MISSING_ELSE
1130	0	1
1134	0	1
1135	0	1
1136	0	1
1137	0	1
1138	0	1
1139	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
1145	0	1
1146	0	1
1148	0	1
1149	0	1
1150	0	1
1155	0	2
			==> MISSING_ELSE
1159	0	1
1160	0	1
1161	0	1
1162	0	1
			==> MISSING_ELSE
1167	0	1
1168	0	1
1169	0	1
1171	0	1
1172	0	1
1173	0	1
			==> MISSING_ELSE
1180	0	1
1181	0	1
			==> MISSING_ELSE
1188	0	1
1190	0	1
1191	0	1
1194	0	1
			==> MISSING_ELSE
1203	0	1
1208	0	1
1209	0	1
1210	0	1
1211	0	1
			==> MISSING_ELSE
1217	0	1
1218	0	1
			==> MISSING_ELSE
1223	0	2
			==> MISSING_ELSE
1227	0	1
1228	0	1
1229	0	1
1230	0	1
			==> MISSING_ELSE
1235	0	1
1238	0	1
			==> MISSING_ELSE
1244	0	1
1250	0	1
			==> MISSING_ELSE
1256	0	1
1257	0	1
1264	0	1
1265	0	1
1266	0	1
1269	0	1
			==> MISSING_ELSE
1273	0	1
1274	0	1
			==> MISSING_ELSE
1281	0	2
			==> MISSING_ELSE
1305	0	1
1314	0	1
1315	0	1
1316	0	1
1317	0	1
1318	0	1
			==> MISSING_ELSE
1324	0	1
1325	0	1
1327	0	1
1333	0	1
1334	0	1
1335	0	1
1337	0	1
1338	0	1
1342	0	1
1343	0	1
1346	0	1
1349	0	1
1353	0	1

---

Cond Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Total	Covered	Percent
Conditions	242	0	0.00
Logical	242	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       171
 EXPRESSION ((stretch_idle_cnt == '0) || target_enable_i)
             ------------1-----------    -------2-------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       171
 SUB-EXPRESSION (stretch_idle_cnt == '0)
                ------------1-----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       197
 EXPRESSION (stretch_en && scl_d && ((!scl_i)))
             -----1----    --2--    -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       199
 EXPRESSION (((!target_idle_o)) && event_host_timeout_o)
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       202
 EXPRESSION (((!target_idle_o)) && scl_i)
             ---------1--------    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       236
 EXPRESSION (fmt_byte_i == '0)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       271
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       283
 EXPRESSION (pend_restart && ((!host_enable_i)))
             ------1-----    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i)))))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION ((scl_i_q && scl_i) & (sda_i_q && ((!sda_i))))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       293
 SUB-EXPRESSION (sda_i_q && ((!sda_i)))
                 ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 EXPRESSION (target_enable_i && ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i)))
             -------1-------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION ((scl_i_q && scl_i) & (((!sda_i_q)) && sda_i))
                 ---------1--------   -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION (scl_i_q && scl_i)
                 ---1---    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       296
 SUB-EXPRESSION (((!sda_i_q)) && sda_i)
                 ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       299
 EXPRESSION (bit_idx == 4'd8)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       307
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       310
 EXPRESSION (input_byte_clr || bit_ack)
             -------1------    ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       318
 EXPRESSION ((input_byte[7:1] & target_mask0_i) == target_address0_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       319
 EXPRESSION ((input_byte[7:1] & target_mask1_i) == target_address1_i)
            ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       320
 EXPRESSION (address0_match || address1_match)
             -------1------    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       328
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       337
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       414
 EXPRESSION (((!en_sda_interf_det)) && ((|sda_rise_cnt)))
             -----------1----------    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       419
 EXPRESSION (en_sda_interf_det && (sda_rise_cnt < sda_rise_latency))
             --------1--------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       430
 EXPRESSION ((host_idle_o & host_enable_i & ((!sda_i))) | ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i))))
             ---------------------1--------------------   ----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       430
 SUB-EXPRESSION (host_idle_o & host_enable_i & ((!sda_i)))
                 -----1-----   ------2------   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       430
 SUB-EXPRESSION ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i)))
                 -----------------1----------------   --2--   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       430
 SUB-EXPRESSION (sda_rise_cnt == sda_rise_latency)
                -----------------1----------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       437
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       456
 EXPRESSION (((!target_idle)) & rw_bit_q & stop_det & ((!expect_stop)))
             --------1-------   ----2---   ----3---   --------4-------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       483
 EXPRESSION (host_enable_i && trans_started)
             ------1------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       525
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       526
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       545
 EXPRESSION (((!scl_i_q)) && scl_i && sda_i && ((!fmt_flag_nak_ok_i)))
             ------1-----    --2--    --3--    -----------4----------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       547
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       548
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       567
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       568
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       574
 EXPRESSION ((bit_index == '0) && (tcount_q == 20'b1))
             --------1--------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       574
 SUB-EXPRESSION (bit_index == '0)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       574
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       587
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       594
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       598
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       599
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       605
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       636
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       674
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       743
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       797
 EXPRESSION (start_det || stop_det)
             ----1----    ----2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       800
 EXPRESSION (start_det ? ({AcqRestart, input_byte}) : ({AcqStop, input_byte}))
             ----1----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       815
 EXPRESSION (((~tx_fifo_rvalid_i)) | (acq_fifo_depth_i > 9'(1'b1)))
             ----------1----------   --------------2--------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       843
 EXPRESSION (((!host_enable_i)) && ((!target_enable_i)))
             ---------1--------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       851
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       860
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       868
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       877
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       892
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       901
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       905
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       917
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       925
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       933
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       947
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       955
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       964
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       967
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       981
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       990
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       999
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1001
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1022
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1030
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1040
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1061
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1079
 EXPRESSION (fmt_fifo_depth_i == 7'b1)
            -------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1092
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1101
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1105
 EXPRESSION (bit_ack && ((!address_match)))
             ---1---    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1112
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1112
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1130
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1167
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1217
 EXPRESSION ((tcount_q == 20'b1) && ((!scl_i)))
             ---------1---------    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1217
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1235
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1238
 EXPRESSION (acq_fifo_wready ? AcquireByte : StretchAcqFull)
             -------1-------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1250
 EXPRESSION (rw_bit_q ? StretchTx : AcquireByte)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1273
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       1305
 EXPRESSION (((!target_idle)) && ((!target_enable_i)))
             --------1-------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1346
 EXPRESSION (((!target_idle_o)) & (stretch_idle_cnt > host_timeout_i))
             ---------1--------   -----------------2-----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       1349
 EXPRESSION (stretch_en && (stretch_idle_cnt[30:0] > stretch_timeout_i) && timeout_enable_i)
             -----1----    ----------------------2---------------------    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

---

FSM Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	43	0	0.00	(Not included in score)
Transitions	115	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
AcquireAckHold	1228	Not Covered
AcquireAckPulse	1223	Not Covered
AcquireAckSetup	1218	Not Covered
AcquireAckWait	1209	Not Covered
AcquireByte	1139	Not Covered
AcquireStart	1316	Not Covered
Active	845	Not Covered
AddrAckHold	1123	Not Covered
AddrAckPulse	1118	Not Covered
AddrAckSetup	1113	Not Covered
AddrAckWait	1102	Not Covered
AddrRead	1094	Not Covered
ClockLow	869	Not Covered
ClockLowAck	906	Not Covered
ClockPulse	883	Not Covered
ClockPulseAck	918	Not Covered
ClockStart	861	Not Covered
ClockStop	935	Not Covered
HoldBit	893	Not Covered
HoldDevAck	926	Not Covered
HoldStart	852	Not Covered
HoldStop	1031	Not Covered
HostClockLowAck	968	Not Covered
HostClockPulseAck	982	Not Covered
HostHoldBitAck	991	Not Covered
Idle	843	Not Covered
PopFmtFifo	939	Not Covered
ReadClockLow	972	Not Covered
ReadClockPulse	948	Not Covered
ReadHoldBit	956	Not Covered
SetupStart	880	Not Covered
SetupStop	1023	Not Covered
StretchAcqFull	1238	Not Covered
StretchAddr	1135	Not Covered
StretchTx	1146	Not Covered
StretchTxSetup	1264	Not Covered
TransmitAck	1169	Not Covered
TransmitAckPulse	1181	Not Covered
TransmitHold	1160	Not Covered
TransmitPulse	1155	Not Covered
TransmitSetup	1148	Not Covered
TransmitWait	1137	Not Covered
WaitForStop	1194	Not Covered

transitions	Line No.	Covered	Tests
AcquireAckHold->AcquireByte	1238	Not Covered
AcquireAckHold->AcquireStart	1316	Not Covered
AcquireAckHold->Idle	1314	Not Covered
AcquireAckHold->StretchAcqFull	1238	Not Covered
AcquireAckPulse->AcquireAckHold	1228	Not Covered
AcquireAckPulse->AcquireStart	1316	Not Covered
AcquireAckPulse->Idle	1314	Not Covered
AcquireAckSetup->AcquireAckPulse	1223	Not Covered
AcquireAckSetup->AcquireStart	1316	Not Covered
AcquireAckSetup->Idle	1314	Not Covered
AcquireAckWait->AcquireAckSetup	1218	Not Covered
AcquireAckWait->AcquireStart	1316	Not Covered
AcquireAckWait->Idle	1314	Not Covered
AcquireByte->AcquireAckWait	1209	Not Covered
AcquireByte->AcquireStart	1316	Not Covered
AcquireByte->Idle	1314	Not Covered
AcquireStart->AddrRead	1094	Not Covered
AcquireStart->Idle	1314	Not Covered
Active->AcquireStart	1316	Excluded
Active->ClockLow	1066	Not Covered
Active->Idle	1314	Excluded
Active->ReadClockLow	1058	Not Covered
Active->SetupStart	1062	Not Covered
AddrAckHold->AcquireByte	1139	Not Covered
AddrAckHold->AcquireStart	1316	Not Covered
AddrAckHold->Idle	1314	Not Covered
AddrAckHold->StretchAddr	1135	Not Covered
AddrAckHold->TransmitWait	1137	Not Covered
AddrAckPulse->AcquireStart	1316	Not Covered
AddrAckPulse->AddrAckHold	1123	Not Covered
AddrAckPulse->Idle	1314	Not Covered
AddrAckSetup->AcquireStart	1316	Not Covered
AddrAckSetup->AddrAckPulse	1118	Not Covered
AddrAckSetup->Idle	1314	Not Covered
AddrAckWait->AcquireStart	1316	Not Covered
AddrAckWait->AddrAckSetup	1113	Not Covered
AddrAckWait->Idle	1314	Not Covered
AddrRead->AcquireStart	1316	Not Covered
AddrRead->AddrAckWait	1102	Not Covered
AddrRead->Idle	1106	Not Covered
ClockLow->AcquireStart	1316	Excluded
ClockLow->ClockPulse	883	Not Covered
ClockLow->Idle	1314	Not Covered
ClockLow->SetupStart	880	Not Covered
ClockLowAck->AcquireStart	1316	Excluded
ClockLowAck->ClockPulseAck	918	Not Covered
ClockLowAck->Idle	1314	Not Covered
ClockPulse->AcquireStart	1316	Excluded
ClockPulse->HoldBit	893	Not Covered
ClockPulse->Idle	1314	Not Covered
ClockPulseAck->AcquireStart	1316	Excluded
ClockPulseAck->HoldDevAck	926	Not Covered
ClockPulseAck->Idle	1314	Not Covered
ClockStart->AcquireStart	1316	Excluded
ClockStart->ClockLow	869	Not Covered
ClockStart->Idle	1314	Excluded
ClockStop->AcquireStart	1316	Excluded
ClockStop->Idle	1314	Excluded
ClockStop->SetupStop	1023	Not Covered
HoldBit->AcquireStart	1316	Excluded
HoldBit->ClockLow	909	Not Covered
HoldBit->ClockLowAck	906	Not Covered
HoldBit->Idle	1314	Not Covered
HoldDevAck->AcquireStart	1316	Excluded
HoldDevAck->ClockStop	935	Not Covered
HoldDevAck->Idle	1314	Not Covered
HoldDevAck->PopFmtFifo	939	Not Covered
HoldStart->AcquireStart	1316	Excluded
HoldStart->ClockStart	861	Not Covered
HoldStart->Idle	1314	Excluded
HoldStop->AcquireStart	1316	Excluded
HoldStop->Idle	1043	Not Covered
HoldStop->PopFmtFifo	1047	Not Covered
HostClockLowAck->AcquireStart	1316	Excluded
HostClockLowAck->HostClockPulseAck	982	Not Covered
HostClockLowAck->Idle	1314	Excluded
HostClockPulseAck->AcquireStart	1316	Excluded
HostClockPulseAck->HostHoldBitAck	991	Not Covered
HostClockPulseAck->Idle	1314	Not Covered
HostHoldBitAck->AcquireStart	1316	Excluded
HostHoldBitAck->ClockStop	1003	Not Covered
HostHoldBitAck->Idle	1314	Not Covered
HostHoldBitAck->PopFmtFifo	1007	Not Covered
HostHoldBitAck->ReadClockLow	1012	Not Covered
Idle->AcquireStart	1316	Not Covered
Idle->Active	845	Not Covered
PopFmtFifo->AcquireStart	1316	Excluded
PopFmtFifo->Active	1084	Not Covered
PopFmtFifo->ClockStop	1076	Not Covered
PopFmtFifo->Idle	1080	Not Covered
ReadClockLow->AcquireStart	1316	Excluded
ReadClockLow->Idle	1314	Not Covered
ReadClockLow->ReadClockPulse	948	Not Covered
ReadClockPulse->AcquireStart	1316	Excluded
ReadClockPulse->Idle	1314	Not Covered
ReadClockPulse->ReadHoldBit	956	Not Covered
ReadHoldBit->AcquireStart	1316	Excluded
ReadHoldBit->HostClockLowAck	968	Not Covered
ReadHoldBit->Idle	1314	Not Covered
ReadHoldBit->ReadClockLow	972	Not Covered
SetupStart->AcquireStart	1316	Excluded
SetupStart->HoldStart	852	Not Covered
SetupStart->Idle	1314	Excluded
SetupStop->AcquireStart	1316	Excluded
SetupStop->HoldStop	1031	Not Covered
SetupStop->Idle	1314	Excluded
StretchAcqFull->AcquireByte	1281	Not Covered
StretchAcqFull->AcquireStart	1316	Not Covered
StretchAcqFull->Idle	1314	Not Covered
StretchAddr->AcquireByte	1250	Not Covered
StretchAddr->AcquireStart	1316	Not Covered
StretchAddr->Idle	1314	Not Covered
StretchAddr->StretchTx	1250	Not Covered
StretchTx->AcquireStart	1316	Not Covered
StretchTx->Idle	1314	Not Covered
StretchTx->StretchTxSetup	1264	Not Covered
StretchTxSetup->AcquireStart	1316	Not Covered
StretchTxSetup->Idle	1314	Not Covered
StretchTxSetup->TransmitSetup	1274	Not Covered
TransmitAck->AcquireStart	1316	Not Covered
TransmitAck->Idle	1314	Not Covered
TransmitAck->TransmitAckPulse	1181	Not Covered
TransmitAckPulse->AcquireStart	1316	Not Covered
TransmitAckPulse->Idle	1314	Not Covered
TransmitAckPulse->TransmitWait	1191	Not Covered
TransmitAckPulse->WaitForStop	1194	Not Covered
TransmitHold->AcquireStart	1316	Not Covered
TransmitHold->Idle	1314	Not Covered
TransmitHold->TransmitAck	1169	Not Covered
TransmitHold->TransmitSetup	1173	Not Covered
TransmitPulse->AcquireStart	1316	Not Covered
TransmitPulse->Idle	1314	Not Covered
TransmitPulse->TransmitHold	1160	Not Covered
TransmitSetup->AcquireStart	1316	Not Covered
TransmitSetup->Idle	1314	Not Covered
TransmitSetup->TransmitPulse	1155	Not Covered
TransmitWait->AcquireStart	1316	Not Covered
TransmitWait->Idle	1314	Not Covered
TransmitWait->StretchTx	1146	Not Covered
TransmitWait->TransmitSetup	1148	Not Covered
WaitForStop->AcquireStart	1316	Not Covered
WaitForStop->Idle	1314	Not Covered

---

Branch Coverage for Instance : tb.dut.i2c_core.u_i2c_fsm

	Line No.	Total	Covered	Percent
Branches		258	0	0.00
IF	156	14	0	0.00
IF	182	2	0	0.00
IF	195	5	0	0.00
IF	211	4	0	0.00
IF	224	4	0	0.00
IF	235	3	0	0.00
IF	242	4	0	0.00
IF	255	2	0	0.00
IF	269	5	0	0.00
IF	281	5	0	0.00
IF	303	5	0	0.00
IF	324	5	0	0.00
IF	335	4	0	0.00
IF	412	4	0	0.00
IF	435	3	0	0.00
CASE	477	73	0	0.00
IF	797	3	0	0.00
CASE	840	105	0	0.00
IF	1305	4	0	0.00
IF	1324	2	0	0.00
IF	1333	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	156	if (load_tcount)
-2-:	157	case (tcount_sel)
-3-:	171	if (((stretch_idle_cnt == '0) || target_enable_i))

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupStart	-	Not Covered
1	tHoldStart	-	Not Covered
1	tSetupData	-	Not Covered
1	tClockStart	-	Not Covered
1	tClockLow	-	Not Covered
1	tClockPulse	-	Not Covered
1	tHoldBit	-	Not Covered
1	tClockStop	-	Not Covered
1	tSetupStop	-	Not Covered
1	tHoldStop	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	182	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	195	if ((!rst_ni))
-2-:	197	if (((stretch_en && scl_d) && (!scl_i)))
-3-:	199	if (((!target_idle_o) && event_host_timeout_o))
-4-:	202	if (((!target_idle_o) && scl_i))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	211	if ((!rst_ni))
-2-:	213	if (bit_clr)
-3-:	215	if (bit_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	224	if ((!rst_ni))
-2-:	226	if (read_byte_clr)
-3-:	228	if (shift_data_en)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	235	if ((!fmt_flag_read_bytes_i))
-2-:	236	if ((fmt_byte_i == '0))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	242	if ((!rst_ni))
-2-:	244	if (byte_clr)
-3-:	246	if (byte_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	255	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	269	if ((!rst_ni))
-2-:	271	if ((trans_started && (!host_enable_i)))
-3-:	273	if (log_start)
-4-:	275	if (log_stop)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	281	if ((!rst_ni))
-2-:	283	if ((pend_restart && (!host_enable_i)))
-3-:	285	if (req_restart)
-4-:	287	if (log_start)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	303	if ((!rst_ni))
-2-:	305	if (start_det)
-3-:	307	if ((scl_i_q && (!scl_i)))
-4-:	310	if ((input_byte_clr || bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	324	if ((!rst_ni))
-2-:	326	if (input_byte_clr)
-3-:	328	if (((!scl_i_q) && scl_i))
-4-:	329	if ((!bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	335	if ((!rst_ni))
-2-:	337	if (((!scl_i_q) && scl_i))
-3-:	338	if (bit_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	412	if ((!rst_ni))
-2-:	414	if (((!en_sda_interf_det) && (|sda_rise_cnt)))
-3-:	419	if ((en_sda_interf_det && (sda_rise_cnt < sda_rise_latency)))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	435	if ((!rst_ni))
-2-:	437	if ((bit_ack && address_match))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	477	case (state_q)
-2-:	483	if ((host_enable_i && trans_started))
-3-:	496	if (log_start)
-4-:	512	if (pend_restart)
-5-:	525	if ((scl_i_q && (!scl_i)))
-6-:	526	if ((sda_i_q != sda_i))
-7-:	545	if (((((!scl_i_q) && scl_i) && sda_i) && (!fmt_flag_nak_ok_i)))
-8-:	547	if ((scl_i_q && (!scl_i)))
-9-:	548	if ((sda_i_q != sda_i))
-10-:	567	if ((scl_i_q && (!scl_i)))
-11-:	568	if ((sda_i_q != sda_i))
-12-:	574	if (((bit_index == '0) && (tcount_q == 20'b1)))
-13-:	586	if (fmt_flag_read_continue_i)
-14-:	587	if ((byte_index == 9'b1))
-15-:	593	if (fmt_flag_read_continue_i)
-16-:	594	if ((byte_index == 9'b1))
-17-:	598	if ((scl_i_q && (!scl_i)))
-18-:	599	if ((sda_i_q != sda_i))
-19-:	604	if (fmt_flag_read_continue_i)
-20-:	605	if ((byte_index == 9'b1))
-21-:	641	if (fmt_flag_stop_after_i)
-22-:	674	if ((tcount_q == 20'b1))
-23-:	709	if ((!scl_i))
-24-:	743	if ((tcount_q == 20'b1))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	Status	Tests
Idle	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
AcquireStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	797	if ((start_det || stop_det))
-2-:	800	(start_det) ? 

Branches:

-1-	-2-	Status	Tests
1	1	Not Covered
1	0	Not Covered
0	-	Not Covered

	LineNo.	Expression
-1-:	840	case (state_q)
-2-:	843	if (((!host_enable_i) && (!target_enable_i)))
-3-:	844	if (host_enable_i)
-4-:	845	if (fmt_fifo_rvalid_i)
-5-:	851	if ((tcount_q == 20'b1))
-6-:	860	if ((tcount_q == 20'b1))
-7-:	868	if ((tcount_q == 20'b1))
-8-:	877	if ((tcount_q == 20'b1))
-9-:	879	if (pend_restart)
-10-:	892	if ((tcount_q == 20'b1))
-11-:	901	if ((tcount_q == 20'b1))
-12-:	905	if ((bit_index == '0))
-13-:	917	if ((tcount_q == 20'b1))
-14-:	925	if ((tcount_q == 20'b1))
-15-:	933	if ((tcount_q == 20'b1))
-16-:	934	if (fmt_flag_stop_after_i)
-17-:	947	if ((tcount_q == 20'b1))
-18-:	955	if ((tcount_q == 20'b1))
-19-:	964	if ((tcount_q == 20'b1))
-20-:	967	if ((bit_index == '0))
-21-:	981	if ((tcount_q == 20'b1))
-22-:	990	if ((tcount_q == 20'b1))
-23-:	999	if ((tcount_q == 20'b1))
-24-:	1001	if ((byte_index == 9'b1))
-25-:	1002	if (fmt_flag_stop_after_i)
-26-:	1022	if ((tcount_q == 20'b1))
-27-:	1030	if ((tcount_q == 20'b1))
-28-:	1040	if ((tcount_q == 20'b1))
-29-:	1042	if ((!host_enable_i))
-30-:	1056	if (fmt_flag_read_bytes_i)
-31-:	1061	if ((fmt_flag_start_before_i && (!trans_started)))
-32-:	1075	if ((!host_enable_i))
-33-:	1079	if ((fmt_fifo_depth_i == 7'b1))
-34-:	1092	if ((scl_i_q && (!scl_i)))
-35-:	1101	if ((bit_ack && address_match))
-36-:	1105	if ((bit_ack && (!address_match)))
-37-:	1112	if (((tcount_q == 20'b1) && (!scl_i)))
-38-:	1118	if (scl_i)
-39-:	1122	if ((!scl_i))
-40-:	1130	if ((tcount_q == 20'b1))
-41-:	1134	if (stretch_addr)
-42-:	1136	if (rw_bit_q)
-43-:	1138	if ((!rw_bit_q))
-44-:	1145	if (stretch_tx)
-45-:	1155	if (scl_i)
-46-:	1159	if ((!scl_i))
-47-:	1167	if ((tcount_q == 20'b1))
-48-:	1168	if (bit_ack)
-49-:	1180	if (scl_i)
-50-:	1188	if ((!scl_i))
-51-:	1190	if (host_ack)
-52-:	1208	if (bit_ack)
-53-:	1217	if (((tcount_q == 20'b1) && (!scl_i)))
-54-:	1223	if (scl_i)
-55-:	1227	if ((!scl_i))
-56-:	1235	if ((tcount_q == 20'b1))
-57-:	1238	(acq_fifo_wready) ? 
-58-:	1244	if ((!stretch_addr))
-59-:	1250	(rw_bit_q) ? 
-60-:	1257	if ((!stretch_tx))
-61-:	1273	if ((tcount_q == 20'b1))
-62-:	1281	if (acq_fifo_wready)

Branches:

Branch	Status	Tests
(1.Idle )->(2)	Not Covered
(1.Idle )->(!2)->(3)->(4)	Not Covered
(1.Idle )->(!2)->(3)->(!4)	Not Covered
(1.Idle )->(!2)->(!3)	Not Covered
(1.SetupStart )->(5)	Not Covered
(1.SetupStart )->(!5)	Not Covered
(1.HoldStart )->(6)	Not Covered
(1.HoldStart )->(!6)	Not Covered
(1.ClockStart )->(7)	Not Covered
(1.ClockStart )->(!7)	Not Covered
(1.ClockLow )->(8)->(9)	Not Covered
(1.ClockLow )->(8)->(!9)	Not Covered
(1.ClockLow )->(!8)	Not Covered
(1.ClockPulse )->(10)	Not Covered
(1.ClockPulse )->(!10)	Not Covered
(1.HoldBit )->(11)->(12)	Not Covered
(1.HoldBit )->(11)->(!12)	Not Covered
(1.HoldBit )->(!11)	Not Covered
(1.ClockLowAck )->(13)	Not Covered
(1.ClockLowAck )->(!13)	Not Covered
(1.ClockPulseAck )->(14)	Not Covered
(1.ClockPulseAck )->(!14)	Not Covered
(1.HoldDevAck )->(15)->(16)	Not Covered
(1.HoldDevAck )->(15)->(!16)	Not Covered
(1.HoldDevAck )->(!15)	Not Covered
(1.ReadClockLow )->(17)	Not Covered
(1.ReadClockLow )->(!17)	Not Covered
(1.ReadClockPulse )->(18)	Not Covered
(1.ReadClockPulse )->(!18)	Not Covered
(1.ReadHoldBit )->(19)->(20)	Not Covered
(1.ReadHoldBit )->(19)->(!20)	Not Covered
(1.ReadHoldBit )->(!19)	Not Covered
(1.HostClockLowAck )->(21)	Not Covered
(1.HostClockLowAck )->(!21)	Not Covered
(1.HostClockPulseAck )->(22)	Not Covered
(1.HostClockPulseAck )->(!22)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(25)	Not Covered
(1.HostHoldBitAck )->(23)->(24)->(!25)	Not Covered
(1.HostHoldBitAck )->(23)->(!24)	Not Covered
(1.HostHoldBitAck )->(!23)	Not Covered
(1.ClockStop )->(26)	Not Covered
(1.ClockStop )->(!26)	Not Covered
(1.SetupStop )->(27)	Not Covered
(1.SetupStop )->(!27)	Not Covered
(1.HoldStop )->(28)->(29)	Not Covered
(1.HoldStop )->(28)->(!29)	Not Covered
(1.HoldStop )->(!28)	Not Covered
(1.Active )->(30)	Not Covered
(1.Active )->(!30)->(31)	Not Covered
(1.Active )->(!30)->(!31)	Not Covered
(1.PopFmtFifo )->(32)	Not Covered
(1.PopFmtFifo )->(!32)->(33)	Not Covered
(1.PopFmtFifo )->(!32)->(!33)	Not Covered
(1.AcquireStart )->(34)	Not Covered
(1.AcquireStart )->(!34)	Not Covered
(1.AddrRead )->(35)	Not Covered
(1.AddrRead )->(!35)->(36)	Not Covered
(1.AddrRead )->(!35)->(!36)	Not Covered
(1.AddrAckWait )->(37)	Not Covered
(1.AddrAckWait )->(!37)	Not Covered
(1.AddrAckSetup )->(38)	Not Covered
(1.AddrAckSetup )->(!38)	Not Covered
(1.AddrAckPulse )->(39)	Not Covered
(1.AddrAckPulse )->(!39)	Not Covered
(1.AddrAckHold )->(40)->(41)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(42)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(43)	Not Covered
(1.AddrAckHold )->(40)->(!41)->(!42)->(!43)	Not Covered
(1.AddrAckHold )->(!40)	Not Covered
(1.TransmitWait )->(44)	Not Covered
(1.TransmitWait )->(!44)	Not Covered
(1.TransmitSetup )->(45)	Not Covered
(1.TransmitSetup )->(!45)	Not Covered
(1.TransmitPulse )->(46)	Not Covered
(1.TransmitPulse )->(!46)	Not Covered
(1.TransmitHold )->(47)->(48)	Not Covered
(1.TransmitHold )->(47)->(!48)	Not Covered
(1.TransmitHold )->(!47)	Not Covered
(1.TransmitAck )->(49)	Not Covered
(1.TransmitAck )->(!49)	Not Covered
(1.TransmitAckPulse )->(50)->(51)	Not Covered
(1.TransmitAckPulse )->(50)->(!51)	Not Covered
(1.TransmitAckPulse )->(!50)	Not Covered
(1.WaitForStop )	Not Covered
(1.AcquireByte )->(52)	Not Covered
(1.AcquireByte )->(!52)	Not Covered
(1.AcquireAckWait )->(53)	Not Covered
(1.AcquireAckWait )->(!53)	Not Covered
(1.AcquireAckSetup )->(54)	Not Covered
(1.AcquireAckSetup )->(!54)	Not Covered
(1.AcquireAckPulse )->(55)	Not Covered
(1.AcquireAckPulse )->(!55)	Not Covered
(1.AcquireAckHold )->(56)->(57)	Not Covered
(1.AcquireAckHold )->(56)->(!57)	Not Covered
(1.AcquireAckHold )->(!56)	Not Covered
(1.StretchAddr )->(58)->(59)	Not Covered
(1.StretchAddr )->(58)->(!59)	Not Covered
(1.StretchAddr )->(!58)	Not Covered
(1.StretchTx )->(60)	Not Covered
(1.StretchTx )->(!60)	Not Covered
(1.StretchTxSetup )->(61)	Not Covered
(1.StretchTxSetup )->(!61)	Not Covered
(1.StretchAcqFull )->(62)	Not Covered
(1.StretchAcqFull )->(!62)	Not Covered
(1.default)	Not Covered

	LineNo.	Expression
-1-:	1305	if (((!target_idle) && (!target_enable_i)))
-2-:	1315	if (start_det)
-3-:	1317	if (stop_det)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	1324	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	1333	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered