Unified Coverage Report :: Module :: i2c_fifos

Module : i2c_fifos

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fifos.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.i2c_core.u_fifos	0.00	0.00				0.00

---

Module Instance : tb.dut.i2c_core.u_fifos

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00			0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		i2c_core

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_acq_fifo_sram_adapter	0.00	0.00	0.00			0.00
u_fmt_fifo_sram_adapter	0.00	0.00	0.00			0.00
u_ram_1p	0.00	0.00	0.00			0.00
u_ram_arbiter	0.00	0.00	0.00			0.00
u_rx_fifo_sram_adapter	0.00	0.00	0.00			0.00
u_tx_fifo_sram_adapter	0.00	0.00	0.00			0.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : i2c_fifos

	Line No.	Total	Covered	Percent
TOTAL		31	0	0.00
CONT_ASSIGN	114	1	0	0.00
CONT_ASSIGN	115	1	0	0.00
CONT_ASSIGN	147	1	0	0.00
CONT_ASSIGN	148	1	0	0.00
CONT_ASSIGN	150	1	0	0.00
CONT_ASSIGN	182	1	0	0.00
CONT_ASSIGN	183	1	0	0.00
CONT_ASSIGN	185	1	0	0.00
CONT_ASSIGN	217	1	0	0.00
CONT_ASSIGN	218	1	0	0.00
CONT_ASSIGN	220	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
CONT_ASSIGN	255	1	0	0.00
CONT_ASSIGN	256	1	0	0.00
CONT_ASSIGN	257	1	0	0.00
CONT_ASSIGN	258	1	0	0.00
CONT_ASSIGN	259	1	0	0.00
CONT_ASSIGN	260	1	0	0.00
CONT_ASSIGN	261	1	0	0.00
CONT_ASSIGN	262	1	0	0.00
CONT_ASSIGN	263	1	0	0.00
CONT_ASSIGN	264	1	0	0.00
CONT_ASSIGN	265	1	0	0.00
ALWAYS	270	3	0	0.00
CONT_ASSIGN	276	1	0	0.00
CONT_ASSIGN	277	1	0	0.00
CONT_ASSIGN	278	1	0	0.00
CONT_ASSIGN	279	1	0	0.00
CONT_ASSIGN	303	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fifos.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fifos.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
114	0	1
115	0	1
147	0	1
148	0	1
150	0	1
182	0	1
183	0	1
185	0	1
217	0	1
218	0	1
220	0	1
254	0	1
255	0	1
256	0	1
257	0	1
258	0	1
259	0	1
260	0	1
261	0	1
262	0	1
263	0	1
264	0	1
265	0	1
270	0	1
271	0	1
273	0	1
276	0	1
277	0	1
278	0	1
279	0	1
303	0	1

---

Branch Coverage for Module : i2c_fifos

	Line No.	Total	Covered	Percent
Branches		2	0	0.00
IF	270	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_fifos.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_fifos.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	270	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered