Unified Coverage Report :: Module :: i2c_controller_fsm

Module : i2c_controller_fsm

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_controller_fsm.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.i2c_core.u_i2c_controller_fsm	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.i2c_core.u_i2c_controller_fsm

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		i2c_core

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : i2c_controller_fsm

	Line No.	Total	Covered	Percent
TOTAL		406	0	0.00
ALWAYS	120	17	0	0.00
ALWAYS	147	3	0	0.00
ALWAYS	160	5	0	0.00
CONT_ASSIGN	183	1	0	0.00
ALWAYS	187	6	0	0.00
ALWAYS	203	9	0	0.00
CONT_ASSIGN	218	1	0	0.00
ALWAYS	222	7	0	0.00
ALWAYS	235	6	0	0.00
ALWAYS	246	5	0	0.00
ALWAYS	253	7	0	0.00
ALWAYS	266	5	0	0.00
ALWAYS	280	8	0	0.00
ALWAYS	292	8	0	0.00
ALWAYS	304	3	0	0.00
CONT_ASSIGN	346	1	0	0.00
ALWAYS	351	6	0	0.00
CONT_ASSIGN	369	1	0	0.00
CONT_ASSIGN	374	1	0	0.00
ALWAYS	379	119	0	0.00
ALWAYS	582	181	0	0.00
ALWAYS	913	3	0	0.00
CONT_ASSIGN	920	1	0	0.00
CONT_ASSIGN	921	1	0	0.00
CONT_ASSIGN	924	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_controller_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_controller_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
120	0	1
121	0	1
122	0	1
123	0	1
124	0	1
125	0	1
126	0	1
127	0	1
128	0	1
129	0	1
130	0	1
131	0	1
132	0	1
133	0	1
134	0	1
137	0	1
142	0	1
			==> MISSING_ELSE
147	0	1
148	0	1
150	0	1
160	0	1
161	0	1
162	0	1
164	0	1
166	0	1
183	0	1
187	0	1
188	0	1
190	0	1
191	0	1
192	0	1
193	0	1
			==> MISSING_ELSE
203	0	1
204	0	1
205	0	1
206	0	1
208	0	1
209	0	1
210	0	1
			==> MISSING_ELSE
213	0	1
214	0	1
218	0	1
222	0	1
223	0	1
224	0	1
225	0	1
226	0	1
227	0	1
229	0	1
235	0	1
236	0	1
237	0	1
238	0	1
239	0	1
240	0	1
			==> MISSING_ELSE
246	0	2
247	0	2
248	0	1
253	0	1
254	0	1
255	0	1
256	0	1
257	0	1
258	0	1
260	0	1
266	0	1
267	0	1
268	0	1
270	0	1
271	0	1
280	0	1
281	0	1
282	0	1
283	0	1
284	0	1
285	0	1
286	0	1
287	0	1
			==> MISSING_ELSE
292	0	1
293	0	1
294	0	1
295	0	1
296	0	1
297	0	1
298	0	1
299	0	1
			==> MISSING_ELSE
304	0	1
305	0	1
307	0	1
346	0	1
351	0	1
352	0	1
353	0	1
357	0	1
358	0	1
359	0	1
			==> MISSING_ELSE
369	0	1
374	0	1
379	0	1
380	0	1
381	0	1
382	0	1
383	0	1
384	0	1
385	0	1
386	0	1
387	0	1
388	0	1
389	0	1
390	0	1
395	0	1
396	0	1
397	0	1
398	0	1
400	0	1
401	0	1
411	0	1
412	0	1
413	0	1
414	0	2
			==> MISSING_ELSE
418	0	1
419	0	1
420	0	1
424	0	1
425	0	1
426	0	1
429	0	1
430	0	1
431	0	1
433	0	1
435	0	1
439	0	1
440	0	1
441	0	1
442	0	1
443	0	2
			==> MISSING_ELSE
444	0	2
			==> MISSING_ELSE
448	0	1
449	0	1
450	0	1
454	0	1
455	0	1
456	0	1
460	0	1
461	0	1
462	0	1
463	0	2
			==> MISSING_ELSE
464	0	1
465	0	2
			==> MISSING_ELSE
466	0	2
			==> MISSING_ELSE
470	0	1
471	0	1
472	0	1
476	0	1
477	0	1
478	0	1
482	0	1
483	0	1
484	0	1
485	0	2
			==> MISSING_ELSE
486	0	2
			==> MISSING_ELSE
490	0	1
491	0	1
492	0	1
493	0	1
494	0	1
			==> MISSING_ELSE
499	0	1
500	0	1
504	0	2
505	0	2
506	0	1
510	0	1
511	0	2
512	0	2
513	0	1
514	0	1
515	0	1
516	0	2
			==> MISSING_ELSE
517	0	2
			==> MISSING_ELSE
521	0	1
522	0	2
523	0	2
524	0	1
525	0	1
529	0	1
530	0	1
531	0	1
535	0	1
536	0	1
537	0	1
541	0	1
542	0	1
543	0	1
544	0	1
548	0	1
554	0	1
558	0	1
559	0	2
560	0	1
561	0	1
582	0	1
583	0	1
584	0	1
585	0	1
586	0	1
587	0	1
588	0	1
589	0	1
590	0	1
591	0	1
592	0	1
593	0	1
594	0	1
595	0	1
597	0	1
601	0	1
602	0	1
613	0	1
615	0	1
616	0	1
617	0	1
618	0	1
			==> MISSING_ELSE
620	0	1
621	0	1
			==> MISSING_ELSE
623	0	1
624	0	1
625	0	1
626	0	1
627	0	1
			==> MISSING_ELSE
637	0	1
638	0	1
639	0	1
640	0	1
641	0	1
			==> MISSING_ELSE
646	0	1
647	0	1
648	0	1
649	0	1
			==> MISSING_ELSE
654	0	1
655	0	1
656	0	1
657	0	1
			==> MISSING_ELSE
662	0	1
663	0	1
664	0	1
665	0	1
666	0	1
667	0	1
669	0	1
670	0	1
			==> MISSING_ELSE
676	0	1
677	0	1
679	0	1
680	0	1
681	0	1
682	0	1
683	0	1
684	0	1
			==> MISSING_ELSE
689	0	1
690	0	1
691	0	1
692	0	1
693	0	1
694	0	1
695	0	1
696	0	1
698	0	1
699	0	1
			==> MISSING_ELSE
706	0	1
707	0	1
708	0	1
709	0	1
			==> MISSING_ELSE
714	0	1
716	0	1
717	0	1
719	0	1
720	0	1
721	0	1
722	0	1
			==> MISSING_ELSE
728	0	1
729	0	1
730	0	1
731	0	1
732	0	1
734	0	1
735	0	1
736	0	1
			==> MISSING_ELSE
742	0	1
743	0	1
744	0	1
745	0	1
			==> MISSING_ELSE
750	0	1
752	0	1
753	0	1
754	0	1
755	0	1
756	0	1
757	0	1
758	0	1
			==> MISSING_ELSE
763	0	1
764	0	1
765	0	1
766	0	1
767	0	1
768	0	1
769	0	1
771	0	1
772	0	1
			==> MISSING_ELSE
779	0	1
780	0	1
781	0	1
782	0	1
783	0	1
			==> MISSING_ELSE
788	0	1
789	0	1
791	0	1
792	0	1
793	0	1
794	0	1
795	0	1
796	0	1
			==> MISSING_ELSE
801	0	1
802	0	1
803	0	1
804	0	1
805	0	1
806	0	1
807	0	1
808	0	1
810	0	1
811	0	1
812	0	1
815	0	1
816	0	1
817	0	1
818	0	1
			==> MISSING_ELSE
824	0	1
825	0	1
826	0	1
827	0	1
			==> MISSING_ELSE
832	0	1
833	0	1
834	0	1
835	0	1
836	0	1
			==> MISSING_ELSE
841	0	1
842	0	1
843	0	1
844	0	1
845	0	1
847	0	1
848	0	1
849	0	1
851	0	1
852	0	1
853	0	1
			==> MISSING_ELSE
859	0	1
860	0	1
861	0	1
862	0	1
863	0	1
864	0	1
865	0	1
866	0	1
867	0	1
869	0	1
870	0	1
871	0	1
872	0	1
877	0	1
878	0	1
879	0	1
880	0	1
881	0	1
882	0	1
883	0	1
884	0	1
885	0	1
887	0	1
888	0	1
889	0	1
913	0	1
914	0	1
916	0	1
920	0	1
921	0	1
924	0	1

---

Cond Coverage for Module : i2c_controller_fsm

	Total	Covered	Percent
Conditions	166	0	0.00
Logical	166	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       137
 EXPRESSION (host_enable_i || (((!host_idle_o)) && ((!host_enable_i))))
             ------1------    --------------------2-------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       137
 SUB-EXPRESSION (((!host_idle_o)) && ((!host_enable_i)))
                 --------1-------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       162
 EXPRESSION (stretch_en && ((!scl_i)))
             -----1----    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       190
 EXPRESSION (stretch_idle_cnt == stretch_cnt_threshold)
            ---------------------1---------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       247
 EXPRESSION (fmt_byte_i == '0)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       282
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       294
 EXPRESSION (pend_restart && ((!host_enable_i)))
             ------1-----    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       353
 EXPRESSION (((!en_sda_interf_det)) && ((|sda_rise_cnt)))
             -----------1----------    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       358
 EXPRESSION (en_sda_interf_det && (sda_rise_cnt < sda_rise_latency))
             --------1--------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       369
 EXPRESSION ((host_idle_o & host_enable_i & ((!sda_i))) | ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i))))
             ---------------------1--------------------   ----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       369
 SUB-EXPRESSION (host_idle_o & host_enable_i & ((!sda_i)))
                 -----1-----   ------2------   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       369
 SUB-EXPRESSION ((sda_rise_cnt == sda_rise_latency) & sda_o & ((!sda_i)))
                 -----------------1----------------   --2--   -----3----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       369
 SUB-EXPRESSION (sda_rise_cnt == sda_rise_latency)
                -----------------1----------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       374
 EXPRESSION (unhandled_unexp_nak_i && host_enable_i && (state_q == Idle) && host_nack_handler_timeout_en_i && ((!unhandled_nak_timeout_i)))
             ----------1----------    ------2------    --------3--------    ---------------4--------------    --------------5-------------

-1-	-2-	-3-	-4-	-5-	Status	Tests
0	1	1	1	1	Not Covered
1	0	1	1	1	Not Covered
1	1	0	1	1	Not Covered
1	1	1	0	1	Not Covered
1	1	1	1	0	Not Covered
1	1	1	1	1	Not Covered

 LINE       374
 SUB-EXPRESSION (state_q == Idle)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       443
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       444
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       463
 EXPRESSION (((!scl_i_q)) && scl_i && sda_i && ((!fmt_flag_nak_ok_i)))
             ------1-----    --2--    --3--    -----------4----------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       465
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       466
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       485
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       486
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       492
 EXPRESSION ((bit_index == '0) && (tcount_q == 20'b1))
             --------1--------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       492
 SUB-EXPRESSION (bit_index == '0)
                --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       492
 SUB-EXPRESSION (tcount_q == 20'b1)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       505
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       512
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       516
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       517
 EXPRESSION (sda_i_q != sda_i)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       523
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       554
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       602
 EXPRESSION (unhandled_unexp_nak_i || unhandled_nak_timeout_i)
             ----------1----------    -----------2-----------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       613
 EXPRESSION (trans_started && unhandled_nak_cnt_expired)
             ------1------    ------------2------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       623
 EXPRESSION (trans_started && ((!host_enable_i)))
             ------1------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       637
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       646
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       654
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       663
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       677
 EXPRESSION (((!scl_i)) && stretch_predict_cnt_expired)
             -----1----    -------------2-------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       681
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       690
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       694
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       706
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       714
 EXPRESSION (((!scl_i)) && stretch_predict_cnt_expired)
             -----1----    -------------2-------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       719
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       728
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       742
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       750
 EXPRESSION (((!scl_i)) && stretch_predict_cnt_expired)
             -----1----    -------------2-------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       754
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       763
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       766
 EXPRESSION (bit_index == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       780
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       789
 EXPRESSION (((!scl_i)) && stretch_predict_cnt_expired)
             -----1----    -------------2-------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       793
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       802
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       804
 EXPRESSION (byte_index == 9'b1)
            ----------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       824
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       832
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       842
 EXPRESSION (tcount_q == 20'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       864
 EXPRESSION (fmt_flag_start_before_i && ((!trans_started)))
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       877
 EXPRESSION (((!host_enable_i)) && trans_started)
             ---------1--------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       882
 EXPRESSION (((!host_enable_i)) || (fmt_fifo_depth_i == 7'b1) || unhandled_unexp_nak_i)
             ---------1--------    -------------2------------    ----------3----------

-1-	-2-	-3-	Status	Tests
0	0	0	Not Covered
0	0	1	Not Covered
0	1	0	Not Covered
1	0	0	Not Covered

 LINE       882
 SUB-EXPRESSION (fmt_fifo_depth_i == 7'b1)
                -------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       924
 EXPRESSION (stretch_en && (stretch_idle_cnt[30:0] > stretch_timeout_i) && timeout_enable_i)
             -----1----    ----------------------2---------------------    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

---

FSM Coverage for Module : i2c_controller_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	21	0	0.00	(Not included in score)
Transitions	33	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
Active	621	Not Covered
ClockLow	655	Not Covered
ClockLowAck	695	Not Covered
ClockPulse	669	Not Covered
ClockPulseAck	707	Not Covered
ClockStart	647	Not Covered
ClockStop	616	Not Covered
HoldBit	682	Not Covered
HoldDevAck	720	Not Covered
HoldStart	638	Not Covered
HoldStop	833	Not Covered
HostClockLowAck	767	Not Covered
HostClockPulseAck	781	Not Covered
HostHoldBitAck	794	Not Covered
Idle	847	Not Covered
PopFmtFifo	734	Not Covered
ReadClockLow	771	Not Covered
ReadClockPulse	743	Not Covered
ReadHoldBit	755	Not Covered
SetupStart	666	Not Covered
SetupStop	825	Not Covered

transitions	Line No.	Covered	Tests
Active->ClockLow	869	Not Covered
Active->ReadClockLow	861	Not Covered
Active->SetupStart	865	Not Covered
ClockLow->ClockPulse	669	Not Covered
ClockLow->SetupStart	666	Not Covered
ClockLowAck->ClockPulseAck	707	Not Covered
ClockPulse->HoldBit	682	Not Covered
ClockPulseAck->HoldDevAck	720	Not Covered
ClockStart->ClockLow	655	Not Covered
ClockStop->SetupStop	825	Not Covered
HoldBit->ClockLow	698	Not Covered
HoldBit->ClockLowAck	695	Not Covered
HoldDevAck->ClockStop	730	Not Covered
HoldDevAck->PopFmtFifo	734	Not Covered
HoldStart->ClockStart	647	Not Covered
HoldStop->Idle	847	Not Covered
HoldStop->PopFmtFifo	851	Not Covered
HostClockLowAck->HostClockPulseAck	781	Not Covered
HostClockPulseAck->HostHoldBitAck	794	Not Covered
HostHoldBitAck->ClockStop	806	Not Covered
HostHoldBitAck->PopFmtFifo	810	Not Covered
HostHoldBitAck->ReadClockLow	815	Not Covered
Idle->Active	621	Not Covered
Idle->ClockStop	616	Not Covered
PopFmtFifo->Active	887	Not Covered
PopFmtFifo->ClockStop	879	Not Covered
PopFmtFifo->Idle	883	Not Covered
ReadClockLow->ReadClockPulse	743	Not Covered
ReadClockPulse->ReadHoldBit	755	Not Covered
ReadHoldBit->HostClockLowAck	767	Not Covered
ReadHoldBit->ReadClockLow	771	Not Covered
SetupStart->HoldStart	638	Not Covered
SetupStop->HoldStop	833	Not Covered

---

Branch Coverage for Module : i2c_controller_fsm

	Line No.	Total	Covered	Percent
Branches		171	0	0.00
IF	121	15	0	0.00
IF	147	2	0	0.00
IF	160	3	0	0.00
IF	187	4	0	0.00
IF	203	4	0	0.00
IF	222	4	0	0.00
IF	235	4	0	0.00
IF	246	3	0	0.00
IF	253	4	0	0.00
IF	266	2	0	0.00
IF	280	5	0	0.00
IF	292	5	0	0.00
IF	304	2	0	0.00
IF	351	4	0	0.00
CASE	390	48	0	0.00
CASE	597	60	0	0.00
IF	913	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_controller_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_controller_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	121	if (load_tcount)
-2-:	122	case (tcount_sel)
-3-:	137	if ((host_enable_i || ((!host_idle_o) && (!host_enable_i))))

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupStart	-	Not Covered
1	tHoldStart	-	Not Covered
1	tSetupData	-	Not Covered
1	tClockStart	-	Not Covered
1	tClockLow	-	Not Covered
1	tClockPulse	-	Not Covered
1	tClockHigh	-	Not Covered
1	tHoldBit	-	Not Covered
1	tClockStop	-	Not Covered
1	tSetupStop	-	Not Covered
1	tHoldStop	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	147	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	160	if ((!rst_ni))
-2-:	162	if ((stretch_en && (!scl_i)))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	187	if ((!rst_ni))
-2-:	190	if ((stretch_idle_cnt == stretch_cnt_threshold))
-3-:	192	if ((!stretch_en))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	203	if ((!rst_ni))
-2-:	206	if (incr_nak_cnt)
-3-:	209	if ((unhandled_nak_cnt > host_nack_handler_timeout_i))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	222	if ((!rst_ni))
-2-:	224	if (bit_clr)
-3-:	226	if (bit_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	235	if ((!rst_ni))
-2-:	237	if (read_byte_clr)
-3-:	239	if (shift_data_en)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	246	if ((!fmt_flag_read_bytes_i))
-2-:	247	if ((fmt_byte_i == '0))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	253	if ((!rst_ni))
-2-:	255	if (byte_clr)
-3-:	257	if (byte_decr)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	266	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	280	if ((!rst_ni))
-2-:	282	if ((trans_started && (!host_enable_i)))
-3-:	284	if (log_start)
-4-:	286	if (log_stop)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	292	if ((!rst_ni))
-2-:	294	if ((pend_restart && (!host_enable_i)))
-3-:	296	if (req_restart)
-4-:	298	if (log_start)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	304	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	351	if ((!rst_ni))
-2-:	353	if (((!en_sda_interf_det) && (|sda_rise_cnt)))
-3-:	358	if ((en_sda_interf_det && (sda_rise_cnt < sda_rise_latency)))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	390	case (state_q)
-2-:	396	if (trans_started)
-3-:	414	if (log_start)
-4-:	430	if (pend_restart)
-5-:	443	if ((scl_i_q && (!scl_i)))
-6-:	444	if ((sda_i_q != sda_i))
-7-:	463	if (((((!scl_i_q) && scl_i) && sda_i) && (!fmt_flag_nak_ok_i)))
-8-:	465	if ((scl_i_q && (!scl_i)))
-9-:	466	if ((sda_i_q != sda_i))
-10-:	485	if ((scl_i_q && (!scl_i)))
-11-:	486	if ((sda_i_q != sda_i))
-12-:	492	if (((bit_index == '0) && (tcount_q == 20'b1)))
-13-:	504	if (fmt_flag_read_continue_i)
-14-:	505	if ((byte_index == 9'b1))
-15-:	511	if (fmt_flag_read_continue_i)
-16-:	512	if ((byte_index == 9'b1))
-17-:	516	if ((scl_i_q && (!scl_i)))
-18-:	517	if ((sda_i_q != sda_i))
-19-:	522	if (fmt_flag_read_continue_i)
-20-:	523	if ((byte_index == 9'b1))
-21-:	559	if (fmt_flag_stop_after_i)

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	Status	Tests
Idle	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	597	case (state_q)
-2-:	601	if (host_enable_i)
-3-:	602	if ((unhandled_unexp_nak_i || unhandled_nak_timeout_i))
-4-:	613	if ((trans_started && unhandled_nak_cnt_expired))
-5-:	620	if (fmt_fifo_rvalid_i)
-6-:	623	if ((trans_started && (!host_enable_i)))
-7-:	637	if ((tcount_q == 20'b1))
-8-:	646	if ((tcount_q == 20'b1))
-9-:	654	if ((tcount_q == 20'b1))
-10-:	663	if ((tcount_q == 20'b1))
-11-:	665	if (pend_restart)
-12-:	677	if (((!scl_i) && stretch_predict_cnt_expired))
-13-:	681	if ((tcount_q == 20'b1))
-14-:	690	if ((tcount_q == 20'b1))
-15-:	694	if ((bit_index == '0))
-16-:	706	if ((tcount_q == 20'b1))
-17-:	714	if (((!scl_i) && stretch_predict_cnt_expired))
-18-:	719	if ((tcount_q == 20'b1))
-19-:	728	if ((tcount_q == 20'b1))
-20-:	729	if (fmt_flag_stop_after_i)
-21-:	742	if ((tcount_q == 20'b1))
-22-:	750	if (((!scl_i) && stretch_predict_cnt_expired))
-23-:	754	if ((tcount_q == 20'b1))
-24-:	763	if ((tcount_q == 20'b1))
-25-:	766	if ((bit_index == '0))
-26-:	780	if ((tcount_q == 20'b1))
-27-:	789	if (((!scl_i) && stretch_predict_cnt_expired))
-28-:	793	if ((tcount_q == 20'b1))
-29-:	802	if ((tcount_q == 20'b1))
-30-:	804	if ((byte_index == 9'b1))
-31-:	805	if (fmt_flag_stop_after_i)
-32-:	824	if ((tcount_q == 20'b1))
-33-:	832	if ((tcount_q == 20'b1))
-34-:	842	if ((tcount_q == 20'b1))
-35-:	845	if (auto_stop_q)
-36-:	859	if (fmt_flag_read_bytes_i)
-37-:	864	if ((fmt_flag_start_before_i && (!trans_started)))
-38-:	877	if (((!host_enable_i) && trans_started))
-39-:	882	if ((((!host_enable_i) || (fmt_fifo_depth_i == 7'b1)) || unhandled_unexp_nak_i))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	-25-	-26-	-27-	-28-	-29-	-30-	-31-	-32-	-33-	-34-	-35-	-36-	-37-	-38-	-39-	Status	Tests
Idle	1	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	1	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	1	0	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	1	0	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
Idle	0	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
SetupStart	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldStart	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStart	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLow	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulse	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldBit	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HoldDevAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockLow	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadClockPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ReadHoldBit	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockLowAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostClockPulseAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	1	-	-	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	0	-	-	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	Not Covered
HostHoldBitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
ClockStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
SetupStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	Not Covered
HoldStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	Not Covered
Active	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	Not Covered
PopFmtFifo	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	913	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered