T38 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.3132416198 |
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Aug 23 09:31:06 PM UTC 24 |
Aug 23 09:31:11 PM UTC 24 |
222652775 ps |
T248 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.1755507465 |
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Aug 23 09:31:03 PM UTC 24 |
Aug 23 09:31:12 PM UTC 24 |
230454344 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.419813940 |
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Aug 23 09:30:23 PM UTC 24 |
Aug 23 09:31:18 PM UTC 24 |
2191917364 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.160394859 |
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Aug 23 09:29:42 PM UTC 24 |
Aug 23 09:31:23 PM UTC 24 |
27144287284 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.1440387073 |
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Aug 23 09:31:11 PM UTC 24 |
Aug 23 09:31:24 PM UTC 24 |
1133177742 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.979598437 |
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Aug 23 09:30:46 PM UTC 24 |
Aug 23 09:31:25 PM UTC 24 |
23289161621 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.2095871578 |
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Aug 23 09:31:04 PM UTC 24 |
Aug 23 09:31:29 PM UTC 24 |
1241293997 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.2577337761 |
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Aug 23 09:31:26 PM UTC 24 |
Aug 23 09:31:33 PM UTC 24 |
1125571226 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.1066809129 |
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Aug 23 09:30:36 PM UTC 24 |
Aug 23 09:31:33 PM UTC 24 |
10165534643 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.2021190007 |
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Aug 23 09:30:58 PM UTC 24 |
Aug 23 09:31:35 PM UTC 24 |
16790318226 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_override.2837380883 |
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Aug 23 09:32:35 PM UTC 24 |
Aug 23 09:32:37 PM UTC 24 |
26211997 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.2797977678 |
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Aug 23 09:31:34 PM UTC 24 |
Aug 23 09:31:36 PM UTC 24 |
214953910 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.819249023 |
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Aug 23 09:31:30 PM UTC 24 |
Aug 23 09:31:37 PM UTC 24 |
1398355829 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.1819710390 |
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Aug 23 09:31:35 PM UTC 24 |
Aug 23 09:31:38 PM UTC 24 |
2311123498 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.3409841520 |
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Aug 23 09:31:24 PM UTC 24 |
Aug 23 09:31:38 PM UTC 24 |
2785349954 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_hrst.3771166228 |
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Aug 23 09:31:38 PM UTC 24 |
Aug 23 09:31:41 PM UTC 24 |
242234549 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.3358961472 |
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Aug 23 09:31:20 PM UTC 24 |
Aug 23 09:31:41 PM UTC 24 |
1273250780 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_perf.1723456269 |
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Aug 23 09:31:37 PM UTC 24 |
Aug 23 09:31:42 PM UTC 24 |
3953230132 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1649381597 |
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Aug 23 09:31:38 PM UTC 24 |
Aug 23 09:31:43 PM UTC 24 |
2510137832 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.2784497663 |
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Aug 23 09:31:42 PM UTC 24 |
Aug 23 09:31:44 PM UTC 24 |
106431492 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.378397877 |
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Aug 23 09:31:42 PM UTC 24 |
Aug 23 09:31:45 PM UTC 24 |
494081582 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.3541554157 |
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Aug 23 09:28:32 PM UTC 24 |
Aug 23 09:31:45 PM UTC 24 |
20098526787 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.4120987846 |
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Aug 23 09:31:43 PM UTC 24 |
Aug 23 09:31:46 PM UTC 24 |
88844867 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.1037761450 |
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Aug 23 09:31:43 PM UTC 24 |
Aug 23 09:31:46 PM UTC 24 |
534963976 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.2898519873 |
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Aug 23 09:31:45 PM UTC 24 |
Aug 23 09:31:48 PM UTC 24 |
274197374 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_alert_test.1991571504 |
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Aug 23 09:31:46 PM UTC 24 |
Aug 23 09:31:48 PM UTC 24 |
14598975 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.2038277208 |
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Aug 23 09:31:45 PM UTC 24 |
Aug 23 09:31:49 PM UTC 24 |
2403843461 ps |
T58 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.2282657745 |
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Aug 23 09:31:45 PM UTC 24 |
Aug 23 09:31:50 PM UTC 24 |
597801887 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_override.3560895899 |
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Aug 23 09:31:49 PM UTC 24 |
Aug 23 09:31:50 PM UTC 24 |
87999382 ps |
T284 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.3949949702 |
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|
Aug 23 09:30:09 PM UTC 24 |
Aug 23 09:31:51 PM UTC 24 |
19424266815 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.1529403526 |
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Aug 23 09:31:51 PM UTC 24 |
Aug 23 09:31:53 PM UTC 24 |
136753751 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.2658604109 |
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Aug 23 09:28:13 PM UTC 24 |
Aug 23 09:31:53 PM UTC 24 |
80862061783 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.3875269276 |
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Aug 23 09:30:57 PM UTC 24 |
Aug 23 09:31:54 PM UTC 24 |
5622427746 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.3541458006 |
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|
Aug 23 09:31:42 PM UTC 24 |
Aug 23 09:31:56 PM UTC 24 |
7101669334 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.1785809224 |
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|
Aug 23 09:31:55 PM UTC 24 |
Aug 23 09:31:57 PM UTC 24 |
79551174 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.1790964148 |
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Aug 23 09:31:52 PM UTC 24 |
Aug 23 09:31:59 PM UTC 24 |
282604779 ps |
T39 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.362463780 |
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|
Aug 23 09:31:58 PM UTC 24 |
Aug 23 09:32:02 PM UTC 24 |
458762894 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.2558576937 |
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|
Aug 23 09:31:57 PM UTC 24 |
Aug 23 09:32:07 PM UTC 24 |
5012552772 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.2341704168 |
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|
Aug 23 09:31:51 PM UTC 24 |
Aug 23 09:32:07 PM UTC 24 |
712420547 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_perf.3295515772 |
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|
Aug 23 09:31:03 PM UTC 24 |
Aug 23 09:32:08 PM UTC 24 |
12234304732 ps |
T124 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.1391044014 |
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|
Aug 23 09:30:23 PM UTC 24 |
Aug 23 09:32:11 PM UTC 24 |
11206648820 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.2601455331 |
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|
Aug 23 09:32:07 PM UTC 24 |
Aug 23 09:32:12 PM UTC 24 |
11878632036 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.3518197815 |
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|
Aug 23 09:31:37 PM UTC 24 |
Aug 23 09:32:13 PM UTC 24 |
41714756757 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.2768552058 |
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|
Aug 23 09:30:57 PM UTC 24 |
Aug 23 09:32:13 PM UTC 24 |
1904907044 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.242029956 |
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|
Aug 23 09:31:47 PM UTC 24 |
Aug 23 09:32:17 PM UTC 24 |
2166955923 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.4238359158 |
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|
Aug 23 09:32:17 PM UTC 24 |
Aug 23 09:32:19 PM UTC 24 |
173690922 ps |
T288 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.530751083 |
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|
Aug 23 09:32:12 PM UTC 24 |
Aug 23 09:32:20 PM UTC 24 |
10352853662 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.886246322 |
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|
Aug 23 09:32:17 PM UTC 24 |
Aug 23 09:32:20 PM UTC 24 |
652444579 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.493514097 |
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|
Aug 23 09:32:13 PM UTC 24 |
Aug 23 09:32:20 PM UTC 24 |
4467788183 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.4289181037 |
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|
Aug 23 09:32:09 PM UTC 24 |
Aug 23 09:32:23 PM UTC 24 |
1145618716 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_hrst.3345830599 |
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|
Aug 23 09:32:22 PM UTC 24 |
Aug 23 09:32:26 PM UTC 24 |
903807572 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_perf.712480041 |
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|
Aug 23 09:32:21 PM UTC 24 |
Aug 23 09:32:27 PM UTC 24 |
7407102640 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.2973629045 |
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Aug 23 09:32:21 PM UTC 24 |
Aug 23 09:32:27 PM UTC 24 |
11493395344 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.1420784501 |
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Aug 23 09:32:28 PM UTC 24 |
Aug 23 09:32:30 PM UTC 24 |
120963903 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.2137265427 |
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Aug 23 09:32:08 PM UTC 24 |
Aug 23 09:32:30 PM UTC 24 |
5717078211 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.1248227880 |
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Aug 23 09:32:28 PM UTC 24 |
Aug 23 09:32:31 PM UTC 24 |
130036286 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.2508216310 |
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Aug 23 09:32:28 PM UTC 24 |
Aug 23 09:32:31 PM UTC 24 |
441409149 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.2807887504 |
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Aug 23 09:32:03 PM UTC 24 |
Aug 23 09:32:32 PM UTC 24 |
4324255005 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.97109396 |
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Aug 23 09:32:31 PM UTC 24 |
Aug 23 09:32:34 PM UTC 24 |
4988813030 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.1754830715 |
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Aug 23 09:32:32 PM UTC 24 |
Aug 23 09:32:34 PM UTC 24 |
167626830 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.1471119791 |
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Aug 23 09:32:31 PM UTC 24 |
Aug 23 09:32:35 PM UTC 24 |
1281814938 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_alert_test.1656177730 |
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|
Aug 23 09:32:33 PM UTC 24 |
Aug 23 09:32:35 PM UTC 24 |
17015901 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.1057189898 |
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|
Aug 23 09:32:32 PM UTC 24 |
Aug 23 09:32:36 PM UTC 24 |
550051007 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.3673805375 |
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Aug 23 09:32:27 PM UTC 24 |
Aug 23 09:32:37 PM UTC 24 |
973239373 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.2381803267 |
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Aug 23 09:32:36 PM UTC 24 |
Aug 23 09:32:38 PM UTC 24 |
142674068 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.1180858041 |
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Aug 23 09:32:37 PM UTC 24 |
Aug 23 09:32:41 PM UTC 24 |
1234598595 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.3959457807 |
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Aug 23 09:32:37 PM UTC 24 |
Aug 23 09:32:42 PM UTC 24 |
298851113 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.491952587 |
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Aug 23 09:32:42 PM UTC 24 |
Aug 23 09:32:45 PM UTC 24 |
141605122 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.815468988 |
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Aug 23 09:32:12 PM UTC 24 |
Aug 23 09:32:45 PM UTC 24 |
9281818132 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.3435243583 |
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Aug 23 09:31:01 PM UTC 24 |
Aug 23 09:32:47 PM UTC 24 |
3612292743 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.1292209368 |
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Aug 23 09:32:46 PM UTC 24 |
Aug 23 09:32:50 PM UTC 24 |
236450158 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.178231877 |
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Aug 23 09:32:46 PM UTC 24 |
Aug 23 09:32:54 PM UTC 24 |
556492422 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.4129880525 |
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Aug 23 09:31:54 PM UTC 24 |
Aug 23 09:33:01 PM UTC 24 |
6396672336 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.2489118607 |
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Aug 23 09:31:50 PM UTC 24 |
Aug 23 09:33:03 PM UTC 24 |
5675840929 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.2492864885 |
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Aug 23 09:32:35 PM UTC 24 |
Aug 23 09:33:05 PM UTC 24 |
8963234602 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.4228797171 |
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Aug 23 09:33:04 PM UTC 24 |
Aug 23 09:33:06 PM UTC 24 |
1978984056 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.1935560152 |
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Aug 23 09:33:07 PM UTC 24 |
Aug 23 09:33:10 PM UTC 24 |
2789694927 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.3402135915 |
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Aug 23 09:33:06 PM UTC 24 |
Aug 23 09:33:13 PM UTC 24 |
16923074318 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.1632844824 |
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Aug 23 09:33:02 PM UTC 24 |
Aug 23 09:33:15 PM UTC 24 |
1380711789 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.1983838203 |
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Aug 23 09:32:51 PM UTC 24 |
Aug 23 09:33:15 PM UTC 24 |
3245675578 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.297266804 |
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Aug 23 09:25:46 PM UTC 24 |
Aug 23 09:33:18 PM UTC 24 |
44504958448 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.2710616951 |
|
|
Aug 23 09:33:16 PM UTC 24 |
Aug 23 09:33:18 PM UTC 24 |
188728048 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.805506663 |
|
|
Aug 23 09:33:16 PM UTC 24 |
Aug 23 09:33:19 PM UTC 24 |
532087145 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.2263687732 |
|
|
Aug 23 09:33:11 PM UTC 24 |
Aug 23 09:33:20 PM UTC 24 |
5860080801 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.1483989925 |
|
|
Aug 23 09:32:35 PM UTC 24 |
Aug 23 09:33:20 PM UTC 24 |
2778591274 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_perf.2981736186 |
|
|
Aug 23 09:33:16 PM UTC 24 |
Aug 23 09:33:22 PM UTC 24 |
2857936523 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.834090826 |
|
|
Aug 23 09:33:20 PM UTC 24 |
Aug 23 09:33:24 PM UTC 24 |
1023143925 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.570121600 |
|
|
Aug 23 09:33:20 PM UTC 24 |
Aug 23 09:33:25 PM UTC 24 |
496114955 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.3468549984 |
|
|
Aug 23 09:33:18 PM UTC 24 |
Aug 23 09:33:25 PM UTC 24 |
2840791688 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.3270306397 |
|
|
Aug 23 09:33:23 PM UTC 24 |
Aug 23 09:33:26 PM UTC 24 |
114737837 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_perf.3653182718 |
|
|
Aug 23 09:32:42 PM UTC 24 |
Aug 23 09:33:28 PM UTC 24 |
5502240103 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.3045072880 |
|
|
Aug 23 09:33:23 PM UTC 24 |
Aug 23 09:33:28 PM UTC 24 |
208968707 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.3543817320 |
|
|
Aug 23 09:33:26 PM UTC 24 |
Aug 23 09:33:29 PM UTC 24 |
2036355439 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.3261038685 |
|
|
Aug 23 09:35:06 PM UTC 24 |
Aug 23 09:35:12 PM UTC 24 |
1086589690 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.924270449 |
|
|
Aug 23 09:33:26 PM UTC 24 |
Aug 23 09:33:29 PM UTC 24 |
2008797537 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.1845628573 |
|
|
Aug 23 09:33:27 PM UTC 24 |
Aug 23 09:33:30 PM UTC 24 |
397175157 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_alert_test.3733647861 |
|
|
Aug 23 09:33:29 PM UTC 24 |
Aug 23 09:33:30 PM UTC 24 |
36080040 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_override.2986305639 |
|
|
Aug 23 09:33:30 PM UTC 24 |
Aug 23 09:33:32 PM UTC 24 |
18855978 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.201867681 |
|
|
Aug 23 09:33:31 PM UTC 24 |
Aug 23 09:33:33 PM UTC 24 |
414967329 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.3739775755 |
|
|
Aug 23 09:33:32 PM UTC 24 |
Aug 23 09:33:39 PM UTC 24 |
267858490 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.3819472047 |
|
|
Aug 23 09:32:39 PM UTC 24 |
Aug 23 09:33:39 PM UTC 24 |
10315621260 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.1324310517 |
|
|
Aug 23 09:33:41 PM UTC 24 |
Aug 23 09:33:45 PM UTC 24 |
908547194 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.1530104010 |
|
|
Aug 23 09:33:31 PM UTC 24 |
Aug 23 09:33:54 PM UTC 24 |
506716425 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.128864905 |
|
|
Aug 23 09:33:47 PM UTC 24 |
Aug 23 09:33:57 PM UTC 24 |
550863091 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.2371689246 |
|
|
Aug 23 09:33:53 PM UTC 24 |
Aug 23 09:33:57 PM UTC 24 |
181684367 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.4218659934 |
|
|
Aug 23 09:33:59 PM UTC 24 |
Aug 23 09:34:05 PM UTC 24 |
9506841418 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.1876444954 |
|
|
Aug 23 09:30:42 PM UTC 24 |
Aug 23 09:34:10 PM UTC 24 |
17014988506 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.3697116646 |
|
|
Aug 23 09:34:12 PM UTC 24 |
Aug 23 09:34:17 PM UTC 24 |
653707260 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.3797424793 |
|
|
Aug 23 09:32:21 PM UTC 24 |
Aug 23 09:34:17 PM UTC 24 |
20263587779 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.1879998900 |
|
|
Aug 23 09:34:21 PM UTC 24 |
Aug 23 09:34:23 PM UTC 24 |
441058277 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_perf.1489117549 |
|
|
Aug 23 09:31:54 PM UTC 24 |
Aug 23 09:34:24 PM UTC 24 |
12206685192 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.55683934 |
|
|
Aug 23 09:34:18 PM UTC 24 |
Aug 23 09:34:26 PM UTC 24 |
2609495732 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.2775382510 |
|
|
Aug 23 09:34:24 PM UTC 24 |
Aug 23 09:34:26 PM UTC 24 |
379041966 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.4241422539 |
|
|
Aug 23 09:33:59 PM UTC 24 |
Aug 23 09:34:26 PM UTC 24 |
1049522778 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.442588692 |
|
|
Aug 23 09:34:09 PM UTC 24 |
Aug 23 09:34:28 PM UTC 24 |
2443426857 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_perf.3345514368 |
|
|
Aug 23 09:34:25 PM UTC 24 |
Aug 23 09:34:32 PM UTC 24 |
3656482826 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.1995024333 |
|
|
Aug 23 09:34:27 PM UTC 24 |
Aug 23 09:34:33 PM UTC 24 |
3126509266 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.2037285927 |
|
|
Aug 23 09:33:30 PM UTC 24 |
Aug 23 09:34:35 PM UTC 24 |
6807743392 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.3726564636 |
|
|
Aug 23 09:34:07 PM UTC 24 |
Aug 23 09:34:36 PM UTC 24 |
1953709722 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.2768074003 |
|
|
Aug 23 09:34:34 PM UTC 24 |
Aug 23 09:34:36 PM UTC 24 |
157422861 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.1451704100 |
|
|
Aug 23 09:34:33 PM UTC 24 |
Aug 23 09:34:36 PM UTC 24 |
1648482275 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.2879533801 |
|
|
Aug 23 09:33:29 PM UTC 24 |
Aug 23 09:34:37 PM UTC 24 |
1662186231 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.523420739 |
|
|
Aug 23 09:32:35 PM UTC 24 |
Aug 23 09:34:38 PM UTC 24 |
15476820036 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.2400519294 |
|
|
Aug 23 09:34:36 PM UTC 24 |
Aug 23 09:34:38 PM UTC 24 |
100985788 ps |
T125 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/8.i2c_host_stress_all.2691857849 |
|
|
Aug 23 09:24:47 PM UTC 24 |
Aug 23 09:34:39 PM UTC 24 |
70397580155 ps |
T139 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.1908016897 |
|
|
Aug 23 09:34:37 PM UTC 24 |
Aug 23 09:34:40 PM UTC 24 |
1783740792 ps |
T140 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.1231325482 |
|
|
Aug 23 09:34:31 PM UTC 24 |
Aug 23 09:34:40 PM UTC 24 |
2091847701 ps |
T141 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.3937175794 |
|
|
Aug 23 09:34:37 PM UTC 24 |
Aug 23 09:34:40 PM UTC 24 |
925993601 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.3949210132 |
|
|
Aug 23 09:34:38 PM UTC 24 |
Aug 23 09:34:40 PM UTC 24 |
299815312 ps |
T143 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.839516689 |
|
|
Aug 23 09:34:37 PM UTC 24 |
Aug 23 09:34:40 PM UTC 24 |
2415698105 ps |
T144 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_alert_test.2452648884 |
|
|
Aug 23 09:34:39 PM UTC 24 |
Aug 23 09:34:41 PM UTC 24 |
17024492 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_override.2401757216 |
|
|
Aug 23 09:34:40 PM UTC 24 |
Aug 23 09:34:42 PM UTC 24 |
47468810 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.2604619934 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:34:43 PM UTC 24 |
525866757 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_perf.1144018983 |
|
|
Aug 23 09:33:40 PM UTC 24 |
Aug 23 09:34:44 PM UTC 24 |
5012866330 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.2703214927 |
|
|
Aug 23 09:34:42 PM UTC 24 |
Aug 23 09:34:45 PM UTC 24 |
199183974 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.2953835469 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:34:46 PM UTC 24 |
534074395 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_perf.3510468081 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:34:46 PM UTC 24 |
556174869 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.860090932 |
|
|
Aug 23 09:34:44 PM UTC 24 |
Aug 23 09:34:47 PM UTC 24 |
87845509 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.3997229546 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:34:52 PM UTC 24 |
2480040034 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.3329691329 |
|
|
Aug 23 09:34:53 PM UTC 24 |
Aug 23 09:35:00 PM UTC 24 |
2893160010 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.3594597918 |
|
|
Aug 23 09:34:44 PM UTC 24 |
Aug 23 09:35:02 PM UTC 24 |
1320066516 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.1532148624 |
|
|
Aug 23 09:35:01 PM UTC 24 |
Aug 23 09:35:05 PM UTC 24 |
631929252 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.2264010211 |
|
|
Aug 23 09:34:46 PM UTC 24 |
Aug 23 09:35:07 PM UTC 24 |
739372059 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.4287912201 |
|
|
Aug 23 09:35:11 PM UTC 24 |
Aug 23 09:35:13 PM UTC 24 |
254963966 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/3.i2c_target_stress_wr.753670748 |
|
|
Aug 23 09:20:53 PM UTC 24 |
Aug 23 09:35:15 PM UTC 24 |
55095260242 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.3092585314 |
|
|
Aug 23 09:35:13 PM UTC 24 |
Aug 23 09:35:15 PM UTC 24 |
288001836 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.572605824 |
|
|
Aug 23 09:32:55 PM UTC 24 |
Aug 23 09:35:17 PM UTC 24 |
56238867520 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.3926534777 |
|
|
Aug 23 09:33:17 PM UTC 24 |
Aug 23 09:35:18 PM UTC 24 |
34366209589 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.3382490420 |
|
|
Aug 23 09:34:48 PM UTC 24 |
Aug 23 09:35:18 PM UTC 24 |
2420706620 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_perf.421314600 |
|
|
Aug 23 09:35:14 PM UTC 24 |
Aug 23 09:35:19 PM UTC 24 |
3269683791 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.548757987 |
|
|
Aug 23 09:35:16 PM UTC 24 |
Aug 23 09:35:21 PM UTC 24 |
2968816924 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.4218319772 |
|
|
Aug 23 09:31:49 PM UTC 24 |
Aug 23 09:35:22 PM UTC 24 |
4445572638 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.2103671940 |
|
|
Aug 23 09:35:20 PM UTC 24 |
Aug 23 09:35:23 PM UTC 24 |
176066160 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.601602025 |
|
|
Aug 23 09:35:22 PM UTC 24 |
Aug 23 09:35:25 PM UTC 24 |
503379796 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.2240638786 |
|
|
Aug 23 09:35:23 PM UTC 24 |
Aug 23 09:35:26 PM UTC 24 |
107009995 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.2921260872 |
|
|
Aug 23 09:35:23 PM UTC 24 |
Aug 23 09:35:27 PM UTC 24 |
3570055799 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.237628497 |
|
|
Aug 23 09:34:17 PM UTC 24 |
Aug 23 09:35:28 PM UTC 24 |
17837379373 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.4126563935 |
|
|
Aug 23 09:35:24 PM UTC 24 |
Aug 23 09:35:28 PM UTC 24 |
1024972225 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.1554361986 |
|
|
Aug 23 09:36:56 PM UTC 24 |
Aug 23 09:37:03 PM UTC 24 |
1196891565 ps |
T51 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.1894148646 |
|
|
Aug 23 09:35:25 PM UTC 24 |
Aug 23 09:35:29 PM UTC 24 |
415986163 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_alert_test.1727599413 |
|
|
Aug 23 09:35:27 PM UTC 24 |
Aug 23 09:35:29 PM UTC 24 |
16693558 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.3685256005 |
|
|
Aug 23 09:35:03 PM UTC 24 |
Aug 23 09:35:30 PM UTC 24 |
10407219829 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_override.4016013493 |
|
|
Aug 23 09:35:29 PM UTC 24 |
Aug 23 09:35:30 PM UTC 24 |
93804482 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.1978798606 |
|
|
Aug 23 09:35:30 PM UTC 24 |
Aug 23 09:35:32 PM UTC 24 |
354418246 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.221789565 |
|
|
Aug 23 09:31:27 PM UTC 24 |
Aug 23 09:35:34 PM UTC 24 |
19804604015 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.226823201 |
|
|
Aug 23 09:35:31 PM UTC 24 |
Aug 23 09:35:40 PM UTC 24 |
767568508 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.2306758059 |
|
|
Aug 23 09:35:31 PM UTC 24 |
Aug 23 09:35:44 PM UTC 24 |
299077362 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.2022763872 |
|
|
Aug 23 09:35:29 PM UTC 24 |
Aug 23 09:35:49 PM UTC 24 |
1520351177 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.3711563553 |
|
|
Aug 23 09:35:19 PM UTC 24 |
Aug 23 09:35:51 PM UTC 24 |
869555449 ps |
T46 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_perf.2262079937 |
|
|
Aug 23 09:35:35 PM UTC 24 |
Aug 23 09:35:53 PM UTC 24 |
490730423 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.3927289603 |
|
|
Aug 23 09:35:49 PM UTC 24 |
Aug 23 09:35:54 PM UTC 24 |
135593733 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.2943192562 |
|
|
Aug 23 09:34:40 PM UTC 24 |
Aug 23 09:35:57 PM UTC 24 |
7216322028 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.1459166177 |
|
|
Aug 23 09:35:41 PM UTC 24 |
Aug 23 09:36:01 PM UTC 24 |
592336175 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.2782039335 |
|
|
Aug 23 09:35:51 PM UTC 24 |
Aug 23 09:36:04 PM UTC 24 |
959714776 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.533869574 |
|
|
Aug 23 09:35:54 PM UTC 24 |
Aug 23 09:36:04 PM UTC 24 |
17403571862 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.2772302142 |
|
|
Aug 23 09:34:39 PM UTC 24 |
Aug 23 09:36:07 PM UTC 24 |
23006219899 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.4266330277 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:36:07 PM UTC 24 |
6311710192 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.3664343381 |
|
|
Aug 23 09:36:01 PM UTC 24 |
Aug 23 09:36:07 PM UTC 24 |
3358558523 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.1845286865 |
|
|
Aug 23 09:35:45 PM UTC 24 |
Aug 23 09:36:07 PM UTC 24 |
2081399670 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.3949790506 |
|
|
Aug 23 09:34:41 PM UTC 24 |
Aug 23 09:36:09 PM UTC 24 |
4263152638 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.1035063231 |
|
|
Aug 23 09:36:08 PM UTC 24 |
Aug 23 09:36:09 PM UTC 24 |
196638690 ps |
T252 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.2451694444 |
|
|
Aug 23 09:36:07 PM UTC 24 |
Aug 23 09:36:10 PM UTC 24 |
211330559 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_stretch.2182506542 |
|
|
Aug 23 09:35:57 PM UTC 24 |
Aug 23 09:36:10 PM UTC 24 |
3195643420 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.1794569815 |
|
|
Aug 23 09:21:43 PM UTC 24 |
Aug 23 09:36:13 PM UTC 24 |
55772925046 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.3662377086 |
|
|
Aug 23 09:36:05 PM UTC 24 |
Aug 23 09:36:13 PM UTC 24 |
2548380218 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_hrst.2903941672 |
|
|
Aug 23 09:36:11 PM UTC 24 |
Aug 23 09:36:14 PM UTC 24 |
1274750245 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_perf.2985313566 |
|
|
Aug 23 09:36:09 PM UTC 24 |
Aug 23 09:36:15 PM UTC 24 |
815757160 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.1323210073 |
|
|
Aug 23 09:36:10 PM UTC 24 |
Aug 23 09:36:16 PM UTC 24 |
3817237703 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.2866273875 |
|
|
Aug 23 09:36:14 PM UTC 24 |
Aug 23 09:36:16 PM UTC 24 |
91890481 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.2633806704 |
|
|
Aug 23 09:33:33 PM UTC 24 |
Aug 23 09:36:17 PM UTC 24 |
3576447449 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.1387396097 |
|
|
Aug 23 09:37:00 PM UTC 24 |
Aug 23 09:37:02 PM UTC 24 |
89542881 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.3508648667 |
|
|
Aug 23 09:36:14 PM UTC 24 |
Aug 23 09:36:18 PM UTC 24 |
435092164 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.1170344567 |
|
|
Aug 23 09:36:14 PM UTC 24 |
Aug 23 09:36:18 PM UTC 24 |
140224579 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.3331950887 |
|
|
Aug 23 09:36:15 PM UTC 24 |
Aug 23 09:36:18 PM UTC 24 |
758510445 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_alert_test.548685488 |
|
|
Aug 23 09:36:17 PM UTC 24 |
Aug 23 09:36:19 PM UTC 24 |
15138471 ps |
T274 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.1415719410 |
|
|
Aug 23 09:36:11 PM UTC 24 |
Aug 23 09:36:19 PM UTC 24 |
656571443 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.1413972513 |
|
|
Aug 23 09:36:16 PM UTC 24 |
Aug 23 09:36:20 PM UTC 24 |
512059623 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_nack_txstretch.3369308334 |
|
|
Aug 23 09:36:17 PM UTC 24 |
Aug 23 09:36:20 PM UTC 24 |
521541598 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.989126566 |
|
|
Aug 23 09:36:16 PM UTC 24 |
Aug 23 09:36:20 PM UTC 24 |
2139594442 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_override.3106822748 |
|
|
Aug 23 09:36:18 PM UTC 24 |
Aug 23 09:36:20 PM UTC 24 |
16992923 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.1884798995 |
|
|
Aug 23 09:36:20 PM UTC 24 |
Aug 23 09:36:22 PM UTC 24 |
392482260 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.2190893388 |
|
|
Aug 23 09:35:54 PM UTC 24 |
Aug 23 09:36:24 PM UTC 24 |
5270690467 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.1097450324 |
|
|
Aug 23 09:36:24 PM UTC 24 |
Aug 23 09:36:26 PM UTC 24 |
78284952 ps |
T806 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.1469434714 |
|
|
Aug 23 09:36:20 PM UTC 24 |
Aug 23 09:36:28 PM UTC 24 |
466087791 ps |
T807 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.1842880125 |
|
|
Aug 23 09:36:20 PM UTC 24 |
Aug 23 09:36:29 PM UTC 24 |
175470312 ps |
T808 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.3416722580 |
|
|
Aug 23 09:36:27 PM UTC 24 |
Aug 23 09:36:29 PM UTC 24 |
133460582 ps |
T809 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.264940944 |
|
|
Aug 23 09:36:30 PM UTC 24 |
Aug 23 09:36:39 PM UTC 24 |
1288347588 ps |
T810 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.1012579863 |
|
|
Aug 23 09:36:30 PM UTC 24 |
Aug 23 09:36:41 PM UTC 24 |
11020734728 ps |
T811 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.3080992093 |
|
|
Aug 23 09:35:30 PM UTC 24 |
Aug 23 09:36:45 PM UTC 24 |
1538721529 ps |
T812 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.2455397934 |
|
|
Aug 23 09:34:26 PM UTC 24 |
Aug 23 09:36:46 PM UTC 24 |
55359740620 ps |
T813 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.1027210712 |
|
|
Aug 23 09:36:25 PM UTC 24 |
Aug 23 09:36:47 PM UTC 24 |
536021269 ps |
T814 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_stretch.3570408603 |
|
|
Aug 23 09:36:42 PM UTC 24 |
Aug 23 09:36:49 PM UTC 24 |
4694133303 ps |
T815 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.703717542 |
|
|
Aug 23 09:35:15 PM UTC 24 |
Aug 23 09:36:53 PM UTC 24 |
41622350171 ps |
T816 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1820302312 |
|
|
Aug 23 09:36:05 PM UTC 24 |
Aug 23 09:36:54 PM UTC 24 |
19709233488 ps |
T817 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.4049866991 |
|
|
Aug 23 09:36:53 PM UTC 24 |
Aug 23 09:36:55 PM UTC 24 |
465320827 ps |
T818 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.3842918231 |
|
|
Aug 23 09:36:48 PM UTC 24 |
Aug 23 09:36:56 PM UTC 24 |
4059518091 ps |
T819 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_perf.113032950 |
|
|
Aug 23 09:36:20 PM UTC 24 |
Aug 23 09:36:56 PM UTC 24 |
5350215547 ps |
T820 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.906471646 |
|
|
Aug 23 09:36:54 PM UTC 24 |
Aug 23 09:36:56 PM UTC 24 |
560073907 ps |
T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.3891023672 |
|
|
Aug 23 09:36:46 PM UTC 24 |
Aug 23 09:36:56 PM UTC 24 |
7752143042 ps |
T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_perf.258798475 |
|
|
Aug 23 09:36:55 PM UTC 24 |
Aug 23 09:37:02 PM UTC 24 |
1082002281 ps |
T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.1851524706 |
|
|
Aug 23 09:36:40 PM UTC 24 |
Aug 23 09:37:02 PM UTC 24 |
2124092248 ps |
T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.1621331994 |
|
|
Aug 23 09:37:02 PM UTC 24 |
Aug 23 09:37:05 PM UTC 24 |
356097760 ps |
T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.4245936380 |
|
|
Aug 23 09:37:04 PM UTC 24 |
Aug 23 09:37:07 PM UTC 24 |
1043061018 ps |
T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.2714120758 |
|
|
Aug 23 09:37:04 PM UTC 24 |
Aug 23 09:37:07 PM UTC 24 |
1755135739 ps |
T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_alert_test.3268384883 |
|
|
Aug 23 09:37:08 PM UTC 24 |
Aug 23 09:37:09 PM UTC 24 |
17071916 ps |
T828 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.729426065 |
|
|
Aug 23 09:37:03 PM UTC 24 |
Aug 23 09:37:09 PM UTC 24 |
465432308 ps |
T829 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.2103577437 |
|
|
Aug 23 09:37:06 PM UTC 24 |
Aug 23 09:37:10 PM UTC 24 |
561811820 ps |
T830 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_override.2299265494 |
|
|
Aug 23 09:37:10 PM UTC 24 |
Aug 23 09:37:11 PM UTC 24 |
55444178 ps |
T831 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.674776662 |
|
|
Aug 23 09:36:57 PM UTC 24 |
Aug 23 09:37:12 PM UTC 24 |
1490579934 ps |
T832 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.2719140857 |
|
|
Aug 23 09:38:38 PM UTC 24 |
Aug 23 09:38:42 PM UTC 24 |
569818318 ps |
T833 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.2142117259 |
|
|
Aug 23 09:37:12 PM UTC 24 |
Aug 23 09:37:14 PM UTC 24 |
88208628 ps |
T834 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.1307947787 |
|
|
Aug 23 09:31:12 PM UTC 24 |
Aug 23 09:37:16 PM UTC 24 |
75992473550 ps |
T835 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.726584869 |
|
|
Aug 23 09:36:19 PM UTC 24 |
Aug 23 09:37:19 PM UTC 24 |
4405484859 ps |
T836 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.3088585195 |
|
|
Aug 23 09:37:14 PM UTC 24 |
Aug 23 09:37:20 PM UTC 24 |
231747071 ps |
T837 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.2267782234 |
|
|
Aug 23 09:35:33 PM UTC 24 |
Aug 23 09:37:20 PM UTC 24 |
4556925429 ps |
T838 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_perf.186742411 |
|
|
Aug 23 09:37:17 PM UTC 24 |
Aug 23 09:37:21 PM UTC 24 |
287848703 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.2387086689 |
|
|
Aug 23 09:33:30 PM UTC 24 |
Aug 23 09:37:24 PM UTC 24 |
9146227279 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_error_intr.1531752098 |
|
|
Aug 23 09:37:21 PM UTC 24 |
Aug 23 09:37:26 PM UTC 24 |
260494177 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.1073149909 |
|
|
Aug 23 09:35:30 PM UTC 24 |
Aug 23 09:37:27 PM UTC 24 |
5341438723 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.1287910323 |
|
|
Aug 23 09:37:19 PM UTC 24 |
Aug 23 09:37:27 PM UTC 24 |
490268943 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.982812433 |
|
|
Aug 23 09:34:47 PM UTC 24 |
Aug 23 09:37:31 PM UTC 24 |
60682545203 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.1287136527 |
|
|
Aug 23 09:37:27 PM UTC 24 |
Aug 23 09:37:32 PM UTC 24 |
885668251 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.84135477 |
|
|
Aug 23 09:37:24 PM UTC 24 |
Aug 23 09:37:33 PM UTC 24 |
1314569986 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.2291457531 |
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Aug 23 09:37:21 PM UTC 24 |
Aug 23 09:37:33 PM UTC 24 |
3754955303 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.2055596021 |
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Aug 23 09:37:13 PM UTC 24 |
Aug 23 09:37:34 PM UTC 24 |
865742039 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.1208093943 |
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Aug 23 09:37:28 PM UTC 24 |
Aug 23 09:37:34 PM UTC 24 |
2795070138 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.1070702155 |
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Aug 23 09:37:10 PM UTC 24 |
Aug 23 09:37:34 PM UTC 24 |
5522470882 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.3491634512 |
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Aug 23 09:36:18 PM UTC 24 |
Aug 23 09:37:37 PM UTC 24 |
4274780688 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.2328242468 |
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Aug 23 09:37:35 PM UTC 24 |
Aug 23 09:37:37 PM UTC 24 |
273200314 ps |
T305 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.1479110727 |
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Aug 23 09:37:35 PM UTC 24 |
Aug 23 09:37:37 PM UTC 24 |
1129742038 ps |