T1090 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.2933280323 |
|
|
Aug 23 09:42:45 PM UTC 24 |
Aug 23 09:42:47 PM UTC 24 |
679071903 ps |
T1091 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.3275475458 |
|
|
Aug 23 09:42:42 PM UTC 24 |
Aug 23 09:42:52 PM UTC 24 |
211013573 ps |
T1092 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.2991934179 |
|
|
Aug 23 09:42:45 PM UTC 24 |
Aug 23 09:42:57 PM UTC 24 |
1378911609 ps |
T1093 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.2489539415 |
|
|
Aug 23 09:42:40 PM UTC 24 |
Aug 23 09:42:59 PM UTC 24 |
427328780 ps |
T1094 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.1871642448 |
|
|
Aug 23 09:42:58 PM UTC 24 |
Aug 23 09:43:11 PM UTC 24 |
24963524991 ps |
T1095 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.584165538 |
|
|
Aug 23 09:42:12 PM UTC 24 |
Aug 23 09:43:13 PM UTC 24 |
6150087475 ps |
T1096 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/24.i2c_host_perf.2456416300 |
|
|
Aug 23 09:38:46 PM UTC 24 |
Aug 23 09:43:13 PM UTC 24 |
7772868760 ps |
T1097 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.689765435 |
|
|
Aug 23 09:41:28 PM UTC 24 |
Aug 23 09:43:15 PM UTC 24 |
52382761403 ps |
T1098 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.3614361912 |
|
|
Aug 23 09:42:13 PM UTC 24 |
Aug 23 09:43:15 PM UTC 24 |
3877061340 ps |
T1099 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.1770427227 |
|
|
Aug 23 09:42:04 PM UTC 24 |
Aug 23 09:43:16 PM UTC 24 |
4173958634 ps |
T1100 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.2689320844 |
|
|
Aug 23 09:42:37 PM UTC 24 |
Aug 23 09:43:19 PM UTC 24 |
11006658879 ps |
T1101 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.2610844891 |
|
|
Aug 23 09:43:17 PM UTC 24 |
Aug 23 09:43:19 PM UTC 24 |
231673455 ps |
T1102 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.4040893350 |
|
|
Aug 23 09:43:13 PM UTC 24 |
Aug 23 09:43:20 PM UTC 24 |
9695529232 ps |
T1103 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.227682707 |
|
|
Aug 23 09:43:19 PM UTC 24 |
Aug 23 09:43:22 PM UTC 24 |
285633977 ps |
T1104 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.50452402 |
|
|
Aug 23 09:42:38 PM UTC 24 |
Aug 23 09:43:22 PM UTC 24 |
6811516046 ps |
T1105 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.2074877682 |
|
|
Aug 23 09:43:15 PM UTC 24 |
Aug 23 09:43:23 PM UTC 24 |
2195084930 ps |
T1106 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.2037181634 |
|
|
Aug 23 09:43:12 PM UTC 24 |
Aug 23 09:43:24 PM UTC 24 |
2208839942 ps |
T1107 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_perf.3029815171 |
|
|
Aug 23 09:43:19 PM UTC 24 |
Aug 23 09:43:25 PM UTC 24 |
1298858361 ps |
T1108 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.824164963 |
|
|
Aug 23 09:39:47 PM UTC 24 |
Aug 23 09:43:27 PM UTC 24 |
19182444700 ps |
T1109 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.607937733 |
|
|
Aug 23 09:43:20 PM UTC 24 |
Aug 23 09:43:28 PM UTC 24 |
1235752630 ps |
T1110 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.917812156 |
|
|
Aug 23 09:43:26 PM UTC 24 |
Aug 23 09:43:28 PM UTC 24 |
229782912 ps |
T1111 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3253725261 |
|
|
Aug 23 09:43:25 PM UTC 24 |
Aug 23 09:43:29 PM UTC 24 |
2272450021 ps |
T1112 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.1628200103 |
|
|
Aug 23 09:43:26 PM UTC 24 |
Aug 23 09:43:30 PM UTC 24 |
141979040 ps |
T1113 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1335643476 |
|
|
Aug 23 09:43:28 PM UTC 24 |
Aug 23 09:43:31 PM UTC 24 |
431651796 ps |
T1114 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.2055139018 |
|
|
Aug 23 09:43:30 PM UTC 24 |
Aug 23 09:43:32 PM UTC 24 |
339318405 ps |
T1115 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.4121231097 |
|
|
Aug 23 09:43:29 PM UTC 24 |
Aug 23 09:43:33 PM UTC 24 |
1852283151 ps |
T1116 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.1882880685 |
|
|
Aug 23 09:42:26 PM UTC 24 |
Aug 23 09:43:33 PM UTC 24 |
81695240524 ps |
T1117 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.1741759219 |
|
|
Aug 23 09:43:33 PM UTC 24 |
Aug 23 09:43:35 PM UTC 24 |
521200348 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.1351521488 |
|
|
Aug 23 09:43:24 PM UTC 24 |
Aug 23 09:43:35 PM UTC 24 |
834491476 ps |
T1118 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.941503521 |
|
|
Aug 23 09:42:53 PM UTC 24 |
Aug 23 09:43:36 PM UTC 24 |
5849868748 ps |
T1119 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.3600468352 |
|
|
Aug 23 09:43:34 PM UTC 24 |
Aug 23 09:43:39 PM UTC 24 |
440177610 ps |
T1120 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.757457322 |
|
|
Aug 23 09:42:59 PM UTC 24 |
Aug 23 09:43:39 PM UTC 24 |
1536658106 ps |
T1121 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.2324341877 |
|
|
Aug 23 09:43:34 PM UTC 24 |
Aug 23 09:43:41 PM UTC 24 |
142425387 ps |
T1122 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.2379294888 |
|
|
Aug 23 09:43:39 PM UTC 24 |
Aug 23 09:43:42 PM UTC 24 |
174536280 ps |
T1123 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.1927436946 |
|
|
Aug 23 09:42:42 PM UTC 24 |
Aug 23 09:43:44 PM UTC 24 |
10568059794 ps |
T1124 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.377938522 |
|
|
Aug 23 09:43:14 PM UTC 24 |
Aug 23 09:43:45 PM UTC 24 |
17279269223 ps |
T1125 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.136711958 |
|
|
Aug 23 09:43:36 PM UTC 24 |
Aug 23 09:43:47 PM UTC 24 |
771311313 ps |
T1126 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.3428115640 |
|
|
Aug 23 09:43:36 PM UTC 24 |
Aug 23 09:43:49 PM UTC 24 |
1411890166 ps |
T1127 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.73413290 |
|
|
Aug 23 09:43:46 PM UTC 24 |
Aug 23 09:43:53 PM UTC 24 |
451404601 ps |
T1128 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.2800307562 |
|
|
Aug 23 09:41:15 PM UTC 24 |
Aug 23 09:43:53 PM UTC 24 |
12619285113 ps |
T1129 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.3794928952 |
|
|
Aug 23 09:42:38 PM UTC 24 |
Aug 23 09:43:56 PM UTC 24 |
15592251091 ps |
T1130 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.3834026946 |
|
|
Aug 23 09:43:42 PM UTC 24 |
Aug 23 09:43:57 PM UTC 24 |
4190527672 ps |
T1131 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.4237509766 |
|
|
Aug 23 09:43:48 PM UTC 24 |
Aug 23 09:43:57 PM UTC 24 |
4527209348 ps |
T1132 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.1930204404 |
|
|
Aug 23 09:43:57 PM UTC 24 |
Aug 23 09:43:59 PM UTC 24 |
425894487 ps |
T1133 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.753773089 |
|
|
Aug 23 09:43:58 PM UTC 24 |
Aug 23 09:44:00 PM UTC 24 |
197085276 ps |
T1134 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.1194435689 |
|
|
Aug 23 09:43:54 PM UTC 24 |
Aug 23 09:44:00 PM UTC 24 |
5101622269 ps |
T1135 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.2956951330 |
|
|
Aug 23 09:42:05 PM UTC 24 |
Aug 23 09:44:03 PM UTC 24 |
9820917558 ps |
T1136 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_mode_toggle.1898753802 |
|
|
Aug 23 09:44:01 PM UTC 24 |
Aug 23 09:44:03 PM UTC 24 |
76092722 ps |
T1137 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_perf.1583577300 |
|
|
Aug 23 09:43:58 PM UTC 24 |
Aug 23 09:44:04 PM UTC 24 |
8306922855 ps |
T1138 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.4072804100 |
|
|
Aug 23 09:44:00 PM UTC 24 |
Aug 23 09:44:04 PM UTC 24 |
6269594666 ps |
T1139 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.2407054264 |
|
|
Aug 23 09:44:05 PM UTC 24 |
Aug 23 09:44:08 PM UTC 24 |
124004875 ps |
T1140 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.3705891756 |
|
|
Aug 23 09:44:04 PM UTC 24 |
Aug 23 09:44:08 PM UTC 24 |
896993861 ps |
T1141 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.970791997 |
|
|
Aug 23 09:43:43 PM UTC 24 |
Aug 23 09:44:09 PM UTC 24 |
14282428991 ps |
T1142 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.250362881 |
|
|
Aug 23 09:44:05 PM UTC 24 |
Aug 23 09:44:09 PM UTC 24 |
239090568 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.1565691929 |
|
|
Aug 23 09:44:03 PM UTC 24 |
Aug 23 09:44:11 PM UTC 24 |
535292168 ps |
T1143 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.776944496 |
|
|
Aug 23 09:44:08 PM UTC 24 |
Aug 23 09:44:12 PM UTC 24 |
1741170932 ps |
T1144 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_alert_test.1374472150 |
|
|
Aug 23 09:44:10 PM UTC 24 |
Aug 23 09:44:12 PM UTC 24 |
15680313 ps |
T1145 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.1202777709 |
|
|
Aug 23 09:44:09 PM UTC 24 |
Aug 23 09:44:14 PM UTC 24 |
6460970998 ps |
T1146 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.1175810141 |
|
|
Aug 23 09:44:10 PM UTC 24 |
Aug 23 09:44:14 PM UTC 24 |
465493906 ps |
T1147 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_override.1181899719 |
|
|
Aug 23 09:44:12 PM UTC 24 |
Aug 23 09:44:14 PM UTC 24 |
20734177 ps |
T1148 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.3910762712 |
|
|
Aug 23 09:44:15 PM UTC 24 |
Aug 23 09:44:17 PM UTC 24 |
449305047 ps |
T1149 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.250945774 |
|
|
Aug 23 09:43:50 PM UTC 24 |
Aug 23 09:44:19 PM UTC 24 |
9096744185 ps |
T1150 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.1235656551 |
|
|
Aug 23 09:44:15 PM UTC 24 |
Aug 23 09:44:22 PM UTC 24 |
1632731436 ps |
T1151 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.3781002166 |
|
|
Aug 23 09:44:15 PM UTC 24 |
Aug 23 09:44:23 PM UTC 24 |
182007499 ps |
T1152 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.2417511598 |
|
|
Aug 23 09:44:23 PM UTC 24 |
Aug 23 09:44:27 PM UTC 24 |
83538515 ps |
T1153 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.2941812506 |
|
|
Aug 23 09:38:54 PM UTC 24 |
Aug 23 09:44:30 PM UTC 24 |
41743138849 ps |
T1154 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.3410870838 |
|
|
Aug 23 09:44:28 PM UTC 24 |
Aug 23 09:44:31 PM UTC 24 |
357534853 ps |
T1155 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.2711804088 |
|
|
Aug 23 09:44:12 PM UTC 24 |
Aug 23 09:44:36 PM UTC 24 |
2921962161 ps |
T1156 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.2861608420 |
|
|
Aug 23 09:44:24 PM UTC 24 |
Aug 23 09:44:37 PM UTC 24 |
1813332027 ps |
T1157 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.3054350435 |
|
|
Aug 23 09:43:33 PM UTC 24 |
Aug 23 09:44:41 PM UTC 24 |
2744769209 ps |
T1158 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.239032273 |
|
|
Aug 23 09:44:32 PM UTC 24 |
Aug 23 09:44:43 PM UTC 24 |
3215817990 ps |
T1159 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.2629403657 |
|
|
Aug 23 09:44:14 PM UTC 24 |
Aug 23 09:44:43 PM UTC 24 |
20307881720 ps |
T1160 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.3727987869 |
|
|
Aug 23 09:44:37 PM UTC 24 |
Aug 23 09:44:44 PM UTC 24 |
9950153559 ps |
T1161 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_perf.2606625398 |
|
|
Aug 23 09:44:20 PM UTC 24 |
Aug 23 09:44:49 PM UTC 24 |
3256657245 ps |
T1162 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.3572583192 |
|
|
Aug 23 09:44:44 PM UTC 24 |
Aug 23 09:44:50 PM UTC 24 |
3175266961 ps |
T1163 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.2727996266 |
|
|
Aug 23 09:43:32 PM UTC 24 |
Aug 23 09:44:50 PM UTC 24 |
1995777059 ps |
T1164 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.3410209105 |
|
|
Aug 23 09:45:01 PM UTC 24 |
Aug 23 09:45:19 PM UTC 24 |
7017195155 ps |
T1165 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.324673896 |
|
|
Aug 23 09:44:38 PM UTC 24 |
Aug 23 09:44:52 PM UTC 24 |
855783228 ps |
T1166 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.943970541 |
|
|
Aug 23 09:44:50 PM UTC 24 |
Aug 23 09:44:53 PM UTC 24 |
280985003 ps |
T1167 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.3704591602 |
|
|
Aug 23 09:44:45 PM UTC 24 |
Aug 23 09:44:53 PM UTC 24 |
6487000641 ps |
T1168 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.3871597839 |
|
|
Aug 23 09:44:51 PM UTC 24 |
Aug 23 09:44:53 PM UTC 24 |
156202960 ps |
T1169 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_perf.3696923607 |
|
|
Aug 23 09:43:36 PM UTC 24 |
Aug 23 09:44:54 PM UTC 24 |
8180110386 ps |
T1170 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.256463241 |
|
|
Aug 23 09:43:33 PM UTC 24 |
Aug 23 09:44:54 PM UTC 24 |
7793117598 ps |
T1171 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.2106173668 |
|
|
Aug 23 09:43:47 PM UTC 24 |
Aug 23 09:44:55 PM UTC 24 |
2619878676 ps |
T1172 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_perf.3987873181 |
|
|
Aug 23 09:44:52 PM UTC 24 |
Aug 23 09:44:57 PM UTC 24 |
543230526 ps |
T1173 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_hrst.2470649863 |
|
|
Aug 23 09:44:55 PM UTC 24 |
Aug 23 09:44:58 PM UTC 24 |
829051323 ps |
T1174 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.36856619 |
|
|
Aug 23 09:44:56 PM UTC 24 |
Aug 23 09:44:58 PM UTC 24 |
1160662520 ps |
T1175 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.1967905609 |
|
|
Aug 23 09:44:55 PM UTC 24 |
Aug 23 09:44:58 PM UTC 24 |
1921408252 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.3438724803 |
|
|
Aug 23 09:44:55 PM UTC 24 |
Aug 23 09:44:59 PM UTC 24 |
264761635 ps |
T1176 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.4293499431 |
|
|
Aug 23 09:44:54 PM UTC 24 |
Aug 23 09:44:59 PM UTC 24 |
840760323 ps |
T1177 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.298096168 |
|
|
Aug 23 09:44:58 PM UTC 24 |
Aug 23 09:45:00 PM UTC 24 |
65699086 ps |
T1178 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_alert_test.3801207043 |
|
|
Aug 23 09:45:00 PM UTC 24 |
Aug 23 09:45:02 PM UTC 24 |
17045365 ps |
T1179 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.1479214801 |
|
|
Aug 23 09:44:59 PM UTC 24 |
Aug 23 09:45:02 PM UTC 24 |
855965447 ps |
T1180 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.3949949552 |
|
|
Aug 23 09:44:59 PM UTC 24 |
Aug 23 09:45:02 PM UTC 24 |
490190954 ps |
T1181 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.3434335086 |
|
|
Aug 23 09:44:44 PM UTC 24 |
Aug 23 09:45:14 PM UTC 24 |
16373577872 ps |
T278 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_mode_toggle.3680115733 |
|
|
Aug 23 09:44:55 PM UTC 24 |
Aug 23 09:45:03 PM UTC 24 |
392490093 ps |
T1182 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.843816375 |
|
|
Aug 23 09:44:59 PM UTC 24 |
Aug 23 09:45:03 PM UTC 24 |
2145671881 ps |
T1183 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_override.1638857107 |
|
|
Aug 23 09:45:02 PM UTC 24 |
Aug 23 09:45:04 PM UTC 24 |
46239546 ps |
T1184 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.3819676389 |
|
|
Aug 23 09:45:03 PM UTC 24 |
Aug 23 09:45:05 PM UTC 24 |
204782902 ps |
T1185 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.1584328983 |
|
|
Aug 23 09:44:18 PM UTC 24 |
Aug 23 09:45:07 PM UTC 24 |
5443568257 ps |
T1186 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.2146453543 |
|
|
Aug 23 09:45:07 PM UTC 24 |
Aug 23 09:45:10 PM UTC 24 |
70477823 ps |
T1187 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_host_perf.555525934 |
|
|
Aug 23 09:42:43 PM UTC 24 |
Aug 23 09:45:11 PM UTC 24 |
7825962766 ps |
T1188 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.130529656 |
|
|
Aug 23 09:45:03 PM UTC 24 |
Aug 23 09:45:12 PM UTC 24 |
301394294 ps |
T1189 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.4149217533 |
|
|
Aug 23 09:41:14 PM UTC 24 |
Aug 23 09:45:13 PM UTC 24 |
47744208500 ps |
T1190 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.2567343968 |
|
|
Aug 23 09:45:11 PM UTC 24 |
Aug 23 09:45:14 PM UTC 24 |
68634907 ps |
T1191 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.617885401 |
|
|
Aug 23 09:41:44 PM UTC 24 |
Aug 23 09:45:21 PM UTC 24 |
20762775004 ps |
T1192 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.1708938752 |
|
|
Aug 23 09:44:42 PM UTC 24 |
Aug 23 09:45:22 PM UTC 24 |
2425528291 ps |
T1193 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.1067603848 |
|
|
Aug 23 09:45:14 PM UTC 24 |
Aug 23 09:45:26 PM UTC 24 |
3960768736 ps |
T1194 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.271807723 |
|
|
Aug 23 09:45:22 PM UTC 24 |
Aug 23 09:45:27 PM UTC 24 |
2302673411 ps |
T1195 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.3017841924 |
|
|
Aug 23 09:45:03 PM UTC 24 |
Aug 23 09:45:28 PM UTC 24 |
1072456337 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.1186907453 |
|
|
Aug 23 09:40:15 PM UTC 24 |
Aug 23 09:45:29 PM UTC 24 |
7137880898 ps |
T136 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/38.i2c_host_stress_all.2130971083 |
|
|
Aug 23 09:49:56 PM UTC 24 |
Aug 23 09:51:57 PM UTC 24 |
11618777648 ps |
T1196 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.4264855272 |
|
|
Aug 23 09:45:15 PM UTC 24 |
Aug 23 09:45:30 PM UTC 24 |
8768287924 ps |
T1197 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.2804165784 |
|
|
Aug 23 09:45:29 PM UTC 24 |
Aug 23 09:45:31 PM UTC 24 |
356592224 ps |
T1198 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.3546821877 |
|
|
Aug 23 09:45:30 PM UTC 24 |
Aug 23 09:45:33 PM UTC 24 |
211475735 ps |
T1199 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.3189213949 |
|
|
Aug 23 09:45:27 PM UTC 24 |
Aug 23 09:45:34 PM UTC 24 |
2577237101 ps |
T1200 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_perf.539541029 |
|
|
Aug 23 09:45:31 PM UTC 24 |
Aug 23 09:45:36 PM UTC 24 |
2591365508 ps |
T285 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.2086313269 |
|
|
Aug 23 09:44:53 PM UTC 24 |
Aug 23 09:45:36 PM UTC 24 |
132752024268 ps |
T82 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_mode_toggle.2497813988 |
|
|
Aug 23 09:45:35 PM UTC 24 |
Aug 23 09:45:38 PM UTC 24 |
222133100 ps |
T1201 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.3311833794 |
|
|
Aug 23 09:45:32 PM UTC 24 |
Aug 23 09:45:39 PM UTC 24 |
2342460837 ps |
T1202 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.2265858137 |
|
|
Aug 23 09:45:03 PM UTC 24 |
Aug 23 09:45:39 PM UTC 24 |
2837646422 ps |
T1203 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.3295101050 |
|
|
Aug 23 09:45:10 PM UTC 24 |
Aug 23 09:45:39 PM UTC 24 |
752956119 ps |
T1204 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.4291314626 |
|
|
Aug 23 09:45:37 PM UTC 24 |
Aug 23 09:45:40 PM UTC 24 |
391449019 ps |
T1205 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.1789570127 |
|
|
Aug 23 09:45:38 PM UTC 24 |
Aug 23 09:45:40 PM UTC 24 |
118660161 ps |
T1206 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.1369590075 |
|
|
Aug 23 09:45:15 PM UTC 24 |
Aug 23 09:45:42 PM UTC 24 |
10756768208 ps |
T1207 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.3337749104 |
|
|
Aug 23 09:45:39 PM UTC 24 |
Aug 23 09:45:42 PM UTC 24 |
81451673 ps |
T1208 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.3797747223 |
|
|
Aug 23 09:45:39 PM UTC 24 |
Aug 23 09:45:43 PM UTC 24 |
461392481 ps |
T1209 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.2131666957 |
|
|
Aug 23 09:45:39 PM UTC 24 |
Aug 23 09:45:43 PM UTC 24 |
494651234 ps |
T1210 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.1941637332 |
|
|
Aug 23 09:45:42 PM UTC 24 |
Aug 23 09:45:44 PM UTC 24 |
241077804 ps |
T1211 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_alert_test.304872070 |
|
|
Aug 23 09:45:43 PM UTC 24 |
Aug 23 09:45:44 PM UTC 24 |
15514583 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_override.1598883136 |
|
|
Aug 23 09:45:43 PM UTC 24 |
Aug 23 09:45:44 PM UTC 24 |
96876278 ps |
T1212 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.2257915256 |
|
|
Aug 23 09:45:36 PM UTC 24 |
Aug 23 09:45:45 PM UTC 24 |
6104214928 ps |
T1213 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.85823372 |
|
|
Aug 23 09:45:20 PM UTC 24 |
Aug 23 09:45:45 PM UTC 24 |
3953594543 ps |
T1214 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.366203430 |
|
|
Aug 23 09:45:41 PM UTC 24 |
Aug 23 09:45:45 PM UTC 24 |
528632818 ps |
T1215 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.2414836234 |
|
|
Aug 23 09:45:45 PM UTC 24 |
Aug 23 09:45:47 PM UTC 24 |
761068071 ps |
T1216 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3020253660 |
|
|
Aug 23 09:45:46 PM UTC 24 |
Aug 23 09:45:48 PM UTC 24 |
109372205 ps |
T1217 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.3376208679 |
|
|
Aug 23 09:45:45 PM UTC 24 |
Aug 23 09:45:49 PM UTC 24 |
904011100 ps |
T1218 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.3165522978 |
|
|
Aug 23 09:45:45 PM UTC 24 |
Aug 23 09:45:51 PM UTC 24 |
1527449776 ps |
T1219 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2864814987 |
|
|
Aug 23 09:45:49 PM UTC 24 |
Aug 23 09:45:51 PM UTC 24 |
315808739 ps |
T1220 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.2538716351 |
|
|
Aug 23 09:43:35 PM UTC 24 |
Aug 23 09:45:57 PM UTC 24 |
12130623279 ps |
T1221 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.1270261901 |
|
|
Aug 23 09:45:03 PM UTC 24 |
Aug 23 09:45:58 PM UTC 24 |
14314770408 ps |
T1222 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.682687180 |
|
|
Aug 23 09:45:22 PM UTC 24 |
Aug 23 09:45:58 PM UTC 24 |
4809924802 ps |
T1223 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.2541496660 |
|
|
Aug 23 09:45:48 PM UTC 24 |
Aug 23 09:46:01 PM UTC 24 |
2432000731 ps |
T91 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.2840423811 |
|
|
Aug 23 09:45:52 PM UTC 24 |
Aug 23 09:46:05 PM UTC 24 |
10708705127 ps |
T95 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.2842506258 |
|
|
Aug 23 09:45:58 PM UTC 24 |
Aug 23 09:46:05 PM UTC 24 |
1017597841 ps |
T96 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.2577133706 |
|
|
Aug 23 09:45:57 PM UTC 24 |
Aug 23 09:46:06 PM UTC 24 |
969698543 ps |
T97 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.4131920861 |
|
|
Aug 23 09:45:58 PM UTC 24 |
Aug 23 09:46:06 PM UTC 24 |
2820942969 ps |
T98 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.3477938677 |
|
|
Aug 23 09:46:06 PM UTC 24 |
Aug 23 09:46:09 PM UTC 24 |
735925539 ps |
T99 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.461042520 |
|
|
Aug 23 09:46:07 PM UTC 24 |
Aug 23 09:46:09 PM UTC 24 |
197087559 ps |
T100 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.1818360262 |
|
|
Aug 23 09:46:02 PM UTC 24 |
Aug 23 09:46:13 PM UTC 24 |
9509916369 ps |
T101 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.808254883 |
|
|
Aug 23 09:46:05 PM UTC 24 |
Aug 23 09:46:14 PM UTC 24 |
6113660167 ps |
T102 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_perf.3562696997 |
|
|
Aug 23 09:46:10 PM UTC 24 |
Aug 23 09:46:15 PM UTC 24 |
2453948032 ps |
T103 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.3313778103 |
|
|
Aug 23 09:46:10 PM UTC 24 |
Aug 23 09:46:16 PM UTC 24 |
1981699827 ps |
T1224 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.1823716488 |
|
|
Aug 23 09:46:17 PM UTC 24 |
Aug 23 09:46:19 PM UTC 24 |
200309900 ps |
T1225 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.1568041774 |
|
|
Aug 23 09:46:16 PM UTC 24 |
Aug 23 09:46:21 PM UTC 24 |
1140283938 ps |
T1226 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.1316328993 |
|
|
Aug 23 09:46:20 PM UTC 24 |
Aug 23 09:46:22 PM UTC 24 |
143306906 ps |
T1227 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.3549105228 |
|
|
Aug 23 09:45:04 PM UTC 24 |
Aug 23 09:46:23 PM UTC 24 |
13346680021 ps |
T1228 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.2940220499 |
|
|
Aug 23 09:46:22 PM UTC 24 |
Aug 23 09:46:25 PM UTC 24 |
83192338 ps |
T1229 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.1757051809 |
|
|
Aug 23 09:46:22 PM UTC 24 |
Aug 23 09:46:25 PM UTC 24 |
1755085394 ps |
T1230 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.3507596683 |
|
|
Aug 23 09:46:23 PM UTC 24 |
Aug 23 09:46:26 PM UTC 24 |
989343055 ps |
T1231 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.4194745999 |
|
|
Aug 23 09:46:23 PM UTC 24 |
Aug 23 09:46:27 PM UTC 24 |
1212513599 ps |
T1232 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_alert_test.4200118090 |
|
|
Aug 23 09:46:26 PM UTC 24 |
Aug 23 09:46:28 PM UTC 24 |
22028798 ps |
T1233 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.3782629499 |
|
|
Aug 23 09:46:26 PM UTC 24 |
Aug 23 09:46:29 PM UTC 24 |
141681480 ps |
T1234 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_override.929610505 |
|
|
Aug 23 09:46:27 PM UTC 24 |
Aug 23 09:46:29 PM UTC 24 |
29311698 ps |
T1235 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.477792575 |
|
|
Aug 23 09:46:29 PM UTC 24 |
Aug 23 09:46:31 PM UTC 24 |
455795187 ps |
T1236 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.4263746361 |
|
|
Aug 23 09:45:44 PM UTC 24 |
Aug 23 09:46:32 PM UTC 24 |
2947994336 ps |
T1237 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.105054599 |
|
|
Aug 23 09:45:43 PM UTC 24 |
Aug 23 09:46:33 PM UTC 24 |
2313684537 ps |
T1238 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.1329767018 |
|
|
Aug 23 09:46:29 PM UTC 24 |
Aug 23 09:46:34 PM UTC 24 |
2422916260 ps |
T1239 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.285988081 |
|
|
Aug 23 09:46:34 PM UTC 24 |
Aug 23 09:46:37 PM UTC 24 |
226836110 ps |
T1240 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.4193865778 |
|
|
Aug 23 09:46:32 PM UTC 24 |
Aug 23 09:46:37 PM UTC 24 |
3685178360 ps |
T1241 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.2885892052 |
|
|
Aug 23 09:46:39 PM UTC 24 |
Aug 23 09:46:41 PM UTC 24 |
122756891 ps |
T1242 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.2210971204 |
|
|
Aug 23 09:45:52 PM UTC 24 |
Aug 23 09:46:44 PM UTC 24 |
28724008429 ps |
T1243 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.1420518611 |
|
|
Aug 23 09:45:44 PM UTC 24 |
Aug 23 09:46:48 PM UTC 24 |
2658294972 ps |
T1244 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.598950141 |
|
|
Aug 23 09:46:45 PM UTC 24 |
Aug 23 09:46:53 PM UTC 24 |
652396788 ps |
T1245 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.1238632170 |
|
|
Aug 23 09:46:38 PM UTC 24 |
Aug 23 09:46:54 PM UTC 24 |
3861892672 ps |
T1246 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.3747365396 |
|
|
Aug 23 09:46:54 PM UTC 24 |
Aug 23 09:47:05 PM UTC 24 |
2885549089 ps |
T1247 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.1582907255 |
|
|
Aug 23 09:43:20 PM UTC 24 |
Aug 23 09:47:12 PM UTC 24 |
25636125211 ps |
T1248 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.4188945603 |
|
|
Aug 23 09:47:06 PM UTC 24 |
Aug 23 09:47:13 PM UTC 24 |
908367982 ps |
T1249 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.2927033813 |
|
|
Aug 23 09:47:18 PM UTC 24 |
Aug 23 09:47:20 PM UTC 24 |
249276284 ps |
T1250 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.448920090 |
|
|
Aug 23 09:47:14 PM UTC 24 |
Aug 23 09:47:22 PM UTC 24 |
1900505191 ps |
T1251 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.2454205321 |
|
|
Aug 23 09:47:21 PM UTC 24 |
Aug 23 09:47:24 PM UTC 24 |
637449014 ps |
T1252 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.1945153373 |
|
|
Aug 23 09:45:31 PM UTC 24 |
Aug 23 09:47:25 PM UTC 24 |
15694625922 ps |
T1253 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_perf.1935421722 |
|
|
Aug 23 09:47:22 PM UTC 24 |
Aug 23 09:47:30 PM UTC 24 |
9383683501 ps |
T1254 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.3440984651 |
|
|
Aug 23 09:47:25 PM UTC 24 |
Aug 23 09:47:31 PM UTC 24 |
1802212280 ps |
T1255 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.481306586 |
|
|
Aug 23 09:46:33 PM UTC 24 |
Aug 23 09:47:33 PM UTC 24 |
2426480819 ps |
T1256 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.366505772 |
|
|
Aug 23 09:47:34 PM UTC 24 |
Aug 23 09:47:38 PM UTC 24 |
519696187 ps |
T1257 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.483045064 |
|
|
Aug 23 09:47:33 PM UTC 24 |
Aug 23 09:47:39 PM UTC 24 |
1901176819 ps |
T270 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.1942665438 |
|
|
Aug 23 09:51:20 PM UTC 24 |
Aug 23 09:51:50 PM UTC 24 |
823668548 ps |
T1258 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.2978025271 |
|
|
Aug 23 09:46:26 PM UTC 24 |
Aug 23 09:47:39 PM UTC 24 |
10845484542 ps |
T1259 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.2925603027 |
|
|
Aug 23 09:47:38 PM UTC 24 |
Aug 23 09:47:41 PM UTC 24 |
219247803 ps |
T1260 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.302644445 |
|
|
Aug 23 09:47:13 PM UTC 24 |
Aug 23 09:47:43 PM UTC 24 |
18138137392 ps |
T1261 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.3682201301 |
|
|
Aug 23 09:47:41 PM UTC 24 |
Aug 23 09:47:44 PM UTC 24 |
5222527344 ps |
T1262 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.1977869360 |
|
|
Aug 23 09:47:40 PM UTC 24 |
Aug 23 09:47:44 PM UTC 24 |
256396987 ps |
T1263 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.3034368012 |
|
|
Aug 23 09:47:41 PM UTC 24 |
Aug 23 09:47:44 PM UTC 24 |
991084189 ps |
T1264 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.2646564291 |
|
|
Aug 23 09:44:12 PM UTC 24 |
Aug 23 09:47:45 PM UTC 24 |
4354594358 ps |
T1265 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.737606655 |
|
|
Aug 23 09:47:42 PM UTC 24 |
Aug 23 09:47:45 PM UTC 24 |
607432387 ps |
T1266 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.1976417396 |
|
|
Aug 23 09:47:44 PM UTC 24 |
Aug 23 09:47:46 PM UTC 24 |
169934013 ps |
T1267 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_override.1792266867 |
|
|
Aug 23 09:47:45 PM UTC 24 |
Aug 23 09:47:46 PM UTC 24 |
35725846 ps |
T1268 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_alert_test.1983367190 |
|
|
Aug 23 09:47:45 PM UTC 24 |
Aug 23 09:47:46 PM UTC 24 |
27887122 ps |
T1269 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.1709944802 |
|
|
Aug 23 09:47:47 PM UTC 24 |
Aug 23 09:47:49 PM UTC 24 |
309516847 ps |
T1270 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.1558172783 |
|
|
Aug 23 09:47:47 PM UTC 24 |
Aug 23 09:47:52 PM UTC 24 |
619985463 ps |
T1271 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.2282810697 |
|
|
Aug 23 09:47:47 PM UTC 24 |
Aug 23 09:47:53 PM UTC 24 |
229566718 ps |
T1272 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_perf.2847951523 |
|
|
Aug 23 09:47:53 PM UTC 24 |
Aug 23 09:48:04 PM UTC 24 |
6954731843 ps |
T1273 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_perf.3305543752 |
|
|
Aug 23 09:46:33 PM UTC 24 |
Aug 23 09:48:07 PM UTC 24 |
5052388356 ps |
T1274 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.3725543463 |
|
|
Aug 23 09:48:07 PM UTC 24 |
Aug 23 09:48:10 PM UTC 24 |
96550954 ps |
T1275 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.423409402 |
|
|
Aug 23 09:42:19 PM UTC 24 |
Aug 23 09:48:10 PM UTC 24 |
25718825674 ps |
T1276 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/28.i2c_host_perf.1323168379 |
|
|
Aug 23 09:41:17 PM UTC 24 |
Aug 23 09:48:12 PM UTC 24 |
12379309053 ps |
T1277 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.1221330641 |
|
|
Aug 23 09:45:46 PM UTC 24 |
Aug 23 09:48:13 PM UTC 24 |
40231352057 ps |
T1278 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.1398137234 |
|
|
Aug 23 09:48:04 PM UTC 24 |
Aug 23 09:48:15 PM UTC 24 |
1508084671 ps |
T1279 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.3744555908 |
|
|
Aug 23 09:47:45 PM UTC 24 |
Aug 23 09:48:18 PM UTC 24 |
7958460545 ps |
T1280 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.141943352 |
|
|
Aug 23 09:47:24 PM UTC 24 |
Aug 23 09:48:18 PM UTC 24 |
85645942769 ps |
T1281 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.872306413 |
|
|
Aug 23 09:46:28 PM UTC 24 |
Aug 23 09:48:20 PM UTC 24 |
2127627437 ps |
T1282 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.2351763711 |
|
|
Aug 23 09:48:15 PM UTC 24 |
Aug 23 09:48:22 PM UTC 24 |
3235870401 ps |
T1283 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.778435170 |
|
|
Aug 23 09:48:11 PM UTC 24 |
Aug 23 09:48:23 PM UTC 24 |
3832469584 ps |
T1284 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.892115531 |
|
|
Aug 23 09:46:27 PM UTC 24 |
Aug 23 09:48:24 PM UTC 24 |
11441935494 ps |
T36 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.3960209708 |
|
|
Aug 23 09:51:53 PM UTC 24 |
Aug 23 09:51:56 PM UTC 24 |
477631284 ps |
T1285 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.1424151589 |
|
|
Aug 23 09:48:24 PM UTC 24 |
Aug 23 09:48:26 PM UTC 24 |
348047780 ps |
T1286 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.3388268306 |
|
|
Aug 23 09:48:25 PM UTC 24 |
Aug 23 09:48:27 PM UTC 24 |
218630980 ps |
T1287 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.2302208876 |
|
|
Aug 23 09:48:19 PM UTC 24 |
Aug 23 09:48:27 PM UTC 24 |
1173127332 ps |
T1288 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.702289365 |
|
|
Aug 23 09:48:21 PM UTC 24 |
Aug 23 09:48:28 PM UTC 24 |
5578877369 ps |
T1289 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_perf.1204927876 |
|
|
Aug 23 09:48:27 PM UTC 24 |
Aug 23 09:48:31 PM UTC 24 |
398120214 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/18.i2c_host_stress_all.3868726580 |
|
|
Aug 23 09:33:55 PM UTC 24 |
Aug 23 09:48:31 PM UTC 24 |
16634099634 ps |
T1290 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.2275792775 |
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|
Aug 23 09:48:28 PM UTC 24 |
Aug 23 09:48:34 PM UTC 24 |
2085120410 ps |
T1291 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.4131022458 |
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|
Aug 23 09:48:32 PM UTC 24 |
Aug 23 09:48:35 PM UTC 24 |
161740826 ps |
T1292 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.778605167 |
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|
Aug 23 09:48:32 PM UTC 24 |
Aug 23 09:48:35 PM UTC 24 |
1562581191 ps |
T1293 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.4263244067 |
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|
Aug 23 09:46:10 PM UTC 24 |
Aug 23 09:48:37 PM UTC 24 |
58305438123 ps |
T1294 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.4274209445 |
|
|
Aug 23 09:48:35 PM UTC 24 |
Aug 23 09:48:38 PM UTC 24 |
1629788002 ps |
T1295 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.1884732248 |
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|
Aug 23 09:48:32 PM UTC 24 |
Aug 23 09:48:39 PM UTC 24 |
495650380 ps |
T1296 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.655369579 |
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|
Aug 23 09:48:36 PM UTC 24 |
Aug 23 09:48:40 PM UTC 24 |
2102021410 ps |
T1297 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.2570397317 |
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|
Aug 23 09:49:26 PM UTC 24 |
Aug 23 09:49:31 PM UTC 24 |
595038213 ps |
T1298 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_alert_test.3973096355 |
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|
Aug 23 09:48:39 PM UTC 24 |
Aug 23 09:48:41 PM UTC 24 |
37725069 ps |
T1299 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3597154956 |
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|
Aug 23 09:48:38 PM UTC 24 |
Aug 23 09:48:42 PM UTC 24 |
8126182169 ps |
T1300 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_override.3262823822 |
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|
Aug 23 09:48:41 PM UTC 24 |
Aug 23 09:48:43 PM UTC 24 |
27826546 ps |
T1301 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.336282723 |
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|
Aug 23 09:47:46 PM UTC 24 |
Aug 23 09:48:43 PM UTC 24 |
6811940062 ps |
T1302 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.824017879 |
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|
Aug 23 09:48:35 PM UTC 24 |
Aug 23 09:48:43 PM UTC 24 |
586318069 ps |
T1303 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.1254974351 |
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|
Aug 23 09:48:44 PM UTC 24 |
Aug 23 09:48:46 PM UTC 24 |
232278391 ps |
T1304 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.2583461323 |
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|
Aug 23 09:48:45 PM UTC 24 |
Aug 23 09:48:49 PM UTC 24 |
1488871826 ps |
T1305 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.1534915162 |
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|
Aug 23 09:48:50 PM UTC 24 |
Aug 23 09:48:53 PM UTC 24 |
111743495 ps |
T1306 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.2674757720 |
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|
Aug 23 09:47:46 PM UTC 24 |
Aug 23 09:48:56 PM UTC 24 |
5382258997 ps |
T1307 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.3515819077 |
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|
Aug 23 09:48:27 PM UTC 24 |
Aug 23 09:49:00 PM UTC 24 |
36255404743 ps |
T1308 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.1990869994 |
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|
Aug 23 09:48:57 PM UTC 24 |
Aug 23 09:49:00 PM UTC 24 |
683070681 ps |
T1309 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.3008372160 |
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Aug 23 09:48:44 PM UTC 24 |
Aug 23 09:49:04 PM UTC 24 |
460015580 ps |
T1310 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/34.i2c_host_perf.335051656 |
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Aug 23 09:45:46 PM UTC 24 |
Aug 23 09:49:04 PM UTC 24 |
12707538826 ps |
T1311 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.1410933068 |
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Aug 23 09:48:40 PM UTC 24 |
Aug 23 09:49:07 PM UTC 24 |
4202928680 ps |
T1312 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.2603160709 |
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Aug 23 09:49:08 PM UTC 24 |
Aug 23 09:49:10 PM UTC 24 |
298198876 ps |
T1313 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.2562082446 |
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Aug 23 09:49:01 PM UTC 24 |
Aug 23 09:49:10 PM UTC 24 |
814249278 ps |
T1314 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.1415927207 |
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Aug 23 09:48:54 PM UTC 24 |
Aug 23 09:49:15 PM UTC 24 |
2226350372 ps |
T1315 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.3994632665 |
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Aug 23 09:49:11 PM UTC 24 |
Aug 23 09:49:16 PM UTC 24 |
2310603911 ps |
T1316 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.349866673 |
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Aug 23 09:48:43 PM UTC 24 |
Aug 23 09:49:16 PM UTC 24 |
5942020801 ps |
T1317 |
/workspaces/repo/scratch/os_regression_2024_08_22/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.3455701883 |
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Aug 23 09:48:14 PM UTC 24 |
Aug 23 09:49:19 PM UTC 24 |
7326838697 ps |