T838 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_alert_test.1413524297 |
|
|
Sep 11 05:21:02 AM UTC 24 |
Sep 11 05:21:04 AM UTC 24 |
38197646 ps |
T839 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_override.3157696613 |
|
|
Sep 11 05:21:02 AM UTC 24 |
Sep 11 05:21:04 AM UTC 24 |
23144085 ps |
T840 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.2242874980 |
|
|
Sep 11 05:21:00 AM UTC 24 |
Sep 11 05:21:05 AM UTC 24 |
473215668 ps |
T841 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1157651389 |
|
|
Sep 11 05:21:01 AM UTC 24 |
Sep 11 05:21:05 AM UTC 24 |
2873140091 ps |
T842 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.455888904 |
|
|
Sep 11 05:20:55 AM UTC 24 |
Sep 11 05:21:06 AM UTC 24 |
200927027 ps |
T120 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.895018221 |
|
|
Sep 11 05:20:30 AM UTC 24 |
Sep 11 05:22:00 AM UTC 24 |
4081498433 ps |
T843 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.2086558013 |
|
|
Sep 11 05:21:04 AM UTC 24 |
Sep 11 05:21:07 AM UTC 24 |
1435368497 ps |
T844 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.1457810800 |
|
|
Sep 11 05:20:21 AM UTC 24 |
Sep 11 05:21:07 AM UTC 24 |
32180891232 ps |
T845 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.4109431484 |
|
|
Sep 11 05:21:01 AM UTC 24 |
Sep 11 05:21:07 AM UTC 24 |
2036219698 ps |
T846 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.1906893097 |
|
|
Sep 11 05:19:11 AM UTC 24 |
Sep 11 05:21:08 AM UTC 24 |
18681642981 ps |
T847 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.2416991811 |
|
|
Sep 11 05:19:56 AM UTC 24 |
Sep 11 05:21:09 AM UTC 24 |
8816699627 ps |
T848 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.1695668045 |
|
|
Sep 11 05:19:52 AM UTC 24 |
Sep 11 05:21:09 AM UTC 24 |
1347342518 ps |
T849 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.3741244504 |
|
|
Sep 11 05:19:53 AM UTC 24 |
Sep 11 05:21:09 AM UTC 24 |
3921220479 ps |
T850 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.3590841851 |
|
|
Sep 11 05:21:08 AM UTC 24 |
Sep 11 05:21:10 AM UTC 24 |
94610317 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.623763731 |
|
|
Sep 11 05:21:08 AM UTC 24 |
Sep 11 05:21:14 AM UTC 24 |
2398543122 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.2731809660 |
|
|
Sep 11 05:21:05 AM UTC 24 |
Sep 11 05:21:14 AM UTC 24 |
202446822 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.1488747369 |
|
|
Sep 11 05:21:05 AM UTC 24 |
Sep 11 05:21:20 AM UTC 24 |
1081595661 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.3211157666 |
|
|
Sep 11 05:21:15 AM UTC 24 |
Sep 11 05:21:21 AM UTC 24 |
3210411624 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.4262394977 |
|
|
Sep 11 05:21:10 AM UTC 24 |
Sep 11 05:21:23 AM UTC 24 |
4308041408 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.2293102879 |
|
|
Sep 11 05:20:34 AM UTC 24 |
Sep 11 05:21:24 AM UTC 24 |
1870370197 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.3850025675 |
|
|
Sep 11 05:21:10 AM UTC 24 |
Sep 11 05:21:24 AM UTC 24 |
535096423 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.2823001800 |
|
|
Sep 11 05:21:24 AM UTC 24 |
Sep 11 05:21:27 AM UTC 24 |
1762946344 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.3989321958 |
|
|
Sep 11 05:21:24 AM UTC 24 |
Sep 11 05:21:27 AM UTC 24 |
234467131 ps |
T860 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.1535481758 |
|
|
Sep 11 05:17:08 AM UTC 24 |
Sep 11 05:21:28 AM UTC 24 |
91272545667 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.3073004958 |
|
|
Sep 11 05:21:21 AM UTC 24 |
Sep 11 05:21:33 AM UTC 24 |
4486915963 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_mode_toggle.918476826 |
|
|
Sep 11 05:21:30 AM UTC 24 |
Sep 11 05:21:34 AM UTC 24 |
535258003 ps |
T863 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.1970687766 |
|
|
Sep 11 05:21:29 AM UTC 24 |
Sep 11 05:21:34 AM UTC 24 |
3743566068 ps |
T864 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_perf.3813737084 |
|
|
Sep 11 05:21:25 AM UTC 24 |
Sep 11 05:21:34 AM UTC 24 |
3551936387 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/0.i2c_host_perf.1104839373 |
|
|
Sep 11 05:09:59 AM UTC 24 |
Sep 11 05:21:35 AM UTC 24 |
52772575041 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.293110321 |
|
|
Sep 11 05:21:29 AM UTC 24 |
Sep 11 05:21:38 AM UTC 24 |
4341754306 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.2025867234 |
|
|
Sep 11 05:21:35 AM UTC 24 |
Sep 11 05:21:38 AM UTC 24 |
215305999 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.3036780351 |
|
|
Sep 11 05:21:08 AM UTC 24 |
Sep 11 05:21:38 AM UTC 24 |
658582401 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.2696044440 |
|
|
Sep 11 05:21:34 AM UTC 24 |
Sep 11 05:21:39 AM UTC 24 |
407576976 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.3262499225 |
|
|
Sep 11 05:21:35 AM UTC 24 |
Sep 11 05:21:39 AM UTC 24 |
960701759 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.3397535606 |
|
|
Sep 11 05:20:32 AM UTC 24 |
Sep 11 05:21:40 AM UTC 24 |
8674445419 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.1253046131 |
|
|
Sep 11 05:21:35 AM UTC 24 |
Sep 11 05:21:41 AM UTC 24 |
333110990 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.850497963 |
|
|
Sep 11 05:21:35 AM UTC 24 |
Sep 11 05:21:41 AM UTC 24 |
947293117 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_nack_txstretch.2871155421 |
|
|
Sep 11 05:21:38 AM UTC 24 |
Sep 11 05:21:41 AM UTC 24 |
133299825 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_alert_test.4292422246 |
|
|
Sep 11 05:21:39 AM UTC 24 |
Sep 11 05:21:41 AM UTC 24 |
16123309 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_override.186492955 |
|
|
Sep 11 05:21:40 AM UTC 24 |
Sep 11 05:21:41 AM UTC 24 |
22832808 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.2671194526 |
|
|
Sep 11 05:21:38 AM UTC 24 |
Sep 11 05:21:42 AM UTC 24 |
1132394251 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/48.i2c_target_stress_wr.946688554 |
|
|
Sep 11 05:37:39 AM UTC 24 |
Sep 11 05:42:21 AM UTC 24 |
61287654500 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.467553969 |
|
|
Sep 11 05:21:42 AM UTC 24 |
Sep 11 05:21:44 AM UTC 24 |
106885009 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.3536192419 |
|
|
Sep 11 05:14:30 AM UTC 24 |
Sep 11 05:21:49 AM UTC 24 |
58076987666 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.1701350443 |
|
|
Sep 11 05:21:42 AM UTC 24 |
Sep 11 05:21:50 AM UTC 24 |
144792194 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.1016374731 |
|
|
Sep 11 05:21:45 AM UTC 24 |
Sep 11 05:21:50 AM UTC 24 |
339002025 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.634243548 |
|
|
Sep 11 05:21:42 AM UTC 24 |
Sep 11 05:21:50 AM UTC 24 |
347305106 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.277508934 |
|
|
Sep 11 05:21:30 AM UTC 24 |
Sep 11 05:21:51 AM UTC 24 |
543523418 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.2890725749 |
|
|
Sep 11 05:21:04 AM UTC 24 |
Sep 11 05:21:52 AM UTC 24 |
1899560337 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.1759996883 |
|
|
Sep 11 05:16:51 AM UTC 24 |
Sep 11 05:21:53 AM UTC 24 |
74288730026 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.1235354457 |
|
|
Sep 11 05:21:50 AM UTC 24 |
Sep 11 05:21:54 AM UTC 24 |
165828716 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.3151485458 |
|
|
Sep 11 05:13:37 AM UTC 24 |
Sep 11 05:21:54 AM UTC 24 |
27261485447 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1813850770 |
|
|
Sep 11 05:21:15 AM UTC 24 |
Sep 11 05:22:01 AM UTC 24 |
19955129718 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.1179473521 |
|
|
Sep 11 05:21:45 AM UTC 24 |
Sep 11 05:22:01 AM UTC 24 |
2177866762 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.4231269628 |
|
|
Sep 11 05:21:11 AM UTC 24 |
Sep 11 05:22:02 AM UTC 24 |
4807990482 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.2890841417 |
|
|
Sep 11 05:21:55 AM UTC 24 |
Sep 11 05:22:03 AM UTC 24 |
3645301394 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.2854217266 |
|
|
Sep 11 05:22:01 AM UTC 24 |
Sep 11 05:22:04 AM UTC 24 |
264056064 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2280694732 |
|
|
Sep 11 05:22:01 AM UTC 24 |
Sep 11 05:22:04 AM UTC 24 |
1060146358 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/47.i2c_host_fifo_full.1386933210 |
|
|
Sep 11 05:36:50 AM UTC 24 |
Sep 11 05:40:39 AM UTC 24 |
14887762281 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.1914498336 |
|
|
Sep 11 05:15:41 AM UTC 24 |
Sep 11 05:22:07 AM UTC 24 |
95118645397 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.884046602 |
|
|
Sep 11 05:21:55 AM UTC 24 |
Sep 11 05:22:08 AM UTC 24 |
1355412756 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_mode_toggle.240174765 |
|
|
Sep 11 05:22:04 AM UTC 24 |
Sep 11 05:22:09 AM UTC 24 |
161940671 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.3240899185 |
|
|
Sep 11 05:21:02 AM UTC 24 |
Sep 11 05:22:09 AM UTC 24 |
2617532533 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.944697457 |
|
|
Sep 11 05:22:08 AM UTC 24 |
Sep 11 05:22:10 AM UTC 24 |
98673374 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.2153925371 |
|
|
Sep 11 05:22:07 AM UTC 24 |
Sep 11 05:22:12 AM UTC 24 |
779033450 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/9.i2c_host_perf.1813428242 |
|
|
Sep 11 05:12:36 AM UTC 24 |
Sep 11 05:22:12 AM UTC 24 |
18372154030 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.759510414 |
|
|
Sep 11 05:23:06 AM UTC 24 |
Sep 11 05:23:17 AM UTC 24 |
7208656789 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_perf.3428776915 |
|
|
Sep 11 05:22:02 AM UTC 24 |
Sep 11 05:22:13 AM UTC 24 |
2868421313 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.568268557 |
|
|
Sep 11 05:22:05 AM UTC 24 |
Sep 11 05:22:14 AM UTC 24 |
655105777 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.3480332908 |
|
|
Sep 11 05:22:10 AM UTC 24 |
Sep 11 05:22:14 AM UTC 24 |
127042214 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.1846825862 |
|
|
Sep 11 05:22:10 AM UTC 24 |
Sep 11 05:22:15 AM UTC 24 |
519024444 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_alert_test.1563896216 |
|
|
Sep 11 05:22:13 AM UTC 24 |
Sep 11 05:22:15 AM UTC 24 |
39997192 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.3398742757 |
|
|
Sep 11 05:19:08 AM UTC 24 |
Sep 11 05:22:15 AM UTC 24 |
7756649905 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.699131079 |
|
|
Sep 11 05:22:10 AM UTC 24 |
Sep 11 05:22:16 AM UTC 24 |
616661361 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.1857885154 |
|
|
Sep 11 05:22:11 AM UTC 24 |
Sep 11 05:22:16 AM UTC 24 |
428864265 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.2760647034 |
|
|
Sep 11 05:22:13 AM UTC 24 |
Sep 11 05:22:16 AM UTC 24 |
270806824 ps |
T87 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.673143065 |
|
|
Sep 11 05:21:51 AM UTC 24 |
Sep 11 05:22:16 AM UTC 24 |
966517564 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.826860690 |
|
|
Sep 11 05:22:03 AM UTC 24 |
Sep 11 05:22:16 AM UTC 24 |
1372720933 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_override.4110405768 |
|
|
Sep 11 05:22:15 AM UTC 24 |
Sep 11 05:22:18 AM UTC 24 |
77570368 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1867466684 |
|
|
Sep 11 05:19:35 AM UTC 24 |
Sep 11 05:22:19 AM UTC 24 |
22543454592 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3337558550 |
|
|
Sep 11 05:22:16 AM UTC 24 |
Sep 11 05:22:20 AM UTC 24 |
111916331 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.1507097376 |
|
|
Sep 11 05:21:06 AM UTC 24 |
Sep 11 05:22:23 AM UTC 24 |
2613318290 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.2703390045 |
|
|
Sep 11 05:22:16 AM UTC 24 |
Sep 11 05:22:23 AM UTC 24 |
543140448 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.2131432600 |
|
|
Sep 11 05:22:18 AM UTC 24 |
Sep 11 05:22:24 AM UTC 24 |
395511960 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.164544536 |
|
|
Sep 11 05:22:19 AM UTC 24 |
Sep 11 05:22:24 AM UTC 24 |
1810591851 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.3462369852 |
|
|
Sep 11 05:22:16 AM UTC 24 |
Sep 11 05:22:27 AM UTC 24 |
1573118578 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.3248326512 |
|
|
Sep 11 05:22:18 AM UTC 24 |
Sep 11 05:22:31 AM UTC 24 |
9787254530 ps |
T42 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/0.i2c_host_stress_all.3195437248 |
|
|
Sep 11 05:10:02 AM UTC 24 |
Sep 11 05:22:32 AM UTC 24 |
203505422072 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.2530308608 |
|
|
Sep 11 05:22:25 AM UTC 24 |
Sep 11 05:22:34 AM UTC 24 |
2698148030 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.4206763210 |
|
|
Sep 11 05:22:21 AM UTC 24 |
Sep 11 05:22:35 AM UTC 24 |
720711017 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_perf.3143987868 |
|
|
Sep 11 05:21:07 AM UTC 24 |
Sep 11 05:22:36 AM UTC 24 |
6166236264 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.2901605000 |
|
|
Sep 11 05:23:07 AM UTC 24 |
Sep 11 05:23:19 AM UTC 24 |
1550836846 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.3378487035 |
|
|
Sep 11 05:21:55 AM UTC 24 |
Sep 11 05:22:37 AM UTC 24 |
17750750565 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/47.i2c_target_stress_all.3491263930 |
|
|
Sep 11 05:37:18 AM UTC 24 |
Sep 11 05:41:06 AM UTC 24 |
26389477481 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.3538335758 |
|
|
Sep 11 05:22:34 AM UTC 24 |
Sep 11 05:22:38 AM UTC 24 |
881741299 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.2850480853 |
|
|
Sep 11 05:22:36 AM UTC 24 |
Sep 11 05:22:38 AM UTC 24 |
399524361 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.2630977339 |
|
|
Sep 11 05:22:24 AM UTC 24 |
Sep 11 05:22:40 AM UTC 24 |
668335069 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.3416429688 |
|
|
Sep 11 05:22:27 AM UTC 24 |
Sep 11 05:22:40 AM UTC 24 |
9566259315 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.2813921709 |
|
|
Sep 11 05:22:32 AM UTC 24 |
Sep 11 05:22:42 AM UTC 24 |
1534544229 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3856368258 |
|
|
Sep 11 05:22:41 AM UTC 24 |
Sep 11 05:22:44 AM UTC 24 |
604213102 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_perf.4018757062 |
|
|
Sep 11 05:21:43 AM UTC 24 |
Sep 11 05:22:45 AM UTC 24 |
5678412814 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.891215751 |
|
|
Sep 11 05:22:42 AM UTC 24 |
Sep 11 05:22:45 AM UTC 24 |
1428087170 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_perf.2685705025 |
|
|
Sep 11 05:22:37 AM UTC 24 |
Sep 11 05:22:48 AM UTC 24 |
942009215 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.3492715655 |
|
|
Sep 11 05:21:42 AM UTC 24 |
Sep 11 05:22:48 AM UTC 24 |
8383884212 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.3864957301 |
|
|
Sep 11 05:21:51 AM UTC 24 |
Sep 11 05:22:48 AM UTC 24 |
2338502338 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.3225652363 |
|
|
Sep 11 05:22:45 AM UTC 24 |
Sep 11 05:22:49 AM UTC 24 |
527345159 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.1509789938 |
|
|
Sep 11 05:22:41 AM UTC 24 |
Sep 11 05:22:50 AM UTC 24 |
384015158 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_alert_test.1323110871 |
|
|
Sep 11 05:22:49 AM UTC 24 |
Sep 11 05:22:50 AM UTC 24 |
17567562 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.880423916 |
|
|
Sep 11 05:23:14 AM UTC 24 |
Sep 11 05:23:18 AM UTC 24 |
447285709 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.2803970866 |
|
|
Sep 11 05:22:14 AM UTC 24 |
Sep 11 05:22:51 AM UTC 24 |
6571830771 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.2713930432 |
|
|
Sep 11 05:22:46 AM UTC 24 |
Sep 11 05:22:52 AM UTC 24 |
2831449669 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_override.1367917699 |
|
|
Sep 11 05:22:50 AM UTC 24 |
Sep 11 05:22:52 AM UTC 24 |
15341533 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.2206881856 |
|
|
Sep 11 05:22:03 AM UTC 24 |
Sep 11 05:22:52 AM UTC 24 |
24798189910 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.501894099 |
|
|
Sep 11 05:22:46 AM UTC 24 |
Sep 11 05:22:52 AM UTC 24 |
922982752 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.3622911860 |
|
|
Sep 11 05:22:25 AM UTC 24 |
Sep 11 05:22:53 AM UTC 24 |
3988605259 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.1171309272 |
|
|
Sep 11 05:22:51 AM UTC 24 |
Sep 11 05:22:54 AM UTC 24 |
141561685 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.3713474056 |
|
|
Sep 11 05:22:38 AM UTC 24 |
Sep 11 05:22:54 AM UTC 24 |
7110727244 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.573036940 |
|
|
Sep 11 05:20:43 AM UTC 24 |
Sep 11 05:23:00 AM UTC 24 |
15463128004 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.1666385045 |
|
|
Sep 11 05:21:39 AM UTC 24 |
Sep 11 05:23:03 AM UTC 24 |
1834268990 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.2293608713 |
|
|
Sep 11 05:22:52 AM UTC 24 |
Sep 11 05:23:04 AM UTC 24 |
819080434 ps |
T24 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_stress_all.44158908 |
|
|
Sep 11 05:21:09 AM UTC 24 |
Sep 11 05:41:10 AM UTC 24 |
15722753840 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.1905781752 |
|
|
Sep 11 05:22:52 AM UTC 24 |
Sep 11 05:23:06 AM UTC 24 |
674117193 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.3470076233 |
|
|
Sep 11 05:22:58 AM UTC 24 |
Sep 11 05:23:06 AM UTC 24 |
16889656738 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.590733123 |
|
|
Sep 11 05:22:56 AM UTC 24 |
Sep 11 05:23:08 AM UTC 24 |
3510881304 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.2283868899 |
|
|
Sep 11 05:22:54 AM UTC 24 |
Sep 11 05:23:10 AM UTC 24 |
474993510 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.326786246 |
|
|
Sep 11 05:23:04 AM UTC 24 |
Sep 11 05:23:10 AM UTC 24 |
4038253365 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.1760453983 |
|
|
Sep 11 05:22:53 AM UTC 24 |
Sep 11 05:23:12 AM UTC 24 |
2760642281 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.3369042814 |
|
|
Sep 11 05:23:10 AM UTC 24 |
Sep 11 05:23:13 AM UTC 24 |
204536822 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.625363964 |
|
|
Sep 11 05:23:09 AM UTC 24 |
Sep 11 05:23:13 AM UTC 24 |
215709825 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.220648275 |
|
|
Sep 11 05:22:49 AM UTC 24 |
Sep 11 05:23:13 AM UTC 24 |
2236311962 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.2565539160 |
|
|
Sep 11 05:23:05 AM UTC 24 |
Sep 11 05:23:13 AM UTC 24 |
2460638733 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_perf.2913462608 |
|
|
Sep 11 05:23:11 AM UTC 24 |
Sep 11 05:23:18 AM UTC 24 |
3434900094 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.2563955561 |
|
|
Sep 11 05:23:18 AM UTC 24 |
Sep 11 05:23:21 AM UTC 24 |
553613226 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.348812056 |
|
|
Sep 11 05:23:18 AM UTC 24 |
Sep 11 05:23:21 AM UTC 24 |
147024965 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.714896121 |
|
|
Sep 11 05:23:12 AM UTC 24 |
Sep 11 05:23:22 AM UTC 24 |
1765874821 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_alert_test.4081903821 |
|
|
Sep 11 05:23:21 AM UTC 24 |
Sep 11 05:23:23 AM UTC 24 |
16455397 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.1573236746 |
|
|
Sep 11 05:21:03 AM UTC 24 |
Sep 11 05:23:23 AM UTC 24 |
24684313979 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.1833698235 |
|
|
Sep 11 05:23:20 AM UTC 24 |
Sep 11 05:23:24 AM UTC 24 |
145461859 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_override.1943706838 |
|
|
Sep 11 05:23:22 AM UTC 24 |
Sep 11 05:23:24 AM UTC 24 |
15902242 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.4165180256 |
|
|
Sep 11 05:23:19 AM UTC 24 |
Sep 11 05:23:25 AM UTC 24 |
1093492346 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.3619368213 |
|
|
Sep 11 05:23:20 AM UTC 24 |
Sep 11 05:23:26 AM UTC 24 |
2349452814 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.2109204225 |
|
|
Sep 11 05:23:19 AM UTC 24 |
Sep 11 05:23:26 AM UTC 24 |
1957430281 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.2559481612 |
|
|
Sep 11 05:23:25 AM UTC 24 |
Sep 11 05:23:27 AM UTC 24 |
418150384 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.3596657012 |
|
|
Sep 11 05:23:14 AM UTC 24 |
Sep 11 05:23:28 AM UTC 24 |
258994948 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.3161375685 |
|
|
Sep 11 05:22:53 AM UTC 24 |
Sep 11 05:23:31 AM UTC 24 |
642555327 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.4213972506 |
|
|
Sep 11 05:23:26 AM UTC 24 |
Sep 11 05:23:33 AM UTC 24 |
142600964 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.1100913204 |
|
|
Sep 11 05:16:05 AM UTC 24 |
Sep 11 05:23:33 AM UTC 24 |
42590007712 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2138659242 |
|
|
Sep 11 05:23:01 AM UTC 24 |
Sep 11 05:23:34 AM UTC 24 |
727019412 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.1285403081 |
|
|
Sep 11 05:23:26 AM UTC 24 |
Sep 11 05:23:37 AM UTC 24 |
380306697 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.3810032807 |
|
|
Sep 11 05:22:15 AM UTC 24 |
Sep 11 05:23:39 AM UTC 24 |
5928625225 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.3849219928 |
|
|
Sep 11 05:23:31 AM UTC 24 |
Sep 11 05:23:39 AM UTC 24 |
158823955 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.2821731499 |
|
|
Sep 11 05:23:40 AM UTC 24 |
Sep 11 05:23:44 AM UTC 24 |
3119074042 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.2397097194 |
|
|
Sep 11 05:23:22 AM UTC 24 |
Sep 11 05:23:46 AM UTC 24 |
1191435578 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3518213063 |
|
|
Sep 11 05:22:51 AM UTC 24 |
Sep 11 05:23:47 AM UTC 24 |
3992397482 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_perf.689455853 |
|
|
Sep 11 05:23:27 AM UTC 24 |
Sep 11 05:23:48 AM UTC 24 |
426533038 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.820216689 |
|
|
Sep 11 05:23:34 AM UTC 24 |
Sep 11 05:23:48 AM UTC 24 |
3151862395 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.1348065060 |
|
|
Sep 11 05:21:41 AM UTC 24 |
Sep 11 05:23:48 AM UTC 24 |
5250560286 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.1650719068 |
|
|
Sep 11 05:23:48 AM UTC 24 |
Sep 11 05:23:52 AM UTC 24 |
245908239 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.1083329427 |
|
|
Sep 11 05:23:49 AM UTC 24 |
Sep 11 05:23:52 AM UTC 24 |
353417853 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.730740664 |
|
|
Sep 11 05:23:40 AM UTC 24 |
Sep 11 05:23:53 AM UTC 24 |
5395304011 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.3819512837 |
|
|
Sep 11 05:13:03 AM UTC 24 |
Sep 11 05:23:53 AM UTC 24 |
45122320942 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.139136154 |
|
|
Sep 11 05:23:45 AM UTC 24 |
Sep 11 05:23:54 AM UTC 24 |
2451838190 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/49.i2c_host_fifo_watermark.557081122 |
|
|
Sep 11 05:38:03 AM UTC 24 |
Sep 11 05:39:38 AM UTC 24 |
36821386915 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_perf.4018186365 |
|
|
Sep 11 05:23:49 AM UTC 24 |
Sep 11 05:23:55 AM UTC 24 |
1291123687 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.1783764058 |
|
|
Sep 11 05:23:55 AM UTC 24 |
Sep 11 05:23:57 AM UTC 24 |
100614982 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.1556700784 |
|
|
Sep 11 05:22:17 AM UTC 24 |
Sep 11 05:23:59 AM UTC 24 |
13278826745 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.1020784627 |
|
|
Sep 11 05:23:50 AM UTC 24 |
Sep 11 05:23:59 AM UTC 24 |
864584952 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.3190435935 |
|
|
Sep 11 05:23:55 AM UTC 24 |
Sep 11 05:24:00 AM UTC 24 |
379274297 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.1351370660 |
|
|
Sep 11 05:23:57 AM UTC 24 |
Sep 11 05:24:02 AM UTC 24 |
539840703 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.914588550 |
|
|
Sep 11 05:23:54 AM UTC 24 |
Sep 11 05:24:03 AM UTC 24 |
1324681459 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_alert_test.3410279709 |
|
|
Sep 11 05:24:01 AM UTC 24 |
Sep 11 05:24:03 AM UTC 24 |
15128040 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.391709046 |
|
|
Sep 11 05:23:58 AM UTC 24 |
Sep 11 05:24:04 AM UTC 24 |
5253511319 ps |
T50 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.2227487195 |
|
|
Sep 11 05:24:00 AM UTC 24 |
Sep 11 05:24:04 AM UTC 24 |
1137751892 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_override.2895645303 |
|
|
Sep 11 05:24:03 AM UTC 24 |
Sep 11 05:24:05 AM UTC 24 |
46532906 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3253377960 |
|
|
Sep 11 05:24:06 AM UTC 24 |
Sep 11 05:24:09 AM UTC 24 |
715422850 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.3054539258 |
|
|
Sep 11 05:23:29 AM UTC 24 |
Sep 11 05:24:10 AM UTC 24 |
889572622 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.1655199804 |
|
|
Sep 11 05:23:57 AM UTC 24 |
Sep 11 05:24:11 AM UTC 24 |
1080114556 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.244418690 |
|
|
Sep 11 05:21:43 AM UTC 24 |
Sep 11 05:24:12 AM UTC 24 |
10892417463 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.738049329 |
|
|
Sep 11 05:22:23 AM UTC 24 |
Sep 11 05:24:12 AM UTC 24 |
50775388817 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.717288601 |
|
|
Sep 11 05:23:39 AM UTC 24 |
Sep 11 05:24:13 AM UTC 24 |
1455893072 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.701459635 |
|
|
Sep 11 05:24:11 AM UTC 24 |
Sep 11 05:24:14 AM UTC 24 |
126577518 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.489858553 |
|
|
Sep 11 05:22:38 AM UTC 24 |
Sep 11 05:24:14 AM UTC 24 |
47011997113 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.737230443 |
|
|
Sep 11 05:24:12 AM UTC 24 |
Sep 11 05:24:16 AM UTC 24 |
120937987 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.1164498695 |
|
|
Sep 11 05:18:12 AM UTC 24 |
Sep 11 05:24:18 AM UTC 24 |
5875448593 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.1802922006 |
|
|
Sep 11 05:23:41 AM UTC 24 |
Sep 11 05:24:19 AM UTC 24 |
15487687571 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.1537835590 |
|
|
Sep 11 05:24:07 AM UTC 24 |
Sep 11 05:24:19 AM UTC 24 |
682071901 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_perf.480644411 |
|
|
Sep 11 05:22:53 AM UTC 24 |
Sep 11 05:24:23 AM UTC 24 |
7185965009 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.3319632846 |
|
|
Sep 11 05:24:14 AM UTC 24 |
Sep 11 05:24:23 AM UTC 24 |
571424137 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.1491942361 |
|
|
Sep 11 05:24:14 AM UTC 24 |
Sep 11 05:24:24 AM UTC 24 |
2384338421 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/47.i2c_host_fifo_overflow.1154531472 |
|
|
Sep 11 05:36:46 AM UTC 24 |
Sep 11 05:39:40 AM UTC 24 |
2610763020 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.670781752 |
|
|
Sep 11 05:24:19 AM UTC 24 |
Sep 11 05:24:25 AM UTC 24 |
583968772 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.3796325383 |
|
|
Sep 11 05:20:51 AM UTC 24 |
Sep 11 05:24:26 AM UTC 24 |
73255439693 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.412411647 |
|
|
Sep 11 05:24:24 AM UTC 24 |
Sep 11 05:24:26 AM UTC 24 |
142419294 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.2052769887 |
|
|
Sep 11 05:24:12 AM UTC 24 |
Sep 11 05:24:27 AM UTC 24 |
2580236147 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.3619941225 |
|
|
Sep 11 05:24:25 AM UTC 24 |
Sep 11 05:24:28 AM UTC 24 |
648231959 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.578258605 |
|
|
Sep 11 05:24:06 AM UTC 24 |
Sep 11 05:24:28 AM UTC 24 |
1420047928 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.44271574 |
|
|
Sep 11 05:24:27 AM UTC 24 |
Sep 11 05:24:31 AM UTC 24 |
839109631 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.857562433 |
|
|
Sep 11 05:24:30 AM UTC 24 |
Sep 11 05:24:32 AM UTC 24 |
89387480 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.311425775 |
|
|
Sep 11 05:24:20 AM UTC 24 |
Sep 11 05:24:32 AM UTC 24 |
2670573102 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.263919708 |
|
|
Sep 11 05:24:28 AM UTC 24 |
Sep 11 05:24:32 AM UTC 24 |
838148058 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.1574143733 |
|
|
Sep 11 05:24:27 AM UTC 24 |
Sep 11 05:24:34 AM UTC 24 |
2334271622 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.723380044 |
|
|
Sep 11 05:24:33 AM UTC 24 |
Sep 11 05:24:39 AM UTC 24 |
1963202576 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.2147790407 |
|
|
Sep 11 05:24:28 AM UTC 24 |
Sep 11 05:24:35 AM UTC 24 |
1051121569 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.3255510422 |
|
|
Sep 11 05:24:32 AM UTC 24 |
Sep 11 05:24:36 AM UTC 24 |
133493578 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.3584396048 |
|
|
Sep 11 05:24:32 AM UTC 24 |
Sep 11 05:24:36 AM UTC 24 |
492111072 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_alert_test.1685297198 |
|
|
Sep 11 05:24:35 AM UTC 24 |
Sep 11 05:24:37 AM UTC 24 |
44359125 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.704070140 |
|
|
Sep 11 05:23:34 AM UTC 24 |
Sep 11 05:24:37 AM UTC 24 |
54947735055 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.1863231231 |
|
|
Sep 11 05:24:34 AM UTC 24 |
Sep 11 05:24:37 AM UTC 24 |
527337190 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.39539995 |
|
|
Sep 11 05:24:33 AM UTC 24 |
Sep 11 05:24:38 AM UTC 24 |
1624748194 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_override.1540699960 |
|
|
Sep 11 05:24:36 AM UTC 24 |
Sep 11 05:24:38 AM UTC 24 |
30722683 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.558908883 |
|
|
Sep 11 05:24:02 AM UTC 24 |
Sep 11 05:24:38 AM UTC 24 |
6705517502 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/49.i2c_host_fifo_full.3017697268 |
|
|
Sep 11 05:38:07 AM UTC 24 |
Sep 11 05:39:58 AM UTC 24 |
3645735876 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.2331730710 |
|
|
Sep 11 05:23:25 AM UTC 24 |
Sep 11 05:24:39 AM UTC 24 |
3121601959 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_perf.3486275793 |
|
|
Sep 11 05:24:26 AM UTC 24 |
Sep 11 05:24:40 AM UTC 24 |
1055317606 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.202964670 |
|
|
Sep 11 05:24:38 AM UTC 24 |
Sep 11 05:24:41 AM UTC 24 |
508345928 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.1166460704 |
|
|
Sep 11 05:24:41 AM UTC 24 |
Sep 11 05:24:46 AM UTC 24 |
255011285 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.2004552500 |
|
|
Sep 11 05:24:40 AM UTC 24 |
Sep 11 05:24:50 AM UTC 24 |
136513639 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.108821151 |
|
|
Sep 11 05:22:15 AM UTC 24 |
Sep 11 05:24:53 AM UTC 24 |
2569875977 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.1754729334 |
|
|
Sep 11 05:22:50 AM UTC 24 |
Sep 11 05:24:54 AM UTC 24 |
10064356064 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.3100196137 |
|
|
Sep 11 05:24:38 AM UTC 24 |
Sep 11 05:24:54 AM UTC 24 |
468539495 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.1551235607 |
|
|
Sep 11 05:24:47 AM UTC 24 |
Sep 11 05:24:57 AM UTC 24 |
570607375 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.1952521576 |
|
|
Sep 11 05:24:20 AM UTC 24 |
Sep 11 05:24:59 AM UTC 24 |
17230553036 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.18988138 |
|
|
Sep 11 05:24:41 AM UTC 24 |
Sep 11 05:25:01 AM UTC 24 |
14152697391 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.4087075908 |
|
|
Sep 11 05:25:00 AM UTC 24 |
Sep 11 05:25:03 AM UTC 24 |
410817782 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.1992716579 |
|
|
Sep 11 05:23:25 AM UTC 24 |
Sep 11 05:25:04 AM UTC 24 |
2672563550 ps |
T1056 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.2845559606 |
|
|
Sep 11 05:25:02 AM UTC 24 |
Sep 11 05:25:05 AM UTC 24 |
226014025 ps |
T1057 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.3864016061 |
|
|
Sep 11 05:24:55 AM UTC 24 |
Sep 11 05:25:05 AM UTC 24 |
4676433314 ps |
T1058 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.1265987714 |
|
|
Sep 11 05:24:54 AM UTC 24 |
Sep 11 05:25:09 AM UTC 24 |
5617930701 ps |
T1059 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_hrst.4159771154 |
|
|
Sep 11 05:25:06 AM UTC 24 |
Sep 11 05:25:10 AM UTC 24 |
1103366742 ps |
T1060 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.1759749049 |
|
|
Sep 11 05:24:58 AM UTC 24 |
Sep 11 05:25:12 AM UTC 24 |
2281498744 ps |
T1061 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.2618454461 |
|
|
Sep 11 05:25:25 AM UTC 24 |
Sep 11 05:26:23 AM UTC 24 |
10579443574 ps |
T1062 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_perf.742730251 |
|
|
Sep 11 05:25:03 AM UTC 24 |
Sep 11 05:25:12 AM UTC 24 |
788597020 ps |
T1063 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.1342379927 |
|
|
Sep 11 05:25:10 AM UTC 24 |
Sep 11 05:25:14 AM UTC 24 |
905683822 ps |
T1064 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.3985716970 |
|
|
Sep 11 05:25:11 AM UTC 24 |
Sep 11 05:25:14 AM UTC 24 |
115594940 ps |
T1065 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.340061038 |
|
|
Sep 11 05:25:12 AM UTC 24 |
Sep 11 05:25:16 AM UTC 24 |
80785779 ps |
T1066 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.219433007 |
|
|
Sep 11 05:25:12 AM UTC 24 |
Sep 11 05:25:17 AM UTC 24 |
424558427 ps |
T1067 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.2047824536 |
|
|
Sep 11 05:25:05 AM UTC 24 |
Sep 11 05:25:18 AM UTC 24 |
6061938518 ps |
T1068 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_alert_test.949465783 |
|
|
Sep 11 05:25:18 AM UTC 24 |
Sep 11 05:25:20 AM UTC 24 |
30535768 ps |
T1069 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.704835018 |
|
|
Sep 11 05:25:17 AM UTC 24 |
Sep 11 05:25:20 AM UTC 24 |
142166168 ps |
T1070 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.1984702022 |
|
|
Sep 11 05:25:15 AM UTC 24 |
Sep 11 05:25:20 AM UTC 24 |
2033362437 ps |
T1071 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.3829870947 |
|
|
Sep 11 05:25:16 AM UTC 24 |
Sep 11 05:25:22 AM UTC 24 |
3362023149 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_override.1423031757 |
|
|
Sep 11 05:25:21 AM UTC 24 |
Sep 11 05:25:23 AM UTC 24 |
56662445 ps |
T1072 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.3140488500 |
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Sep 11 05:24:53 AM UTC 24 |
Sep 11 05:25:24 AM UTC 24 |
984736269 ps |
T1073 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.3393878280 |
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Sep 11 05:25:22 AM UTC 24 |
Sep 11 05:25:25 AM UTC 24 |
376318135 ps |
T1074 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.3418282083 |
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Sep 11 05:23:27 AM UTC 24 |
Sep 11 05:25:27 AM UTC 24 |
2277046763 ps |
T1075 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.4073728585 |
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Sep 11 05:24:05 AM UTC 24 |
Sep 11 05:25:27 AM UTC 24 |
8488050263 ps |
T1076 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_perf.4126335518 |
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Sep 11 05:24:10 AM UTC 24 |
Sep 11 05:25:29 AM UTC 24 |
5206738564 ps |
T1077 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.2365156663 |
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Sep 11 05:25:24 AM UTC 24 |
Sep 11 05:25:31 AM UTC 24 |
571467512 ps |
T1078 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.1766317737 |
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Sep 11 05:25:29 AM UTC 24 |
Sep 11 05:25:32 AM UTC 24 |
282968043 ps |
T1079 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_perf.2318646322 |
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Sep 11 05:25:28 AM UTC 24 |
Sep 11 05:25:32 AM UTC 24 |
229062017 ps |