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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.23 97.21 89.54 97.22 72.02 94.26 98.44 89.89


Total test records in report: 1853
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html

T1080 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.4137804225 Sep 11 05:23:28 AM UTC 24 Sep 11 05:25:33 AM UTC 24 2525682507 ps
T1081 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.1341707660 Sep 11 05:24:55 AM UTC 24 Sep 11 05:25:34 AM UTC 24 4348435143 ps
T1082 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.3236143757 Sep 11 05:22:52 AM UTC 24 Sep 11 05:25:35 AM UTC 24 5062864836 ps
T1083 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.3952339971 Sep 11 05:25:24 AM UTC 24 Sep 11 05:25:35 AM UTC 24 2999673737 ps
T1084 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.2162392841 Sep 11 05:24:35 AM UTC 24 Sep 11 05:25:38 AM UTC 24 2764645458 ps
T1085 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.1824573365 Sep 11 05:25:32 AM UTC 24 Sep 11 05:25:39 AM UTC 24 238298515 ps
T1086 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.4227954726 Sep 11 05:25:10 AM UTC 24 Sep 11 05:25:42 AM UTC 24 591559857 ps
T1087 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.3138700011 Sep 11 05:25:36 AM UTC 24 Sep 11 05:25:43 AM UTC 24 1439061927 ps
T1088 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.1730249164 Sep 11 05:25:04 AM UTC 24 Sep 11 05:25:46 AM UTC 24 22684192968 ps
T1089 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.2840660096 Sep 11 05:26:09 AM UTC 24 Sep 11 05:26:23 AM UTC 24 2664193204 ps
T1090 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.3419449570 Sep 11 05:25:30 AM UTC 24 Sep 11 05:25:47 AM UTC 24 783309868 ps
T1091 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.66891411 Sep 11 05:21:51 AM UTC 24 Sep 11 05:25:48 AM UTC 24 45402166931 ps
T1092 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.2538077880 Sep 11 05:25:19 AM UTC 24 Sep 11 05:25:48 AM UTC 24 1517654197 ps
T1093 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.3555497915 Sep 11 05:25:44 AM UTC 24 Sep 11 05:25:48 AM UTC 24 191609086 ps
T1094 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.3145270368 Sep 11 05:25:46 AM UTC 24 Sep 11 05:25:49 AM UTC 24 451138622 ps
T1095 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.3663149204 Sep 11 05:25:33 AM UTC 24 Sep 11 05:25:49 AM UTC 24 1741862871 ps
T1096 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.4235039983 Sep 11 05:25:39 AM UTC 24 Sep 11 05:25:51 AM UTC 24 1373590070 ps
T1097 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.501004594 Sep 11 05:25:50 AM UTC 24 Sep 11 05:25:53 AM UTC 24 57018227 ps
T1098 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.1247517046 Sep 11 05:25:50 AM UTC 24 Sep 11 05:25:55 AM UTC 24 332767337 ps
T1099 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.1187423377 Sep 11 05:25:49 AM UTC 24 Sep 11 05:25:56 AM UTC 24 3907792871 ps
T1100 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.1747422980 Sep 11 05:25:34 AM UTC 24 Sep 11 05:25:57 AM UTC 24 10339802210 ps
T1101 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_perf.3039169231 Sep 11 05:25:47 AM UTC 24 Sep 11 05:25:57 AM UTC 24 774757330 ps
T1102 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.4096337272 Sep 11 05:25:52 AM UTC 24 Sep 11 05:25:57 AM UTC 24 102500698 ps
T1103 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.4069203048 Sep 11 05:25:52 AM UTC 24 Sep 11 05:25:57 AM UTC 24 822893304 ps
T121 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.1910556251 Sep 11 05:24:04 AM UTC 24 Sep 11 05:25:57 AM UTC 24 5129752054 ps
T1104 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.1999367204 Sep 11 05:25:49 AM UTC 24 Sep 11 05:25:57 AM UTC 24 1749779193 ps
T1105 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.3149960633 Sep 11 05:25:53 AM UTC 24 Sep 11 05:25:58 AM UTC 24 488890181 ps
T1106 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_override.448610980 Sep 11 05:25:58 AM UTC 24 Sep 11 05:26:00 AM UTC 24 26799512 ps
T1107 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_alert_test.1195559065 Sep 11 05:25:58 AM UTC 24 Sep 11 05:26:00 AM UTC 24 74309733 ps
T1108 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.3130366310 Sep 11 05:25:57 AM UTC 24 Sep 11 05:26:00 AM UTC 24 236353562 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.1972407790 Sep 11 05:25:55 AM UTC 24 Sep 11 05:26:00 AM UTC 24 488113101 ps
T1109 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.3661400803 Sep 11 05:25:59 AM UTC 24 Sep 11 05:26:02 AM UTC 24 186110131 ps
T1110 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.2701678196 Sep 11 05:25:39 AM UTC 24 Sep 11 05:26:02 AM UTC 24 23369221948 ps
T1111 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.4049658164 Sep 11 05:24:38 AM UTC 24 Sep 11 05:26:05 AM UTC 24 2399418709 ps
T1112 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.2110310655 Sep 11 05:26:08 AM UTC 24 Sep 11 05:39:32 AM UTC 24 49490993096 ps
T1113 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.358070684 Sep 11 05:25:21 AM UTC 24 Sep 11 05:26:07 AM UTC 24 1753580264 ps
T1114 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3363683933 Sep 11 05:26:04 AM UTC 24 Sep 11 05:26:08 AM UTC 24 131753119 ps
T1115 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.765250827 Sep 11 05:26:00 AM UTC 24 Sep 11 05:26:08 AM UTC 24 191987768 ps
T1116 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.2470509352 Sep 11 05:25:36 AM UTC 24 Sep 11 05:26:08 AM UTC 24 1964133956 ps
T1117 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1003144320 Sep 11 05:26:02 AM UTC 24 Sep 11 05:26:15 AM UTC 24 570594751 ps
T1118 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.1875182262 Sep 11 05:26:09 AM UTC 24 Sep 11 05:26:17 AM UTC 24 5452482094 ps
T1119 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.2388505163 Sep 11 05:10:54 AM UTC 24 Sep 11 05:26:19 AM UTC 24 43838984884 ps
T1120 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.3996518493 Sep 11 05:25:59 AM UTC 24 Sep 11 05:26:26 AM UTC 24 1762199483 ps
T1121 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.1131325711 Sep 11 05:26:23 AM UTC 24 Sep 11 05:26:26 AM UTC 24 188534117 ps
T1122 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.760488331 Sep 11 05:26:18 AM UTC 24 Sep 11 05:26:27 AM UTC 24 4153349320 ps
T1123 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.861610566 Sep 11 05:26:08 AM UTC 24 Sep 11 05:26:27 AM UTC 24 1947444897 ps
T1124 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.3347855308 Sep 11 05:26:23 AM UTC 24 Sep 11 05:26:27 AM UTC 24 236388854 ps
T1125 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.2722205930 Sep 11 05:27:49 AM UTC 24 Sep 11 05:27:56 AM UTC 24 4563155196 ps
T1126 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_mode_toggle.1499806913 Sep 11 05:26:28 AM UTC 24 Sep 11 05:26:32 AM UTC 24 469939875 ps
T1127 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.2517174412 Sep 11 05:26:32 AM UTC 24 Sep 11 05:26:35 AM UTC 24 93794581 ps
T1128 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_perf.3805574656 Sep 11 05:26:26 AM UTC 24 Sep 11 05:26:36 AM UTC 24 1245424521 ps
T1129 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.487258923 Sep 11 05:26:32 AM UTC 24 Sep 11 05:26:37 AM UTC 24 1839358773 ps
T1130 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.1226323954 Sep 11 05:26:28 AM UTC 24 Sep 11 05:26:39 AM UTC 24 4597835173 ps
T1131 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.458239280 Sep 11 05:26:09 AM UTC 24 Sep 11 05:26:40 AM UTC 24 5683066468 ps
T1132 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.1914497266 Sep 11 05:26:36 AM UTC 24 Sep 11 05:26:41 AM UTC 24 5172777064 ps
T1133 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/17.i2c_host_perf.1937181343 Sep 11 05:16:32 AM UTC 24 Sep 11 05:26:42 AM UTC 24 27511602959 ps
T1134 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.1638462275 Sep 11 05:24:07 AM UTC 24 Sep 11 05:26:42 AM UTC 24 10054996861 ps
T1135 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.3150192379 Sep 11 05:26:38 AM UTC 24 Sep 11 05:26:43 AM UTC 24 2579941518 ps
T1136 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_alert_test.3508213931 Sep 11 05:26:41 AM UTC 24 Sep 11 05:26:43 AM UTC 24 18268238 ps
T1137 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.3943548995 Sep 11 05:26:37 AM UTC 24 Sep 11 05:26:43 AM UTC 24 2297384539 ps
T1138 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.46812515 Sep 11 05:26:39 AM UTC 24 Sep 11 05:26:43 AM UTC 24 140361847 ps
T1139 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.3779193885 Sep 11 05:26:35 AM UTC 24 Sep 11 05:26:44 AM UTC 24 410859939 ps
T1140 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.3469734838 Sep 11 05:26:28 AM UTC 24 Sep 11 05:26:45 AM UTC 24 1136135542 ps
T1141 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_override.4228716907 Sep 11 05:26:43 AM UTC 24 Sep 11 05:26:45 AM UTC 24 18745000 ps
T1142 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.3127797779 Sep 11 05:26:44 AM UTC 24 Sep 11 05:26:47 AM UTC 24 520808093 ps
T1143 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.2589836112 Sep 11 05:26:44 AM UTC 24 Sep 11 05:26:49 AM UTC 24 115004425 ps
T1144 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.1871904697 Sep 11 05:25:58 AM UTC 24 Sep 11 05:26:50 AM UTC 24 4155339621 ps
T1145 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.4272758267 Sep 11 05:26:45 AM UTC 24 Sep 11 05:26:51 AM UTC 24 73907383 ps
T1146 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.2254302339 Sep 11 05:26:49 AM UTC 24 Sep 11 05:26:53 AM UTC 24 73466673 ps
T1147 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.1690369824 Sep 11 05:26:44 AM UTC 24 Sep 11 05:26:55 AM UTC 24 318757868 ps
T1148 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.1472106342 Sep 11 05:24:40 AM UTC 24 Sep 11 05:26:55 AM UTC 24 12725617401 ps
T1149 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.1326427094 Sep 11 05:26:56 AM UTC 24 Sep 11 05:27:05 AM UTC 24 1896583971 ps
T1150 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.1790714264 Sep 11 05:25:35 AM UTC 24 Sep 11 05:27:05 AM UTC 24 7508764391 ps
T1151 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.1405547397 Sep 11 05:26:42 AM UTC 24 Sep 11 05:27:06 AM UTC 24 1368031376 ps
T1152 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.2574043295 Sep 11 05:26:56 AM UTC 24 Sep 11 05:27:08 AM UTC 24 551767981 ps
T1153 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.662280520 Sep 11 05:35:38 AM UTC 24 Sep 11 05:35:48 AM UTC 24 3641999097 ps
T1154 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.3147399533 Sep 11 05:27:06 AM UTC 24 Sep 11 05:27:13 AM UTC 24 2022465724 ps
T1155 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.3351716631 Sep 11 05:11:05 AM UTC 24 Sep 11 05:27:13 AM UTC 24 53581492326 ps
T1156 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.835384265 Sep 11 05:26:27 AM UTC 24 Sep 11 05:27:14 AM UTC 24 5285015666 ps
T1157 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.2852705266 Sep 11 05:27:13 AM UTC 24 Sep 11 05:27:16 AM UTC 24 247545836 ps
T1158 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.788522204 Sep 11 05:27:13 AM UTC 24 Sep 11 05:27:17 AM UTC 24 712246618 ps
T1159 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.1636867468 Sep 11 05:27:07 AM UTC 24 Sep 11 05:27:19 AM UTC 24 1330675416 ps
T1160 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_perf.902060906 Sep 11 05:27:14 AM UTC 24 Sep 11 05:27:24 AM UTC 24 2518547994 ps
T1161 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.883003615 Sep 11 05:26:52 AM UTC 24 Sep 11 05:27:24 AM UTC 24 1662843662 ps
T1162 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.579563968 Sep 11 05:27:21 AM UTC 24 Sep 11 05:27:26 AM UTC 24 1641113897 ps
T1163 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.1052014817 Sep 11 05:24:51 AM UTC 24 Sep 11 05:27:26 AM UTC 24 38864369002 ps
T1164 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.1470530981 Sep 11 05:27:17 AM UTC 24 Sep 11 05:27:26 AM UTC 24 8070717066 ps
T1165 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_target_smoke.2357896670 Sep 11 05:35:31 AM UTC 24 Sep 11 05:35:47 AM UTC 24 4548462360 ps
T1166 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.445616504 Sep 11 05:26:47 AM UTC 24 Sep 11 05:27:27 AM UTC 24 661024449 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.806947573 Sep 11 05:27:20 AM UTC 24 Sep 11 05:27:28 AM UTC 24 2710016247 ps
T1167 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.2519364689 Sep 11 05:26:00 AM UTC 24 Sep 11 05:27:28 AM UTC 24 2723655489 ps
T1168 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.127964295 Sep 11 05:27:25 AM UTC 24 Sep 11 05:27:29 AM UTC 24 132027932 ps
T1169 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.3023713457 Sep 11 05:25:21 AM UTC 24 Sep 11 05:27:29 AM UTC 24 4620286684 ps
T1170 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.3182108556 Sep 11 05:27:25 AM UTC 24 Sep 11 05:27:31 AM UTC 24 152607885 ps
T1171 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_alert_test.1814271320 Sep 11 05:27:28 AM UTC 24 Sep 11 05:27:31 AM UTC 24 16939346 ps
T1172 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_override.3341404049 Sep 11 05:27:29 AM UTC 24 Sep 11 05:27:31 AM UTC 24 19969157 ps
T1173 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.2661164234 Sep 11 05:26:45 AM UTC 24 Sep 11 05:27:31 AM UTC 24 7627897585 ps
T1174 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_nack_txstretch.3060877548 Sep 11 05:27:28 AM UTC 24 Sep 11 05:27:31 AM UTC 24 134494546 ps
T1175 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.3085784062 Sep 11 05:27:27 AM UTC 24 Sep 11 05:27:32 AM UTC 24 466600968 ps
T1176 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.3659623176 Sep 11 05:27:27 AM UTC 24 Sep 11 05:27:32 AM UTC 24 2636742597 ps
T1177 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.1962982456 Sep 11 05:27:27 AM UTC 24 Sep 11 05:27:33 AM UTC 24 447127684 ps
T1178 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.1839392285 Sep 11 05:26:54 AM UTC 24 Sep 11 05:27:34 AM UTC 24 23010053936 ps
T1179 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.3186692637 Sep 11 05:24:40 AM UTC 24 Sep 11 05:27:35 AM UTC 24 5793480837 ps
T1180 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.58813684 Sep 11 05:27:32 AM UTC 24 Sep 11 05:27:35 AM UTC 24 102173695 ps
T1181 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.716731390 Sep 11 05:21:25 AM UTC 24 Sep 11 05:27:36 AM UTC 24 55412226504 ps
T1182 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_perf.1646179833 Sep 11 05:27:32 AM UTC 24 Sep 11 05:27:37 AM UTC 24 1198231599 ps
T1183 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.1691231381 Sep 11 05:27:34 AM UTC 24 Sep 11 05:27:38 AM UTC 24 242868355 ps
T1184 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.2136715914 Sep 11 05:27:32 AM UTC 24 Sep 11 05:27:44 AM UTC 24 753617473 ps
T1185 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.3500658697 Sep 11 05:27:06 AM UTC 24 Sep 11 05:27:44 AM UTC 24 11526291029 ps
T1186 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.2574300080 Sep 11 05:27:33 AM UTC 24 Sep 11 05:27:47 AM UTC 24 2839314876 ps
T1187 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.3618287705 Sep 11 05:27:41 AM UTC 24 Sep 11 05:27:47 AM UTC 24 4905380011 ps
T1188 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.2469843389 Sep 11 05:27:45 AM UTC 24 Sep 11 05:27:48 AM UTC 24 129648336 ps
T1189 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.2318385463 Sep 11 05:27:39 AM UTC 24 Sep 11 05:27:48 AM UTC 24 1849720501 ps
T1190 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/49.i2c_target_stress_wr.1872485646 Sep 11 05:38:16 AM UTC 24 Sep 11 05:39:18 AM UTC 24 28259089687 ps
T1191 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.485837524 Sep 11 05:27:32 AM UTC 24 Sep 11 05:27:48 AM UTC 24 964335047 ps
T1192 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.3159776473 Sep 11 05:27:48 AM UTC 24 Sep 11 05:27:51 AM UTC 24 141327162 ps
T1193 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.1826535047 Sep 11 05:27:33 AM UTC 24 Sep 11 05:27:52 AM UTC 24 2987730057 ps
T1194 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.2002472884 Sep 11 05:26:44 AM UTC 24 Sep 11 05:27:54 AM UTC 24 10310410128 ps
T1195 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_hrst.3928628483 Sep 11 05:27:50 AM UTC 24 Sep 11 05:27:54 AM UTC 24 612849315 ps
T1196 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.3752051378 Sep 11 05:27:36 AM UTC 24 Sep 11 05:27:55 AM UTC 24 4884445197 ps
T1197 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.2147522313 Sep 11 05:27:43 AM UTC 24 Sep 11 05:27:56 AM UTC 24 5247866892 ps
T1198 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.628079144 Sep 11 05:27:54 AM UTC 24 Sep 11 05:27:57 AM UTC 24 117908856 ps
T1199 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_perf.1801116503 Sep 11 05:27:48 AM UTC 24 Sep 11 05:27:57 AM UTC 24 698724324 ps
T1200 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.1264965444 Sep 11 05:27:53 AM UTC 24 Sep 11 05:27:58 AM UTC 24 2181888450 ps
T1201 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.3885953354 Sep 11 05:27:55 AM UTC 24 Sep 11 05:27:59 AM UTC 24 90607202 ps
T1202 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_alert_test.2171565378 Sep 11 05:27:57 AM UTC 24 Sep 11 05:27:59 AM UTC 24 17065643 ps
T1203 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.3680753417 Sep 11 05:27:56 AM UTC 24 Sep 11 05:28:00 AM UTC 24 463368807 ps
T1204 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.510188681 Sep 11 05:27:55 AM UTC 24 Sep 11 05:28:00 AM UTC 24 829841883 ps
T1205 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.1516764086 Sep 11 05:27:57 AM UTC 24 Sep 11 05:28:01 AM UTC 24 144143811 ps
T1206 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.4044334628 Sep 11 05:27:52 AM UTC 24 Sep 11 05:28:01 AM UTC 24 787008002 ps
T1207 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_override.443675162 Sep 11 05:27:59 AM UTC 24 Sep 11 05:28:01 AM UTC 24 44377387 ps
T1208 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.2215825899 Sep 11 05:28:01 AM UTC 24 Sep 11 05:28:03 AM UTC 24 126519672 ps
T1209 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.858134398 Sep 11 05:27:57 AM UTC 24 Sep 11 05:28:04 AM UTC 24 559035471 ps
T1210 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_perf.2641940946 Sep 11 05:26:01 AM UTC 24 Sep 11 05:28:11 AM UTC 24 30594738650 ps
T1211 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1911903889 Sep 11 05:28:01 AM UTC 24 Sep 11 05:28:12 AM UTC 24 374318650 ps
T1212 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.1072654873 Sep 11 05:28:02 AM UTC 24 Sep 11 05:28:12 AM UTC 24 147608219 ps
T1213 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2211023163 Sep 11 05:28:11 AM UTC 24 Sep 11 05:28:15 AM UTC 24 469059826 ps
T1214 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.2342978834 Sep 11 05:25:58 AM UTC 24 Sep 11 05:28:19 AM UTC 24 9218809319 ps
T1215 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3432931853 Sep 11 05:28:04 AM UTC 24 Sep 11 05:28:22 AM UTC 24 5973025796 ps
T1216 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.963994549 Sep 11 05:27:38 AM UTC 24 Sep 11 05:28:35 AM UTC 24 5959658203 ps
T1217 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.3539311215 Sep 11 05:28:23 AM UTC 24 Sep 11 05:28:35 AM UTC 24 4380562072 ps
T122 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.3893605934 Sep 11 05:26:43 AM UTC 24 Sep 11 05:28:40 AM UTC 24 4905989692 ps
T1218 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.202466628 Sep 11 05:27:58 AM UTC 24 Sep 11 05:28:42 AM UTC 24 6648266820 ps
T1219 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.819695397 Sep 11 05:26:15 AM UTC 24 Sep 11 05:28:43 AM UTC 24 21912368799 ps
T1220 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.3186796823 Sep 11 05:27:29 AM UTC 24 Sep 11 05:28:44 AM UTC 24 7322334270 ps
T1221 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.3292168476 Sep 11 05:28:36 AM UTC 24 Sep 11 05:28:46 AM UTC 24 7971686268 ps
T1222 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.382962209 Sep 11 05:28:44 AM UTC 24 Sep 11 05:28:46 AM UTC 24 162331424 ps
T88 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.2910267336 Sep 11 05:28:13 AM UTC 24 Sep 11 05:28:47 AM UTC 24 3492316066 ps
T1223 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.363751727 Sep 11 05:28:05 AM UTC 24 Sep 11 05:28:48 AM UTC 24 713625182 ps
T1224 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.2275906517 Sep 11 05:28:37 AM UTC 24 Sep 11 05:28:48 AM UTC 24 5519417918 ps
T1225 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.3179644706 Sep 11 05:28:45 AM UTC 24 Sep 11 05:28:49 AM UTC 24 212156651 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/27.i2c_host_stress_all.2131174599 Sep 11 05:23:33 AM UTC 24 Sep 11 05:28:51 AM UTC 24 24828078619 ps
T1226 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_hrst.3872679627 Sep 11 05:28:47 AM UTC 24 Sep 11 05:28:52 AM UTC 24 1430588483 ps
T1227 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.401283099 Sep 11 05:25:48 AM UTC 24 Sep 11 05:28:53 AM UTC 24 25895096172 ps
T1228 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.131141013 Sep 11 05:28:50 AM UTC 24 Sep 11 05:28:54 AM UTC 24 1454921861 ps
T1229 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.3279221759 Sep 11 05:28:41 AM UTC 24 Sep 11 05:28:54 AM UTC 24 4545787996 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.1790396931 Sep 11 05:28:49 AM UTC 24 Sep 11 05:28:55 AM UTC 24 1256197516 ps
T1230 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.2298811527 Sep 11 05:28:52 AM UTC 24 Sep 11 05:28:55 AM UTC 24 163321203 ps
T1231 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.2507385674 Sep 11 05:28:20 AM UTC 24 Sep 11 05:28:55 AM UTC 24 619537755 ps
T1232 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.187692302 Sep 11 05:27:30 AM UTC 24 Sep 11 05:28:57 AM UTC 24 1483830633 ps
T1233 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_perf.2980147106 Sep 11 05:28:46 AM UTC 24 Sep 11 05:28:57 AM UTC 24 944041084 ps
T1234 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.1420812075 Sep 11 05:28:54 AM UTC 24 Sep 11 05:28:58 AM UTC 24 342137622 ps
T1235 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_alert_test.4021012144 Sep 11 05:28:56 AM UTC 24 Sep 11 05:28:58 AM UTC 24 18797534 ps
T1236 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.2225696925 Sep 11 05:28:47 AM UTC 24 Sep 11 05:28:58 AM UTC 24 843291036 ps
T1237 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_perf.3030866734 Sep 11 05:28:02 AM UTC 24 Sep 11 05:28:59 AM UTC 24 3169653004 ps
T1238 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.1881844578 Sep 11 05:25:58 AM UTC 24 Sep 11 05:28:59 AM UTC 24 10887585826 ps
T1239 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_perf.418747923 Sep 11 05:24:40 AM UTC 24 Sep 11 05:28:59 AM UTC 24 47464008112 ps
T1240 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.4076431481 Sep 11 05:28:55 AM UTC 24 Sep 11 05:28:59 AM UTC 24 1091841088 ps
T1241 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.1874844803 Sep 11 05:35:35 AM UTC 24 Sep 11 05:35:47 AM UTC 24 1174321765 ps
T1242 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.77900769 Sep 11 05:28:56 AM UTC 24 Sep 11 05:28:59 AM UTC 24 147422853 ps
T1243 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_override.678433164 Sep 11 05:28:57 AM UTC 24 Sep 11 05:28:59 AM UTC 24 24450469 ps
T1244 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.2271192373 Sep 11 05:28:55 AM UTC 24 Sep 11 05:29:00 AM UTC 24 568776490 ps
T1245 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.2736314355 Sep 11 05:28:59 AM UTC 24 Sep 11 05:29:01 AM UTC 24 82621646 ps
T1246 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.1390432671 Sep 11 05:27:38 AM UTC 24 Sep 11 05:29:03 AM UTC 24 7070633761 ps
T1247 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.4224099166 Sep 11 05:27:15 AM UTC 24 Sep 11 05:29:04 AM UTC 24 35850879494 ps
T1248 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.1933177274 Sep 11 05:29:00 AM UTC 24 Sep 11 05:29:04 AM UTC 24 86749741 ps
T1249 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.2511629381 Sep 11 05:29:00 AM UTC 24 Sep 11 05:29:09 AM UTC 24 1099303053 ps
T1250 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.118131277 Sep 11 05:29:03 AM UTC 24 Sep 11 05:29:10 AM UTC 24 1035830134 ps
T1251 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.2056455519 Sep 11 05:29:00 AM UTC 24 Sep 11 05:29:11 AM UTC 24 844304486 ps
T1252 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.3724387488 Sep 11 05:29:05 AM UTC 24 Sep 11 05:29:12 AM UTC 24 2877896604 ps
T1253 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.3483350500 Sep 11 05:28:53 AM UTC 24 Sep 11 05:29:12 AM UTC 24 1221976409 ps
T1254 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.1361973041 Sep 11 05:29:13 AM UTC 24 Sep 11 05:29:16 AM UTC 24 147038679 ps
T1255 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.4069154068 Sep 11 05:29:00 AM UTC 24 Sep 11 05:29:16 AM UTC 24 1406324313 ps
T1256 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.2656635451 Sep 11 05:29:13 AM UTC 24 Sep 11 05:29:16 AM UTC 24 648353574 ps
T1257 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.578408 Sep 11 05:27:36 AM UTC 24 Sep 11 05:29:19 AM UTC 24 47265633341 ps
T1258 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.1933417939 Sep 11 05:28:56 AM UTC 24 Sep 11 05:29:19 AM UTC 24 2440732689 ps
T1259 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.622108449 Sep 11 05:29:17 AM UTC 24 Sep 11 05:29:20 AM UTC 24 208842314 ps
T1260 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_perf.4257249960 Sep 11 05:29:15 AM UTC 24 Sep 11 05:29:22 AM UTC 24 2920262245 ps
T1261 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.2214578505 Sep 11 05:29:11 AM UTC 24 Sep 11 05:29:23 AM UTC 24 1441228994 ps
T1262 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.3109741788 Sep 11 05:29:21 AM UTC 24 Sep 11 05:29:24 AM UTC 24 234460062 ps
T1263 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.1191769446 Sep 11 05:29:19 AM UTC 24 Sep 11 05:29:24 AM UTC 24 767642170 ps
T1264 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.1377615736 Sep 11 05:29:19 AM UTC 24 Sep 11 05:29:27 AM UTC 24 424336897 ps
T1265 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.1219588427 Sep 11 05:29:01 AM UTC 24 Sep 11 05:29:27 AM UTC 24 1308570677 ps
T1266 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.3860072826 Sep 11 05:29:16 AM UTC 24 Sep 11 05:29:28 AM UTC 24 4262896440 ps
T1267 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.3014260548 Sep 11 05:29:24 AM UTC 24 Sep 11 05:29:29 AM UTC 24 1759633988 ps
T1268 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.3399870478 Sep 11 05:29:25 AM UTC 24 Sep 11 05:29:29 AM UTC 24 1100986206 ps
T1269 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_alert_test.2257506853 Sep 11 05:29:28 AM UTC 24 Sep 11 05:29:30 AM UTC 24 38126400 ps
T1270 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.3226625396 Sep 11 05:29:25 AM UTC 24 Sep 11 05:29:31 AM UTC 24 8995410460 ps
T1271 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_override.2064794470 Sep 11 05:29:29 AM UTC 24 Sep 11 05:29:31 AM UTC 24 36012357 ps
T1272 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.1406469452 Sep 11 05:28:57 AM UTC 24 Sep 11 05:31:15 AM UTC 24 34667951649 ps
T1273 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_stress_all.2609721323 Sep 11 05:35:09 AM UTC 24 Sep 11 05:35:46 AM UTC 24 27539660560 ps
T1274 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.3147283260 Sep 11 05:29:23 AM UTC 24 Sep 11 05:29:32 AM UTC 24 437854887 ps
T1275 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.3358919283 Sep 11 05:24:37 AM UTC 24 Sep 11 05:29:32 AM UTC 24 4986118718 ps
T1276 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.98274247 Sep 11 05:29:32 AM UTC 24 Sep 11 05:29:35 AM UTC 24 302871640 ps
T1277 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.408585430 Sep 11 05:29:36 AM UTC 24 Sep 11 05:29:39 AM UTC 24 767809091 ps
T1278 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.945187016 Sep 11 05:20:40 AM UTC 24 Sep 11 05:35:41 AM UTC 24 53789294392 ps
T1279 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.196163042 Sep 11 05:29:33 AM UTC 24 Sep 11 05:29:39 AM UTC 24 938749181 ps
T1280 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.2482529220 Sep 11 05:28:02 AM UTC 24 Sep 11 05:29:41 AM UTC 24 19572528059 ps
T1281 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.2215834879 Sep 11 05:29:05 AM UTC 24 Sep 11 05:29:41 AM UTC 24 3404720971 ps
T1282 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.3753136298 Sep 11 05:27:32 AM UTC 24 Sep 11 05:29:43 AM UTC 24 3680261779 ps
T1283 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.4076237351 Sep 11 05:29:40 AM UTC 24 Sep 11 05:29:45 AM UTC 24 153924281 ps
T1284 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.726482706 Sep 11 05:24:14 AM UTC 24 Sep 11 05:29:46 AM UTC 24 38138145889 ps
T1285 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.2843385453 Sep 11 05:29:00 AM UTC 24 Sep 11 05:29:49 AM UTC 24 8682739843 ps
T1286 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.1268715067 Sep 11 05:28:59 AM UTC 24 Sep 11 05:29:50 AM UTC 24 5905535114 ps
T1287 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.2608102442 Sep 11 05:29:33 AM UTC 24 Sep 11 05:29:52 AM UTC 24 917256509 ps
T1288 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.2451401676 Sep 11 05:29:46 AM UTC 24 Sep 11 05:29:55 AM UTC 24 3147988605 ps
T1289 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.852285990 Sep 11 05:29:40 AM UTC 24 Sep 11 05:29:57 AM UTC 24 652119772 ps
T1290 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.1836435673 Sep 11 05:29:56 AM UTC 24 Sep 11 05:29:59 AM UTC 24 136921902 ps
T1291 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.2060820892 Sep 11 05:29:56 AM UTC 24 Sep 11 05:29:59 AM UTC 24 192051441 ps
T1292 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.3366185232 Sep 11 05:28:00 AM UTC 24 Sep 11 05:30:02 AM UTC 24 22559956041 ps
T1293 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.1800939704 Sep 11 05:29:41 AM UTC 24 Sep 11 05:30:02 AM UTC 24 4166597357 ps
T1294 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.180818236 Sep 11 05:29:51 AM UTC 24 Sep 11 05:30:04 AM UTC 24 2508584114 ps
T1295 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_hrst.3824700972 Sep 11 05:30:02 AM UTC 24 Sep 11 05:30:06 AM UTC 24 949019607 ps
T1296 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_perf.3279831904 Sep 11 05:29:57 AM UTC 24 Sep 11 05:30:08 AM UTC 24 875375437 ps
T1297 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.2362257268 Sep 11 05:29:59 AM UTC 24 Sep 11 05:30:09 AM UTC 24 1054913961 ps
T1298 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2667495169 Sep 11 05:29:50 AM UTC 24 Sep 11 05:30:10 AM UTC 24 12968120926 ps
T1299 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.1904510566 Sep 11 05:30:06 AM UTC 24 Sep 11 05:30:12 AM UTC 24 411008962 ps
T1300 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.1733912922 Sep 11 05:31:03 AM UTC 24 Sep 11 05:31:14 AM UTC 24 575575044 ps
T1301 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.2953158666 Sep 11 05:30:09 AM UTC 24 Sep 11 05:30:12 AM UTC 24 319559637 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.2510637817 Sep 11 05:30:04 AM UTC 24 Sep 11 05:30:13 AM UTC 24 551068882 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/29.i2c_host_stress_all.219539832 Sep 11 05:24:42 AM UTC 24 Sep 11 05:30:14 AM UTC 24 16361999205 ps
T1302 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_stress_wr.3344839871 Sep 11 05:34:55 AM UTC 24 Sep 11 05:35:44 AM UTC 24 24093198365 ps
T1303 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.3069912170 Sep 11 05:30:10 AM UTC 24 Sep 11 05:30:15 AM UTC 24 259195386 ps
T1304 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.3989998222 Sep 11 05:30:11 AM UTC 24 Sep 11 05:30:16 AM UTC 24 1784953420 ps
T1305 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_alert_test.4191073576 Sep 11 05:30:14 AM UTC 24 Sep 11 05:30:16 AM UTC 24 87618694 ps
T1306 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.1563140615 Sep 11 05:30:13 AM UTC 24 Sep 11 05:30:17 AM UTC 24 582307398 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_override.1510993308 Sep 11 05:30:16 AM UTC 24 Sep 11 05:30:18 AM UTC 24 88520075 ps
T1307 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/32.i2c_host_perf.290233548 Sep 11 05:26:45 AM UTC 24 Sep 11 05:30:19 AM UTC 24 12028708251 ps
T1308 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.619034633 Sep 11 05:30:13 AM UTC 24 Sep 11 05:30:19 AM UTC 24 535736383 ps
T1309 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.715392159 Sep 11 05:30:17 AM UTC 24 Sep 11 05:30:20 AM UTC 24 440843739 ps
T1310 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.942997195 Sep 11 05:30:17 AM UTC 24 Sep 11 05:30:25 AM UTC 24 162421423 ps
T1311 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.2674298015 Sep 11 05:30:21 AM UTC 24 Sep 11 05:30:25 AM UTC 24 132459385 ps
T1312 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.2577681018 Sep 11 05:27:30 AM UTC 24 Sep 11 05:30:26 AM UTC 24 12970921677 ps
T1313 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.541992440 Sep 11 05:30:18 AM UTC 24 Sep 11 05:30:27 AM UTC 24 422669432 ps
T1314 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.3962414638 Sep 11 05:30:20 AM UTC 24 Sep 11 05:30:30 AM UTC 24 658954660 ps
T1315 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.1385680423 Sep 11 05:21:10 AM UTC 24 Sep 11 05:30:31 AM UTC 24 44432282396 ps
T1316 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.2411139434 Sep 11 05:30:15 AM UTC 24 Sep 11 05:30:35 AM UTC 24 1862129573 ps
T1317 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.1963869365 Sep 11 05:29:45 AM UTC 24 Sep 11 05:30:38 AM UTC 24 3531206972 ps
T1318 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.1484788980 Sep 11 05:29:10 AM UTC 24 Sep 11 05:30:38 AM UTC 24 9176783244 ps
T1319 /workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.3702842806 Sep 11 05:30:31 AM UTC 24 Sep 11 05:30:39 AM UTC 24 3274138413 ps
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