T1320 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.1349793322 |
|
|
Sep 11 05:30:39 AM UTC 24 |
Sep 11 05:30:41 AM UTC 24 |
556925463 ps |
T1321 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.3082618080 |
|
|
Sep 11 05:31:09 AM UTC 24 |
Sep 11 05:31:12 AM UTC 24 |
130015089 ps |
T1322 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.3291387222 |
|
|
Sep 11 05:31:09 AM UTC 24 |
Sep 11 05:31:13 AM UTC 24 |
480014337 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.1983701199 |
|
|
Sep 11 05:30:40 AM UTC 24 |
Sep 11 05:30:43 AM UTC 24 |
300012758 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.1799746348 |
|
|
Sep 11 05:30:26 AM UTC 24 |
Sep 11 05:30:43 AM UTC 24 |
8984267434 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_perf.2584098937 |
|
|
Sep 11 05:30:42 AM UTC 24 |
Sep 11 05:30:47 AM UTC 24 |
707857509 ps |
T1326 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.1488673313 |
|
|
Sep 11 05:30:44 AM UTC 24 |
Sep 11 05:30:47 AM UTC 24 |
163451796 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.3611925209 |
|
|
Sep 11 05:29:28 AM UTC 24 |
Sep 11 05:30:49 AM UTC 24 |
1708690105 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.949553480 |
|
|
Sep 11 05:30:43 AM UTC 24 |
Sep 11 05:30:52 AM UTC 24 |
1478002798 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.814612438 |
|
|
Sep 11 05:30:39 AM UTC 24 |
Sep 11 05:30:53 AM UTC 24 |
2999663419 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.4243844777 |
|
|
Sep 11 05:30:50 AM UTC 24 |
Sep 11 05:30:55 AM UTC 24 |
387607145 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.2586529485 |
|
|
Sep 11 05:30:52 AM UTC 24 |
Sep 11 05:30:56 AM UTC 24 |
1816501806 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.2076851034 |
|
|
Sep 11 05:30:48 AM UTC 24 |
Sep 11 05:30:57 AM UTC 24 |
1738999369 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.2166048567 |
|
|
Sep 11 05:30:53 AM UTC 24 |
Sep 11 05:30:57 AM UTC 24 |
89576557 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.556965485 |
|
|
Sep 11 05:30:36 AM UTC 24 |
Sep 11 05:30:58 AM UTC 24 |
14583110743 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.3604372538 |
|
|
Sep 11 05:30:54 AM UTC 24 |
Sep 11 05:30:58 AM UTC 24 |
1947988008 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_alert_test.2349844218 |
|
|
Sep 11 05:30:58 AM UTC 24 |
Sep 11 05:31:00 AM UTC 24 |
32174696 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.180428568 |
|
|
Sep 11 05:30:56 AM UTC 24 |
Sep 11 05:31:00 AM UTC 24 |
438387993 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.2112176951 |
|
|
Sep 11 05:30:57 AM UTC 24 |
Sep 11 05:31:01 AM UTC 24 |
1771486933 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_override.14688934 |
|
|
Sep 11 05:30:59 AM UTC 24 |
Sep 11 05:31:01 AM UTC 24 |
33097101 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.1853645185 |
|
|
Sep 11 05:30:58 AM UTC 24 |
Sep 11 05:31:02 AM UTC 24 |
252843855 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.2180031486 |
|
|
Sep 11 05:30:16 AM UTC 24 |
Sep 11 05:31:04 AM UTC 24 |
1593654562 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.4284152630 |
|
|
Sep 11 05:31:02 AM UTC 24 |
Sep 11 05:31:05 AM UTC 24 |
214047901 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.3797125519 |
|
|
Sep 11 05:29:43 AM UTC 24 |
Sep 11 05:31:07 AM UTC 24 |
7186912380 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/25.i2c_host_perf.3039269234 |
|
|
Sep 11 05:22:18 AM UTC 24 |
Sep 11 05:31:08 AM UTC 24 |
28384461948 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.843093237 |
|
|
Sep 11 05:15:59 AM UTC 24 |
Sep 11 05:31:08 AM UTC 24 |
23200853832 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.2621167675 |
|
|
Sep 11 05:17:11 AM UTC 24 |
Sep 11 05:31:09 AM UTC 24 |
24296017404 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.2748239308 |
|
|
Sep 11 05:29:33 AM UTC 24 |
Sep 11 05:31:10 AM UTC 24 |
6292979087 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.747028271 |
|
|
Sep 11 05:31:02 AM UTC 24 |
Sep 11 05:31:10 AM UTC 24 |
236324806 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.1898535129 |
|
|
Sep 11 05:14:40 AM UTC 24 |
Sep 11 05:31:10 AM UTC 24 |
51916935463 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_perf.518268906 |
|
|
Sep 11 05:29:33 AM UTC 24 |
Sep 11 05:31:13 AM UTC 24 |
8231252897 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.2082080251 |
|
|
Sep 11 05:31:09 AM UTC 24 |
Sep 11 05:31:19 AM UTC 24 |
820437467 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.12634588 |
|
|
Sep 11 05:32:56 AM UTC 24 |
Sep 11 05:33:09 AM UTC 24 |
2439305692 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.1854799605 |
|
|
Sep 11 05:30:27 AM UTC 24 |
Sep 11 05:31:20 AM UTC 24 |
4229526622 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.3330249176 |
|
|
Sep 11 05:31:20 AM UTC 24 |
Sep 11 05:31:23 AM UTC 24 |
182140917 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.2534013902 |
|
|
Sep 11 05:31:21 AM UTC 24 |
Sep 11 05:31:24 AM UTC 24 |
357401394 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.2455689882 |
|
|
Sep 11 05:31:16 AM UTC 24 |
Sep 11 05:31:26 AM UTC 24 |
2162432512 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.1847162110 |
|
|
Sep 11 05:31:13 AM UTC 24 |
Sep 11 05:31:30 AM UTC 24 |
3090617274 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_perf.1055968890 |
|
|
Sep 11 05:31:21 AM UTC 24 |
Sep 11 05:31:30 AM UTC 24 |
682926238 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.3695582579 |
|
|
Sep 11 05:31:10 AM UTC 24 |
Sep 11 05:31:30 AM UTC 24 |
1159766969 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.2892323232 |
|
|
Sep 11 05:31:25 AM UTC 24 |
Sep 11 05:31:31 AM UTC 24 |
1866995369 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.1971369825 |
|
|
Sep 11 05:31:11 AM UTC 24 |
Sep 11 05:31:32 AM UTC 24 |
399854983 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.3706866035 |
|
|
Sep 11 05:31:31 AM UTC 24 |
Sep 11 05:31:35 AM UTC 24 |
280986214 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.95558463 |
|
|
Sep 11 05:33:03 AM UTC 24 |
Sep 11 05:33:09 AM UTC 24 |
725443728 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.3028892462 |
|
|
Sep 11 05:29:29 AM UTC 24 |
Sep 11 05:31:35 AM UTC 24 |
5682563506 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.3870380858 |
|
|
Sep 11 05:31:32 AM UTC 24 |
Sep 11 05:31:36 AM UTC 24 |
115160856 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_alert_test.2123381370 |
|
|
Sep 11 05:31:37 AM UTC 24 |
Sep 11 05:31:39 AM UTC 24 |
58927368 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.397372245 |
|
|
Sep 11 05:31:36 AM UTC 24 |
Sep 11 05:31:40 AM UTC 24 |
1566492698 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2440048407 |
|
|
Sep 11 05:31:36 AM UTC 24 |
Sep 11 05:31:40 AM UTC 24 |
4110757597 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.254240656 |
|
|
Sep 11 05:31:37 AM UTC 24 |
Sep 11 05:31:40 AM UTC 24 |
133513728 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.1510752446 |
|
|
Sep 11 05:31:31 AM UTC 24 |
Sep 11 05:31:41 AM UTC 24 |
1737392549 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/46.i2c_host_perf.1373865145 |
|
|
Sep 11 05:36:04 AM UTC 24 |
Sep 11 05:41:17 AM UTC 24 |
28864277369 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.3666773599 |
|
|
Sep 11 05:31:36 AM UTC 24 |
Sep 11 05:31:42 AM UTC 24 |
483704026 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.570572978 |
|
|
Sep 11 05:29:30 AM UTC 24 |
Sep 11 05:31:43 AM UTC 24 |
1938246696 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_override.1335328749 |
|
|
Sep 11 05:31:41 AM UTC 24 |
Sep 11 05:31:43 AM UTC 24 |
43264475 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.3869333860 |
|
|
Sep 11 05:31:33 AM UTC 24 |
Sep 11 05:31:44 AM UTC 24 |
404681394 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.3142197011 |
|
|
Sep 11 05:31:42 AM UTC 24 |
Sep 11 05:31:45 AM UTC 24 |
373614967 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.1361192365 |
|
|
Sep 11 05:28:15 AM UTC 24 |
Sep 11 05:31:48 AM UTC 24 |
60941960091 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.756977592 |
|
|
Sep 11 05:31:43 AM UTC 24 |
Sep 11 05:31:48 AM UTC 24 |
1134041687 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.1679949415 |
|
|
Sep 11 05:29:42 AM UTC 24 |
Sep 11 05:31:52 AM UTC 24 |
38943994869 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.3141890085 |
|
|
Sep 11 05:31:12 AM UTC 24 |
Sep 11 05:31:53 AM UTC 24 |
1826693051 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.232599591 |
|
|
Sep 11 05:31:46 AM UTC 24 |
Sep 11 05:31:53 AM UTC 24 |
1808050646 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.2939229142 |
|
|
Sep 11 05:31:50 AM UTC 24 |
Sep 11 05:31:56 AM UTC 24 |
429039679 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.2027183653 |
|
|
Sep 11 05:31:49 AM UTC 24 |
Sep 11 05:31:57 AM UTC 24 |
2249937062 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.2916853977 |
|
|
Sep 11 05:31:40 AM UTC 24 |
Sep 11 05:32:03 AM UTC 24 |
1983421227 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.4111725177 |
|
|
Sep 11 05:31:13 AM UTC 24 |
Sep 11 05:32:04 AM UTC 24 |
10902628028 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.635780069 |
|
|
Sep 11 05:30:43 AM UTC 24 |
Sep 11 05:32:07 AM UTC 24 |
28982878035 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.1624256966 |
|
|
Sep 11 05:31:54 AM UTC 24 |
Sep 11 05:32:09 AM UTC 24 |
2435835604 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.1731545022 |
|
|
Sep 11 05:32:08 AM UTC 24 |
Sep 11 05:32:11 AM UTC 24 |
568897206 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.3792794118 |
|
|
Sep 11 05:32:09 AM UTC 24 |
Sep 11 05:32:12 AM UTC 24 |
523789515 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.2531725149 |
|
|
Sep 11 05:32:02 AM UTC 24 |
Sep 11 05:32:15 AM UTC 24 |
4952182391 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.2376258680 |
|
|
Sep 11 05:32:04 AM UTC 24 |
Sep 11 05:32:16 AM UTC 24 |
1283059999 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.168987972 |
|
|
Sep 11 05:31:42 AM UTC 24 |
Sep 11 05:32:16 AM UTC 24 |
811353423 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.111468221 |
|
|
Sep 11 05:28:00 AM UTC 24 |
Sep 11 05:32:17 AM UTC 24 |
4624288181 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3050411594 |
|
|
Sep 11 05:32:10 AM UTC 24 |
Sep 11 05:32:17 AM UTC 24 |
2419756866 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.4261416370 |
|
|
Sep 11 05:32:16 AM UTC 24 |
Sep 11 05:32:20 AM UTC 24 |
346312926 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.3180865329 |
|
|
Sep 11 05:32:18 AM UTC 24 |
Sep 11 05:32:21 AM UTC 24 |
699225190 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.985544064 |
|
|
Sep 11 05:30:19 AM UTC 24 |
Sep 11 05:32:22 AM UTC 24 |
3683395808 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.4042300165 |
|
|
Sep 11 05:30:59 AM UTC 24 |
Sep 11 05:32:23 AM UTC 24 |
2957900648 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.270660750 |
|
|
Sep 11 05:32:13 AM UTC 24 |
Sep 11 05:32:23 AM UTC 24 |
8886120918 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.2811193690 |
|
|
Sep 11 05:32:18 AM UTC 24 |
Sep 11 05:32:24 AM UTC 24 |
1036264105 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.4146501151 |
|
|
Sep 11 05:32:19 AM UTC 24 |
Sep 11 05:32:25 AM UTC 24 |
264557422 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_alert_test.3086808424 |
|
|
Sep 11 05:32:24 AM UTC 24 |
Sep 11 05:32:26 AM UTC 24 |
15765090 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.2626062870 |
|
|
Sep 11 05:32:20 AM UTC 24 |
Sep 11 05:32:26 AM UTC 24 |
1546914748 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.3144653494 |
|
|
Sep 11 05:32:17 AM UTC 24 |
Sep 11 05:32:26 AM UTC 24 |
532312862 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.213100951 |
|
|
Sep 11 05:32:24 AM UTC 24 |
Sep 11 05:32:27 AM UTC 24 |
125830975 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.3090883070 |
|
|
Sep 11 05:32:23 AM UTC 24 |
Sep 11 05:32:27 AM UTC 24 |
575643807 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.861987288 |
|
|
Sep 11 05:32:23 AM UTC 24 |
Sep 11 05:32:28 AM UTC 24 |
2260937297 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_override.3231112505 |
|
|
Sep 11 05:32:26 AM UTC 24 |
Sep 11 05:32:28 AM UTC 24 |
52413846 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.4171306340 |
|
|
Sep 11 05:32:27 AM UTC 24 |
Sep 11 05:32:29 AM UTC 24 |
126662552 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.867867320 |
|
|
Sep 11 05:31:57 AM UTC 24 |
Sep 11 05:32:33 AM UTC 24 |
1411741604 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.816380216 |
|
|
Sep 11 05:32:28 AM UTC 24 |
Sep 11 05:32:36 AM UTC 24 |
195493249 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.96672739 |
|
|
Sep 11 05:32:30 AM UTC 24 |
Sep 11 05:32:37 AM UTC 24 |
753172429 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.4227980867 |
|
|
Sep 11 05:32:04 AM UTC 24 |
Sep 11 05:32:38 AM UTC 24 |
8137540508 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.325153499 |
|
|
Sep 11 05:29:00 AM UTC 24 |
Sep 11 05:32:41 AM UTC 24 |
23615973297 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.1627218483 |
|
|
Sep 11 05:32:37 AM UTC 24 |
Sep 11 05:32:43 AM UTC 24 |
751643930 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_perf.2777398007 |
|
|
Sep 11 05:32:29 AM UTC 24 |
Sep 11 05:32:46 AM UTC 24 |
2855638235 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.3760095583 |
|
|
Sep 11 05:31:41 AM UTC 24 |
Sep 11 05:32:46 AM UTC 24 |
2281452910 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_perf.3930303890 |
|
|
Sep 11 05:31:07 AM UTC 24 |
Sep 11 05:32:53 AM UTC 24 |
2743838851 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.3347844172 |
|
|
Sep 11 05:32:47 AM UTC 24 |
Sep 11 05:32:55 AM UTC 24 |
1055020988 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.824289185 |
|
|
Sep 11 05:32:28 AM UTC 24 |
Sep 11 05:32:55 AM UTC 24 |
1022632060 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.409419793 |
|
|
Sep 11 05:32:47 AM UTC 24 |
Sep 11 05:32:57 AM UTC 24 |
4521545688 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.2429126027 |
|
|
Sep 11 05:32:57 AM UTC 24 |
Sep 11 05:33:00 AM UTC 24 |
154538054 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.700264537 |
|
|
Sep 11 05:32:39 AM UTC 24 |
Sep 11 05:33:09 AM UTC 24 |
1523543220 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2007398551 |
|
|
Sep 11 05:31:58 AM UTC 24 |
Sep 11 05:33:01 AM UTC 24 |
4738591350 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.2246353181 |
|
|
Sep 11 05:26:01 AM UTC 24 |
Sep 11 05:33:02 AM UTC 24 |
24255375162 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.441823598 |
|
|
Sep 11 05:33:01 AM UTC 24 |
Sep 11 05:33:04 AM UTC 24 |
180557630 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.1438874369 |
|
|
Sep 11 05:32:44 AM UTC 24 |
Sep 11 05:33:04 AM UTC 24 |
3496435637 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.4000654969 |
|
|
Sep 11 05:32:12 AM UTC 24 |
Sep 11 05:33:06 AM UTC 24 |
12773925301 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.1028109232 |
|
|
Sep 11 05:33:05 AM UTC 24 |
Sep 11 05:33:10 AM UTC 24 |
529920125 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_mode_toggle.2658291369 |
|
|
Sep 11 05:33:05 AM UTC 24 |
Sep 11 05:33:09 AM UTC 24 |
660178200 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/49.i2c_host_perf.2807435179 |
|
|
Sep 11 05:38:07 AM UTC 24 |
Sep 11 05:42:31 AM UTC 24 |
17799327141 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.2943206640 |
|
|
Sep 11 05:32:54 AM UTC 24 |
Sep 11 05:33:10 AM UTC 24 |
5881382810 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.2525181470 |
|
|
Sep 11 05:32:34 AM UTC 24 |
Sep 11 05:33:11 AM UTC 24 |
2179696751 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_perf.1549379873 |
|
|
Sep 11 05:33:02 AM UTC 24 |
Sep 11 05:33:12 AM UTC 24 |
4039055667 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.525584249 |
|
|
Sep 11 05:33:10 AM UTC 24 |
Sep 11 05:33:13 AM UTC 24 |
129991738 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.3618648974 |
|
|
Sep 11 05:32:27 AM UTC 24 |
Sep 11 05:33:13 AM UTC 24 |
6184563957 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.3064872599 |
|
|
Sep 11 05:33:10 AM UTC 24 |
Sep 11 05:33:14 AM UTC 24 |
406265464 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.2004811155 |
|
|
Sep 11 05:33:09 AM UTC 24 |
Sep 11 05:33:14 AM UTC 24 |
494234070 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.4078909762 |
|
|
Sep 11 05:33:11 AM UTC 24 |
Sep 11 05:33:15 AM UTC 24 |
160912939 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_alert_test.498544783 |
|
|
Sep 11 05:33:13 AM UTC 24 |
Sep 11 05:33:15 AM UTC 24 |
17691097 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_override.1638986196 |
|
|
Sep 11 05:33:14 AM UTC 24 |
Sep 11 05:33:16 AM UTC 24 |
23172085 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.2080424721 |
|
|
Sep 11 05:33:10 AM UTC 24 |
Sep 11 05:33:16 AM UTC 24 |
545564583 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.2889691554 |
|
|
Sep 11 05:31:05 AM UTC 24 |
Sep 11 05:33:16 AM UTC 24 |
3462549938 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.2461570470 |
|
|
Sep 11 05:33:11 AM UTC 24 |
Sep 11 05:33:17 AM UTC 24 |
1327954168 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.4245260496 |
|
|
Sep 11 05:33:10 AM UTC 24 |
Sep 11 05:33:17 AM UTC 24 |
344110368 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.3325274178 |
|
|
Sep 11 05:33:15 AM UTC 24 |
Sep 11 05:33:17 AM UTC 24 |
322582561 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.182707749 |
|
|
Sep 11 05:33:17 AM UTC 24 |
Sep 11 05:33:21 AM UTC 24 |
233494672 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.3677066807 |
|
|
Sep 11 05:33:15 AM UTC 24 |
Sep 11 05:33:22 AM UTC 24 |
264769027 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.418817160 |
|
|
Sep 11 05:31:11 AM UTC 24 |
Sep 11 05:33:25 AM UTC 24 |
29840680313 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.1146450606 |
|
|
Sep 11 05:33:19 AM UTC 24 |
Sep 11 05:33:25 AM UTC 24 |
384482350 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_perf.764879378 |
|
|
Sep 11 05:31:46 AM UTC 24 |
Sep 11 05:33:26 AM UTC 24 |
6774007731 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_perf.1736612315 |
|
|
Sep 11 05:30:19 AM UTC 24 |
Sep 11 05:33:27 AM UTC 24 |
4970610932 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.1508282138 |
|
|
Sep 11 05:28:47 AM UTC 24 |
Sep 11 05:33:27 AM UTC 24 |
20830394425 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.1395827198 |
|
|
Sep 11 05:33:07 AM UTC 24 |
Sep 11 05:33:29 AM UTC 24 |
740101206 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.1069091319 |
|
|
Sep 11 05:33:15 AM UTC 24 |
Sep 11 05:33:30 AM UTC 24 |
226363604 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.624140447 |
|
|
Sep 11 05:35:27 AM UTC 24 |
Sep 11 05:35:34 AM UTC 24 |
126567206 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.577771642 |
|
|
Sep 11 05:33:26 AM UTC 24 |
Sep 11 05:33:33 AM UTC 24 |
365010331 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.1119556441 |
|
|
Sep 11 05:33:30 AM UTC 24 |
Sep 11 05:33:33 AM UTC 24 |
133819006 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.625661030 |
|
|
Sep 11 05:33:33 AM UTC 24 |
Sep 11 05:33:37 AM UTC 24 |
180353516 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.2368837393 |
|
|
Sep 11 05:32:25 AM UTC 24 |
Sep 11 05:33:37 AM UTC 24 |
1356554891 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.234078557 |
|
|
Sep 11 05:33:27 AM UTC 24 |
Sep 11 05:33:37 AM UTC 24 |
4483529195 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.3112397434 |
|
|
Sep 11 05:33:28 AM UTC 24 |
Sep 11 05:33:39 AM UTC 24 |
1097747157 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_mode_toggle.3568115390 |
|
|
Sep 11 05:33:38 AM UTC 24 |
Sep 11 05:33:41 AM UTC 24 |
382573251 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_perf.673349463 |
|
|
Sep 11 05:33:17 AM UTC 24 |
Sep 11 05:33:43 AM UTC 24 |
7693226054 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_perf.1360057929 |
|
|
Sep 11 05:33:34 AM UTC 24 |
Sep 11 05:33:44 AM UTC 24 |
4741072659 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.2672845540 |
|
|
Sep 11 05:31:01 AM UTC 24 |
Sep 11 05:33:45 AM UTC 24 |
13839192482 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.3831986690 |
|
|
Sep 11 05:35:24 AM UTC 24 |
Sep 11 05:35:35 AM UTC 24 |
159277834 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.1234871399 |
|
|
Sep 11 05:31:01 AM UTC 24 |
Sep 11 05:33:45 AM UTC 24 |
2513963666 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.1860041978 |
|
|
Sep 11 05:33:18 AM UTC 24 |
Sep 11 05:33:46 AM UTC 24 |
611588870 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.739728000 |
|
|
Sep 11 05:33:13 AM UTC 24 |
Sep 11 05:33:46 AM UTC 24 |
3120003779 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2179450225 |
|
|
Sep 11 05:33:38 AM UTC 24 |
Sep 11 05:33:46 AM UTC 24 |
610275994 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.112746722 |
|
|
Sep 11 05:33:44 AM UTC 24 |
Sep 11 05:33:47 AM UTC 24 |
276824488 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.2988837167 |
|
|
Sep 11 05:33:28 AM UTC 24 |
Sep 11 05:33:47 AM UTC 24 |
5428672983 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.2173577060 |
|
|
Sep 11 05:33:42 AM UTC 24 |
Sep 11 05:33:47 AM UTC 24 |
1749824069 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_alert_test.2092556124 |
|
|
Sep 11 05:33:46 AM UTC 24 |
Sep 11 05:33:48 AM UTC 24 |
17474434 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.1104760278 |
|
|
Sep 11 05:33:45 AM UTC 24 |
Sep 11 05:33:49 AM UTC 24 |
99723236 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.2980494852 |
|
|
Sep 11 05:33:45 AM UTC 24 |
Sep 11 05:33:49 AM UTC 24 |
1144193413 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_override.4244918507 |
|
|
Sep 11 05:33:48 AM UTC 24 |
Sep 11 05:33:50 AM UTC 24 |
84435127 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.2495707100 |
|
|
Sep 11 05:33:46 AM UTC 24 |
Sep 11 05:33:50 AM UTC 24 |
663638064 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.1862944425 |
|
|
Sep 11 05:33:46 AM UTC 24 |
Sep 11 05:33:51 AM UTC 24 |
556641477 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.3247135071 |
|
|
Sep 11 05:33:45 AM UTC 24 |
Sep 11 05:33:51 AM UTC 24 |
619268685 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.3663192297 |
|
|
Sep 11 05:29:02 AM UTC 24 |
Sep 11 05:33:52 AM UTC 24 |
73428158062 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.1130359174 |
|
|
Sep 11 05:33:50 AM UTC 24 |
Sep 11 05:33:52 AM UTC 24 |
419826969 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.2736963523 |
|
|
Sep 11 05:33:40 AM UTC 24 |
Sep 11 05:33:53 AM UTC 24 |
2450749121 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.3638352785 |
|
|
Sep 11 05:33:53 AM UTC 24 |
Sep 11 05:33:57 AM UTC 24 |
153871888 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.2409346593 |
|
|
Sep 11 05:33:52 AM UTC 24 |
Sep 11 05:33:57 AM UTC 24 |
109206026 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.3487054639 |
|
|
Sep 11 05:31:54 AM UTC 24 |
Sep 11 05:33:57 AM UTC 24 |
32231754947 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.1821316167 |
|
|
Sep 11 05:33:50 AM UTC 24 |
Sep 11 05:33:57 AM UTC 24 |
916794107 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.2162280775 |
|
|
Sep 11 05:32:27 AM UTC 24 |
Sep 11 05:34:01 AM UTC 24 |
18586454791 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.2318260988 |
|
|
Sep 11 05:33:50 AM UTC 24 |
Sep 11 05:34:01 AM UTC 24 |
1927373085 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.841143505 |
|
|
Sep 11 05:33:58 AM UTC 24 |
Sep 11 05:34:01 AM UTC 24 |
592406196 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.1615879523 |
|
|
Sep 11 05:34:20 AM UTC 24 |
Sep 11 05:35:37 AM UTC 24 |
1847183600 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.3690593358 |
|
|
Sep 11 05:31:43 AM UTC 24 |
Sep 11 05:34:04 AM UTC 24 |
11447979071 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.640117408 |
|
|
Sep 11 05:33:58 AM UTC 24 |
Sep 11 05:34:06 AM UTC 24 |
322962204 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.901546655 |
|
|
Sep 11 05:32:29 AM UTC 24 |
Sep 11 05:34:06 AM UTC 24 |
1794071354 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3515303465 |
|
|
Sep 11 05:34:04 AM UTC 24 |
Sep 11 05:34:08 AM UTC 24 |
211825058 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.1398546524 |
|
|
Sep 11 05:34:05 AM UTC 24 |
Sep 11 05:34:08 AM UTC 24 |
177008076 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.3589651595 |
|
|
Sep 11 05:33:23 AM UTC 24 |
Sep 11 05:34:08 AM UTC 24 |
4666325860 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.2224111629 |
|
|
Sep 11 05:33:54 AM UTC 24 |
Sep 11 05:34:09 AM UTC 24 |
1954236492 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.1439833379 |
|
|
Sep 11 05:33:59 AM UTC 24 |
Sep 11 05:34:09 AM UTC 24 |
795896722 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.2608713207 |
|
|
Sep 11 05:33:16 AM UTC 24 |
Sep 11 05:34:10 AM UTC 24 |
8355665804 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.863827160 |
|
|
Sep 11 05:33:52 AM UTC 24 |
Sep 11 05:34:11 AM UTC 24 |
5712781807 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_perf.3592099496 |
|
|
Sep 11 05:34:05 AM UTC 24 |
Sep 11 05:34:12 AM UTC 24 |
4139278023 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.2732495193 |
|
|
Sep 11 05:34:56 AM UTC 24 |
Sep 11 05:35:39 AM UTC 24 |
1899046975 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.3979116989 |
|
|
Sep 11 05:34:10 AM UTC 24 |
Sep 11 05:34:13 AM UTC 24 |
326896771 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.3175464791 |
|
|
Sep 11 05:34:02 AM UTC 24 |
Sep 11 05:34:16 AM UTC 24 |
5741324523 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.957742475 |
|
|
Sep 11 05:34:07 AM UTC 24 |
Sep 11 05:34:16 AM UTC 24 |
2761837696 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.3971241274 |
|
|
Sep 11 05:34:10 AM UTC 24 |
Sep 11 05:34:16 AM UTC 24 |
905621813 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3927108404 |
|
|
Sep 11 05:34:12 AM UTC 24 |
Sep 11 05:34:16 AM UTC 24 |
780903236 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.4205854957 |
|
|
Sep 11 05:34:11 AM UTC 24 |
Sep 11 05:34:17 AM UTC 24 |
180990097 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.4282142290 |
|
|
Sep 11 05:34:14 AM UTC 24 |
Sep 11 05:34:18 AM UTC 24 |
2186479714 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.3241439174 |
|
|
Sep 11 05:34:13 AM UTC 24 |
Sep 11 05:34:18 AM UTC 24 |
2255969311 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.981671291 |
|
|
Sep 11 05:34:14 AM UTC 24 |
Sep 11 05:34:19 AM UTC 24 |
475498248 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_alert_test.3978869960 |
|
|
Sep 11 05:34:17 AM UTC 24 |
Sep 11 05:34:19 AM UTC 24 |
16163862 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.3266341063 |
|
|
Sep 11 05:33:47 AM UTC 24 |
Sep 11 05:34:19 AM UTC 24 |
1498654858 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_override.4165357691 |
|
|
Sep 11 05:34:17 AM UTC 24 |
Sep 11 05:34:20 AM UTC 24 |
20911021 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.962440032 |
|
|
Sep 11 05:33:23 AM UTC 24 |
Sep 11 05:34:20 AM UTC 24 |
21734422882 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.100484058 |
|
|
Sep 11 05:34:10 AM UTC 24 |
Sep 11 05:34:20 AM UTC 24 |
1773306909 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.4225501287 |
|
|
Sep 11 05:33:35 AM UTC 24 |
Sep 11 05:34:21 AM UTC 24 |
28959393624 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.52928831 |
|
|
Sep 11 05:34:19 AM UTC 24 |
Sep 11 05:34:21 AM UTC 24 |
132593382 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.237435688 |
|
|
Sep 11 05:33:58 AM UTC 24 |
Sep 11 05:34:24 AM UTC 24 |
45171429431 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.3661428031 |
|
|
Sep 11 05:34:21 AM UTC 24 |
Sep 11 05:34:27 AM UTC 24 |
173067396 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.1151956161 |
|
|
Sep 11 05:34:02 AM UTC 24 |
Sep 11 05:34:28 AM UTC 24 |
7556139748 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_perf.4086213560 |
|
|
Sep 11 05:33:51 AM UTC 24 |
Sep 11 05:34:30 AM UTC 24 |
12874720213 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.2883932081 |
|
|
Sep 11 05:33:26 AM UTC 24 |
Sep 11 05:34:31 AM UTC 24 |
4902047481 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_perf.656125003 |
|
|
Sep 11 05:34:21 AM UTC 24 |
Sep 11 05:34:33 AM UTC 24 |
1255104040 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.1571740548 |
|
|
Sep 11 05:34:29 AM UTC 24 |
Sep 11 05:34:35 AM UTC 24 |
2762260886 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.2569362711 |
|
|
Sep 11 05:34:20 AM UTC 24 |
Sep 11 05:34:35 AM UTC 24 |
211626900 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.150234060 |
|
|
Sep 11 05:34:21 AM UTC 24 |
Sep 11 05:34:35 AM UTC 24 |
1531357528 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.3414987741 |
|
|
Sep 11 05:33:02 AM UTC 24 |
Sep 11 05:34:36 AM UTC 24 |
41783901496 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.2216952143 |
|
|
Sep 11 05:34:29 AM UTC 24 |
Sep 11 05:34:37 AM UTC 24 |
2169341043 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.2444576338 |
|
|
Sep 11 05:35:25 AM UTC 24 |
Sep 11 05:35:33 AM UTC 24 |
243307322 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.3348545263 |
|
|
Sep 11 05:34:20 AM UTC 24 |
Sep 11 05:34:37 AM UTC 24 |
272979430 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.4104954347 |
|
|
Sep 11 05:34:35 AM UTC 24 |
Sep 11 05:34:37 AM UTC 24 |
205707175 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.3975991026 |
|
|
Sep 11 05:34:36 AM UTC 24 |
Sep 11 05:34:39 AM UTC 24 |
690653909 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.2496300435 |
|
|
Sep 11 05:34:32 AM UTC 24 |
Sep 11 05:34:40 AM UTC 24 |
1245821502 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.3360664847 |
|
|
Sep 11 05:34:27 AM UTC 24 |
Sep 11 05:34:41 AM UTC 24 |
762827673 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.959237096 |
|
|
Sep 11 05:34:22 AM UTC 24 |
Sep 11 05:34:41 AM UTC 24 |
3583117868 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.4194072474 |
|
|
Sep 11 05:34:21 AM UTC 24 |
Sep 11 05:34:44 AM UTC 24 |
3992897652 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.2778774195 |
|
|
Sep 11 05:34:17 AM UTC 24 |
Sep 11 05:34:44 AM UTC 24 |
2213324281 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.310707912 |
|
|
Sep 11 05:34:40 AM UTC 24 |
Sep 11 05:34:44 AM UTC 24 |
338780722 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_mode_toggle.967558698 |
|
|
Sep 11 05:34:38 AM UTC 24 |
Sep 11 05:34:44 AM UTC 24 |
110786384 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.75127000 |
|
|
Sep 11 05:34:38 AM UTC 24 |
Sep 11 05:34:45 AM UTC 24 |
581148045 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.615075873 |
|
|
Sep 11 05:34:42 AM UTC 24 |
Sep 11 05:34:45 AM UTC 24 |
128624999 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.689950953 |
|
|
Sep 11 05:34:42 AM UTC 24 |
Sep 11 05:34:45 AM UTC 24 |
326735428 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_perf.52323375 |
|
|
Sep 11 05:34:36 AM UTC 24 |
Sep 11 05:34:46 AM UTC 24 |
1563274523 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.734246661 |
|
|
Sep 11 05:34:39 AM UTC 24 |
Sep 11 05:34:46 AM UTC 24 |
1611096762 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.2690292358 |
|
|
Sep 11 05:34:42 AM UTC 24 |
Sep 11 05:34:47 AM UTC 24 |
2228564139 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_alert_test.3033341030 |
|
|
Sep 11 05:34:45 AM UTC 24 |
Sep 11 05:34:47 AM UTC 24 |
26835822 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.1742366864 |
|
|
Sep 11 05:34:31 AM UTC 24 |
Sep 11 05:34:48 AM UTC 24 |
11428713858 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.1794319960 |
|
|
Sep 11 05:35:24 AM UTC 24 |
Sep 11 05:35:29 AM UTC 24 |
160326283 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_override.3496205671 |
|
|
Sep 11 05:34:46 AM UTC 24 |
Sep 11 05:34:48 AM UTC 24 |
27811330 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.1096902258 |
|
|
Sep 11 05:34:48 AM UTC 24 |
Sep 11 05:34:50 AM UTC 24 |
144478323 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.599277126 |
|
|
Sep 11 05:34:45 AM UTC 24 |
Sep 11 05:34:51 AM UTC 24 |
1779766312 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.3599569879 |
|
|
Sep 11 05:33:51 AM UTC 24 |
Sep 11 05:34:51 AM UTC 24 |
2597705071 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.247211382 |
|
|
Sep 11 05:34:45 AM UTC 24 |
Sep 11 05:34:51 AM UTC 24 |
2038955146 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.1832446916 |
|
|
Sep 11 05:34:51 AM UTC 24 |
Sep 11 05:34:54 AM UTC 24 |
103065978 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.3709699587 |
|
|
Sep 11 05:33:49 AM UTC 24 |
Sep 11 05:34:55 AM UTC 24 |
8584241316 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2372133323 |
|
|
Sep 11 05:34:50 AM UTC 24 |
Sep 11 05:34:56 AM UTC 24 |
387676422 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3283079150 |
|
|
Sep 11 05:34:48 AM UTC 24 |
Sep 11 05:35:00 AM UTC 24 |
2093538171 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.1049478597 |
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Sep 11 05:34:49 AM UTC 24 |
Sep 11 05:35:02 AM UTC 24 |
2044402272 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.3075296647 |
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Sep 11 05:14:52 AM UTC 24 |
Sep 11 05:35:03 AM UTC 24 |
58350976124 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.1341986731 |
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Sep 11 05:29:59 AM UTC 24 |
Sep 11 05:35:05 AM UTC 24 |
51463541128 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.3747597134 |
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Sep 11 05:34:56 AM UTC 24 |
Sep 11 05:35:06 AM UTC 24 |
541811453 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.3524892630 |
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Sep 11 05:34:52 AM UTC 24 |
Sep 11 05:35:07 AM UTC 24 |
7141460036 ps |
T1565 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.3338000121 |
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Sep 11 05:30:16 AM UTC 24 |
Sep 11 05:35:07 AM UTC 24 |
7300425497 ps |
T1566 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.1071536499 |
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Sep 11 05:34:25 AM UTC 24 |
Sep 11 05:35:08 AM UTC 24 |
19976545678 ps |
T1567 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.1479029543 |
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Sep 11 05:35:07 AM UTC 24 |
Sep 11 05:35:10 AM UTC 24 |
281410635 ps |
T1568 |
/workspaces/repo/scratch/os_regression_2024_09_10/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.1466695248 |
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Sep 11 05:35:01 AM UTC 24 |
Sep 11 05:35:11 AM UTC 24 |
1137570535 ps |