Module Definition
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Module : kmac_core
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_kmac_core 0.00 0.00 0.00 0.00 0.00



Module Instance : tb.dut.u_kmac_core

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
1.32 0.00 0.00 6.61 0.00 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_key_slicer[0].u_key_slicer 0.00 0.00
gen_key_slicer[1].u_key_slicer 0.00 0.00
u_key_index_count 0.00 0.00
u_state_regs 0.00 0.00 0.00

Line Coverage for Module : kmac_core
Line No.TotalCoveredPercent
TOTAL7600.00
CONT_ASSIGN153100.00
ALWAYS161300.00
ALWAYS1663000.00
CONT_ASSIGN251100.00
CONT_ASSIGN252100.00
CONT_ASSIGN253100.00
CONT_ASSIGN254100.00
CONT_ASSIGN258100.00
CONT_ASSIGN260100.00
CONT_ASSIGN265100.00
ALWAYS268600.00
CONT_ASSIGN287100.00
ALWAYS307600.00
ALWAYS338600.00
ALWAYS338600.00
CONT_ASSIGN372100.00
CONT_ASSIGN375100.00
CONT_ASSIGN394100.00
ALWAYS420600.00
CONT_ASSIGN431100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
153 0 1
161 0 3
166 0 1
168 0 1
169 0 1
171 0 1
173 0 1
174 0 1
176 0 1
178 0 1
180 0 1
181 0 1
183 0 1
190 0 1
191 0 1
193 0 1
194 0 1
196 0 1
197 0 1
199 0 1
201 0 1
207 0 1
208 0 1
210 0 1
212 0 1
217 0 1
218 0 1
220 0 1
226 0 1
227 0 1
240 0 1
241 0 1
==> MISSING_ELSE
251 0 1
252 0 1
253 0 1
254 0 1
258 0 1
260 0 1
265 0 1
268 0 1
269 0 1
270 0 1
271 0 1
272 0 1
274 0 1
==> MISSING_ELSE
287 0 1
307 0 1
317 0 1
318 0 1
319 0 1
320 0 1
321 0 1
338 0 1
341 0 1
345 0 1
349 0 1
353 0 1
358 0 1
338 0 1
341 0 1
345 0 1
349 0 1
353 0 1
358 0 1
372 0 1
375 0 1
394 0 1
420 0 1
421 0 1
422 0 1
423 0 1
424 0 1
425 0 1
431 0 1


Cond Coverage for Module : kmac_core
TotalCoveredPercent
Conditions2800.00
Logical2800.00
Non-Logical00
Event00

 LINE       180
 EXPRESSION (kmac_en_i && start_i)
             ----1----    ---2---
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       207
 EXPRESSION (process_i || process_latched)
             ----1----    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       251
 EXPRESSION (en_kmac_datapath ? kmac_valid : fifo_valid_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       252
 EXPRESSION (en_kmac_datapath ? kmac_data : fifo_data_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       253
 EXPRESSION (en_kmac_datapath ? kmac_strb : fifo_strb_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       254
 EXPRESSION (en_kmac_datapath ? 1'b0 : msg_ready_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       258
 EXPRESSION (en_key_write ? '1 : '0)
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       260
 EXPRESSION (en_key_write ? key_sliced : ('{(*adjust*)default:'0}))
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       265
 EXPRESSION (kmac_en_i ? kmac_process : process_i)
             ----1----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       270
 EXPRESSION (process_i && ((!process_o)))
             ----1----    -------2------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       394
 EXPRESSION (kmac_valid & msg_ready_i)
             -----1----   -----2-----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       431
 EXPRESSION (key_index == block_addr_limit)
            ---------------1---------------
-1-StatusTests
0Not Covered
1Not Covered

FSM Coverage for Module : kmac_core
Summary for FSM :: st
TotalCoveredPercent
States 5 0 0.00 (Not included in score)
Transitions 8 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: st
statesLine No.CoveredTests
StKey 181 Not Covered
StKmacFlush 208 Not Covered
StKmacIdle 183 Not Covered
StKmacMsg 194 Not Covered
StTerminalError 241 Not Covered


transitionsLine No.CoveredTests
StKey->StKmacMsg 194 Not Covered
StKey->StTerminalError 241 Not Covered
StKmacFlush->StKmacIdle 218 Not Covered
StKmacFlush->StTerminalError 241 Not Covered
StKmacIdle->StKey 181 Not Covered
StKmacIdle->StTerminalError 241 Not Covered
StKmacMsg->StKmacFlush 208 Not Covered
StKmacMsg->StTerminalError 241 Not Covered



Branch Coverage for Module : kmac_core
Line No.TotalCoveredPercent
Branches 56 0 0.00
TERNARY 251 2 0 0.00
TERNARY 252 2 0 0.00
TERNARY 253 2 0 0.00
TERNARY 254 2 0 0.00
TERNARY 258 2 0 0.00
TERNARY 260 2 0 0.00
TERNARY 265 2 0 0.00
IF 161 2 0 0.00
CASE 178 10 0 0.00
IF 240 2 0 0.00
IF 268 4 0 0.00
CASE 307 6 0 0.00
CASE 420 6 0 0.00
CASE 338 6 0 0.00
CASE 338 6 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 251 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 252 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 253 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 254 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 258 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 260 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 265 (kmac_en_i) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 161 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 178 case (st) -2-: 180 if ((kmac_en_i && start_i)) -3-: 193 if (sent_blocksize) -4-: 207 if ((process_i || process_latched)) -5-: 217 if (prim_mubi_pkg::mubi4_test_true_strict(done_i))

Branches:
-1--2--3--4--5-StatusTests
StKmacIdle 1 - - - Not Covered
StKmacIdle 0 - - - Not Covered
StKey - 1 - - Not Covered
StKey - 0 - - Not Covered
StKmacMsg - - 1 - Not Covered
StKmacMsg - - 0 - Not Covered
StKmacFlush - - - 1 Not Covered
StKmacFlush - - - 0 Not Covered
StTerminalError - - - - Not Covered
default - - - - Not Covered


LineNo. Expression -1-: 240 if (lc_ctrl_pkg::lc_tx_test_true_loose(lc_escalate_en_i))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 268 if ((!rst_ni)) -2-: 270 if ((process_i && (!process_o))) -3-: 272 if ((process_o || prim_mubi_pkg::mubi4_test_true_strict(done_i)))

Branches:
-1--2--3-StatusTests
1 - - Not Covered
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Not Covered


LineNo. Expression -1-: 307 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 420 case (strength_i)

Branches:
-1-StatusTests
L128 Not Covered
L224 Not Covered
L256 Not Covered
L384 Not Covered
L512 Not Covered
default Not Covered


LineNo. Expression -1-: 338 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 338 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered

Line Coverage for Instance : tb.dut.u_kmac_core
Line No.TotalCoveredPercent
TOTAL7600.00
CONT_ASSIGN153100.00
ALWAYS161300.00
ALWAYS1663000.00
CONT_ASSIGN251100.00
CONT_ASSIGN252100.00
CONT_ASSIGN253100.00
CONT_ASSIGN254100.00
CONT_ASSIGN258100.00
CONT_ASSIGN260100.00
CONT_ASSIGN265100.00
ALWAYS268600.00
CONT_ASSIGN287100.00
ALWAYS307600.00
ALWAYS338600.00
ALWAYS338600.00
CONT_ASSIGN372100.00
CONT_ASSIGN375100.00
CONT_ASSIGN394100.00
ALWAYS420600.00
CONT_ASSIGN431100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
153 0 1
161 0 3
166 0 1
168 0 1
169 0 1
171 0 1
173 0 1
174 0 1
176 0 1
178 0 1
180 0 1
181 0 1
183 0 1
190 0 1
191 0 1
193 0 1
194 0 1
196 0 1
197 0 1
199 0 1
201 0 1
207 0 1
208 0 1
210 0 1
212 0 1
217 0 1
218 0 1
220 0 1
226 0 1
227 0 1
240 0 1
241 0 1
==> MISSING_ELSE
251 0 1
252 0 1
253 0 1
254 0 1
258 0 1
260 0 1
265 0 1
268 0 1
269 0 1
270 0 1
271 0 1
272 0 1
274 0 1
==> MISSING_ELSE
287 0 1
307 0 1
317 0 1
318 0 1
319 0 1
320 0 1
321 0 1
338 0 1
341 0 1
345 0 1
349 0 1
353 0 1
358 0 1
338 0 1
341 0 1
345 0 1
349 0 1
353 0 1
358 0 1
372 0 1
375 0 1
394 0 1
420 0 1
421 0 1
422 0 1
423 0 1
424 0 1
425 0 1
431 0 1


Cond Coverage for Instance : tb.dut.u_kmac_core
TotalCoveredPercent
Conditions2800.00
Logical2800.00
Non-Logical00
Event00

 LINE       180
 EXPRESSION (kmac_en_i && start_i)
             ----1----    ---2---
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       207
 EXPRESSION (process_i || process_latched)
             ----1----    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       251
 EXPRESSION (en_kmac_datapath ? kmac_valid : fifo_valid_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       252
 EXPRESSION (en_kmac_datapath ? kmac_data : fifo_data_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       253
 EXPRESSION (en_kmac_datapath ? kmac_strb : fifo_strb_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       254
 EXPRESSION (en_kmac_datapath ? 1'b0 : msg_ready_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       258
 EXPRESSION (en_key_write ? '1 : '0)
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       260
 EXPRESSION (en_key_write ? key_sliced : ('{(*adjust*)default:'0}))
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       265
 EXPRESSION (kmac_en_i ? kmac_process : process_i)
             ----1----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       270
 EXPRESSION (process_i && ((!process_o)))
             ----1----    -------2------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       394
 EXPRESSION (kmac_valid & msg_ready_i)
             -----1----   -----2-----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       431
 EXPRESSION (key_index == block_addr_limit)
            ---------------1---------------
-1-StatusTests
0Not Covered
1Not Covered

FSM Coverage for Instance : tb.dut.u_kmac_core
Summary for FSM :: st
TotalCoveredPercent
States 5 0 0.00 (Not included in score)
Transitions 7 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: st
statesLine No.CoveredTests
StKey 181 Not Covered
StKmacFlush 208 Not Covered
StKmacIdle 183 Not Covered
StKmacMsg 194 Not Covered
StTerminalError 241 Not Covered


transitionsLine No.CoveredTestsExclude Annotation
StKey->StKmacMsg 194 Not Covered
StKey->StTerminalError 241 Not Covered
StKmacFlush->StKmacIdle 218 Not Covered
StKmacFlush->StTerminalError 241 Excluded [LOW_RISK] The transition from any state to error_terminal state is fully verified in FPV.
StKmacIdle->StKey 181 Not Covered
StKmacIdle->StTerminalError 241 Not Covered
StKmacMsg->StKmacFlush 208 Not Covered
StKmacMsg->StTerminalError 241 Not Covered



Branch Coverage for Instance : tb.dut.u_kmac_core
Line No.TotalCoveredPercent
Branches 56 0 0.00
TERNARY 251 2 0 0.00
TERNARY 252 2 0 0.00
TERNARY 253 2 0 0.00
TERNARY 254 2 0 0.00
TERNARY 258 2 0 0.00
TERNARY 260 2 0 0.00
TERNARY 265 2 0 0.00
IF 161 2 0 0.00
CASE 178 10 0 0.00
IF 240 2 0 0.00
IF 268 4 0 0.00
CASE 307 6 0 0.00
CASE 420 6 0 0.00
CASE 338 6 0 0.00
CASE 338 6 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 251 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 252 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 253 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 254 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 258 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 260 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 265 (kmac_en_i) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 161 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 178 case (st) -2-: 180 if ((kmac_en_i && start_i)) -3-: 193 if (sent_blocksize) -4-: 207 if ((process_i || process_latched)) -5-: 217 if (prim_mubi_pkg::mubi4_test_true_strict(done_i))

Branches:
-1--2--3--4--5-StatusTests
StKmacIdle 1 - - - Not Covered
StKmacIdle 0 - - - Not Covered
StKey - 1 - - Not Covered
StKey - 0 - - Not Covered
StKmacMsg - - 1 - Not Covered
StKmacMsg - - 0 - Not Covered
StKmacFlush - - - 1 Not Covered
StKmacFlush - - - 0 Not Covered
StTerminalError - - - - Not Covered
default - - - - Not Covered


LineNo. Expression -1-: 240 if (lc_ctrl_pkg::lc_tx_test_true_loose(lc_escalate_en_i))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 268 if ((!rst_ni)) -2-: 270 if ((process_i && (!process_o))) -3-: 272 if ((process_o || prim_mubi_pkg::mubi4_test_true_strict(done_i)))

Branches:
-1--2--3-StatusTests
1 - - Not Covered
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Not Covered


LineNo. Expression -1-: 307 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 420 case (strength_i)

Branches:
-1-StatusTests
L128 Not Covered
L224 Not Covered
L256 Not Covered
L384 Not Covered
L512 Not Covered
default Not Covered


LineNo. Expression -1-: 338 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 338 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%