| T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.2507988315 |
|
|
Aug 25 07:46:48 AM UTC 24 |
Aug 25 07:47:07 AM UTC 24 |
424569807 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.1394090346 |
|
|
Aug 25 07:46:58 AM UTC 24 |
Aug 25 07:47:08 AM UTC 24 |
2548594903 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.4019852565 |
|
|
Aug 25 07:46:01 AM UTC 24 |
Aug 25 07:47:09 AM UTC 24 |
7397393175 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.3839687962 |
|
|
Aug 25 07:46:57 AM UTC 24 |
Aug 25 07:47:09 AM UTC 24 |
357064354 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2924434330 |
|
|
Aug 25 07:46:20 AM UTC 24 |
Aug 25 07:47:11 AM UTC 24 |
558609570 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.1097361416 |
|
|
Aug 25 07:46:59 AM UTC 24 |
Aug 25 07:47:14 AM UTC 24 |
3689855770 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.289119205 |
|
|
Aug 25 07:47:52 AM UTC 24 |
Aug 25 07:47:54 AM UTC 24 |
35840622 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.3197448249 |
|
|
Aug 25 07:45:15 AM UTC 24 |
Aug 25 07:47:19 AM UTC 24 |
1572285473 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.2638087575 |
|
|
Aug 25 07:47:39 AM UTC 24 |
Aug 25 07:47:55 AM UTC 24 |
291245163 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_errors.2508341837 |
|
|
Aug 25 07:46:58 AM UTC 24 |
Aug 25 07:47:25 AM UTC 24 |
499981371 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1868393580 |
|
|
Aug 25 07:43:49 AM UTC 24 |
Aug 25 07:47:27 AM UTC 24 |
7418069889 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.1859164208 |
|
|
Aug 25 07:46:27 AM UTC 24 |
Aug 25 07:47:28 AM UTC 24 |
192041778 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.1874420250 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:30 AM UTC 24 |
89790454 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.3470059257 |
|
|
Aug 25 07:44:40 AM UTC 24 |
Aug 25 07:47:55 AM UTC 24 |
16565195645 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.266082209 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:30 AM UTC 24 |
19639870 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.3272613094 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:31 AM UTC 24 |
15739383 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.3949651035 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:31 AM UTC 24 |
15226584 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.2504501787 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:32 AM UTC 24 |
43407536 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.3503830367 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:33 AM UTC 24 |
1632447721 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.3946245819 |
|
|
Aug 25 07:45:11 AM UTC 24 |
Aug 25 07:47:33 AM UTC 24 |
9378100659 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1984139191 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:34 AM UTC 24 |
665096631 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.2556938232 |
|
|
Aug 25 07:46:33 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
1248236122 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.2458463234 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
91324924 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.2150195411 |
|
|
Aug 25 07:47:30 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
158467930 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.2007270614 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
198543825 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.3667611990 |
|
|
Aug 25 07:47:46 AM UTC 24 |
Aug 25 07:47:56 AM UTC 24 |
159412377 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.2668952174 |
|
|
Aug 25 07:47:24 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
981931249 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.4121126142 |
|
|
Aug 25 07:47:30 AM UTC 24 |
Aug 25 07:47:35 AM UTC 24 |
219402789 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.2437859677 |
|
|
Aug 25 07:47:36 AM UTC 24 |
Aug 25 07:47:38 AM UTC 24 |
44225426 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.2383018480 |
|
|
Aug 25 07:47:36 AM UTC 24 |
Aug 25 07:47:38 AM UTC 24 |
15332207 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.2472586125 |
|
|
Aug 25 07:47:36 AM UTC 24 |
Aug 25 07:47:39 AM UTC 24 |
16211166 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all.2387528544 |
|
|
Aug 25 07:46:31 AM UTC 24 |
Aug 25 07:47:39 AM UTC 24 |
11009712090 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.3775650075 |
|
|
Aug 25 07:47:24 AM UTC 24 |
Aug 25 07:47:41 AM UTC 24 |
213152772 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.2409162823 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:42 AM UTC 24 |
1075769902 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.2761741023 |
|
|
Aug 25 07:47:24 AM UTC 24 |
Aug 25 07:47:43 AM UTC 24 |
1558948019 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.915916872 |
|
|
Aug 25 07:47:37 AM UTC 24 |
Aug 25 07:47:43 AM UTC 24 |
364184842 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.486210504 |
|
|
Aug 25 07:46:43 AM UTC 24 |
Aug 25 07:47:43 AM UTC 24 |
1357610676 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.3680561720 |
|
|
Aug 25 07:47:32 AM UTC 24 |
Aug 25 07:47:43 AM UTC 24 |
1675624033 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.870643143 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:44 AM UTC 24 |
1150124634 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.4199020563 |
|
|
Aug 25 07:47:39 AM UTC 24 |
Aug 25 07:47:45 AM UTC 24 |
155530601 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.4163821216 |
|
|
Aug 25 07:46:22 AM UTC 24 |
Aug 25 07:47:45 AM UTC 24 |
5915756703 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.1099863247 |
|
|
Aug 25 07:47:33 AM UTC 24 |
Aug 25 07:47:45 AM UTC 24 |
236355041 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_errors.4030415427 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:46 AM UTC 24 |
254427673 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.305900364 |
|
|
Aug 25 07:47:31 AM UTC 24 |
Aug 25 07:47:46 AM UTC 24 |
681639328 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.536471846 |
|
|
Aug 25 07:47:44 AM UTC 24 |
Aug 25 07:47:47 AM UTC 24 |
26821534 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.778115174 |
|
|
Aug 25 07:47:44 AM UTC 24 |
Aug 25 07:47:47 AM UTC 24 |
45194856 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.988306457 |
|
|
Aug 25 07:47:44 AM UTC 24 |
Aug 25 07:47:48 AM UTC 24 |
68990075 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.1544875633 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:49 AM UTC 24 |
773299580 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.1709631732 |
|
|
Aug 25 07:42:56 AM UTC 24 |
Aug 25 07:47:49 AM UTC 24 |
53699231182 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.1111337511 |
|
|
Aug 25 07:46:55 AM UTC 24 |
Aug 25 07:47:51 AM UTC 24 |
809444081 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1891433999 |
|
|
Aug 25 07:47:37 AM UTC 24 |
Aug 25 07:47:51 AM UTC 24 |
597800386 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_errors.2329469395 |
|
|
Aug 25 07:47:31 AM UTC 24 |
Aug 25 07:47:51 AM UTC 24 |
1646173592 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.3305729629 |
|
|
Aug 25 07:47:39 AM UTC 24 |
Aug 25 07:47:51 AM UTC 24 |
884733543 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.4216039661 |
|
|
Aug 25 07:47:53 AM UTC 24 |
Aug 25 07:47:55 AM UTC 24 |
21629342 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.2273152223 |
|
|
Aug 25 07:47:34 AM UTC 24 |
Aug 25 07:47:52 AM UTC 24 |
1653790709 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.1916545846 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:47:56 AM UTC 24 |
4716043966 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.609456644 |
|
|
Aug 25 07:47:47 AM UTC 24 |
Aug 25 07:47:56 AM UTC 24 |
325528179 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.2343115225 |
|
|
Aug 25 07:47:41 AM UTC 24 |
Aug 25 07:47:57 AM UTC 24 |
1112727367 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.361122961 |
|
|
Aug 25 07:47:53 AM UTC 24 |
Aug 25 07:47:57 AM UTC 24 |
17820089 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.4121851833 |
|
|
Aug 25 07:47:42 AM UTC 24 |
Aug 25 07:47:59 AM UTC 24 |
1313794519 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.2737519492 |
|
|
Aug 25 07:47:46 AM UTC 24 |
Aug 25 07:47:59 AM UTC 24 |
76069132 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.2491545329 |
|
|
Aug 25 07:47:53 AM UTC 24 |
Aug 25 07:48:00 AM UTC 24 |
86448712 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_errors.87362400 |
|
|
Aug 25 07:47:38 AM UTC 24 |
Aug 25 07:48:00 AM UTC 24 |
3786632582 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.1044724216 |
|
|
Aug 25 07:47:58 AM UTC 24 |
Aug 25 07:48:01 AM UTC 24 |
76288471 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.3116974644 |
|
|
Aug 25 07:48:00 AM UTC 24 |
Aug 25 07:48:02 AM UTC 24 |
11488084 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.4127911476 |
|
|
Aug 25 07:47:47 AM UTC 24 |
Aug 25 07:48:02 AM UTC 24 |
1065835585 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.27506021 |
|
|
Aug 25 07:47:47 AM UTC 24 |
Aug 25 07:48:04 AM UTC 24 |
1416128926 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.1534153861 |
|
|
Aug 25 07:47:47 AM UTC 24 |
Aug 25 07:48:05 AM UTC 24 |
1156902574 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3465668853 |
|
|
Aug 25 07:48:02 AM UTC 24 |
Aug 25 07:48:05 AM UTC 24 |
23812874 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_errors.1796837354 |
|
|
Aug 25 07:47:46 AM UTC 24 |
Aug 25 07:48:08 AM UTC 24 |
1928695557 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.2521002572 |
|
|
Aug 25 07:47:53 AM UTC 24 |
Aug 25 07:48:09 AM UTC 24 |
88377118 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.3358080788 |
|
|
Aug 25 07:47:56 AM UTC 24 |
Aug 25 07:48:09 AM UTC 24 |
593223013 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.3365856431 |
|
|
Aug 25 07:47:57 AM UTC 24 |
Aug 25 07:48:09 AM UTC 24 |
202981917 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.661598008 |
|
|
Aug 25 07:48:01 AM UTC 24 |
Aug 25 07:48:12 AM UTC 24 |
94413486 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.1055530488 |
|
|
Aug 25 07:45:29 AM UTC 24 |
Aug 25 07:48:12 AM UTC 24 |
4937113450 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.3597585333 |
|
|
Aug 25 07:48:05 AM UTC 24 |
Aug 25 07:48:13 AM UTC 24 |
3120774505 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.1188926869 |
|
|
Aug 25 07:48:11 AM UTC 24 |
Aug 25 07:48:14 AM UTC 24 |
21139218 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.4130891459 |
|
|
Aug 25 07:48:00 AM UTC 24 |
Aug 25 07:48:15 AM UTC 24 |
381650318 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.853230551 |
|
|
Aug 25 07:47:32 AM UTC 24 |
Aug 25 07:48:15 AM UTC 24 |
2375606132 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.428667853 |
|
|
Aug 25 07:47:36 AM UTC 24 |
Aug 25 07:48:15 AM UTC 24 |
597148205 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.1518329627 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:48:15 AM UTC 24 |
255428573 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.870996174 |
|
|
Aug 25 07:48:13 AM UTC 24 |
Aug 25 07:48:16 AM UTC 24 |
27601034 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.840135250 |
|
|
Aug 25 07:47:57 AM UTC 24 |
Aug 25 07:48:17 AM UTC 24 |
391388542 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.1347211876 |
|
|
Aug 25 07:48:12 AM UTC 24 |
Aug 25 07:48:17 AM UTC 24 |
211241682 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.749830252 |
|
|
Aug 25 07:48:03 AM UTC 24 |
Aug 25 07:48:19 AM UTC 24 |
427694573 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_errors.2029165532 |
|
|
Aug 25 07:48:03 AM UTC 24 |
Aug 25 07:48:20 AM UTC 24 |
1026316278 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.2635483614 |
|
|
Aug 25 07:47:48 AM UTC 24 |
Aug 25 07:48:20 AM UTC 24 |
2372506275 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.1632463152 |
|
|
Aug 25 07:47:57 AM UTC 24 |
Aug 25 07:48:20 AM UTC 24 |
318964175 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.3357136403 |
|
|
Aug 25 07:48:16 AM UTC 24 |
Aug 25 07:48:20 AM UTC 24 |
39937689 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.3967879362 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:48:20 AM UTC 24 |
1545314521 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.177873549 |
|
|
Aug 25 07:48:16 AM UTC 24 |
Aug 25 07:48:23 AM UTC 24 |
128531155 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.758048253 |
|
|
Aug 25 07:48:09 AM UTC 24 |
Aug 25 07:48:23 AM UTC 24 |
286397846 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_errors.3372712201 |
|
|
Aug 25 07:47:56 AM UTC 24 |
Aug 25 07:48:24 AM UTC 24 |
599234406 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.472351622 |
|
|
Aug 25 07:48:07 AM UTC 24 |
Aug 25 07:48:25 AM UTC 24 |
404447867 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.1598272327 |
|
|
Aug 25 07:48:15 AM UTC 24 |
Aug 25 07:48:28 AM UTC 24 |
93613133 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.2273627457 |
|
|
Aug 25 07:48:05 AM UTC 24 |
Aug 25 07:48:29 AM UTC 24 |
792259268 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3917468901 |
|
|
Aug 25 07:47:57 AM UTC 24 |
Aug 25 07:48:29 AM UTC 24 |
6111590414 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.2937751176 |
|
|
Aug 25 07:48:16 AM UTC 24 |
Aug 25 07:48:30 AM UTC 24 |
319394709 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.964615937 |
|
|
Aug 25 07:48:17 AM UTC 24 |
Aug 25 07:48:31 AM UTC 24 |
247837948 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.2407791578 |
|
|
Aug 25 07:48:17 AM UTC 24 |
Aug 25 07:48:32 AM UTC 24 |
344056056 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.641295493 |
|
|
Aug 25 07:47:53 AM UTC 24 |
Aug 25 07:48:33 AM UTC 24 |
580282273 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_errors.1414724681 |
|
|
Aug 25 07:48:16 AM UTC 24 |
Aug 25 07:48:36 AM UTC 24 |
1296698967 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.15088207 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:46 AM UTC 24 |
10155321 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1339298717 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:47 AM UTC 24 |
151672797 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.1181208208 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:47 AM UTC 24 |
89937242 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.438015911 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:48 AM UTC 24 |
50838158 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.3868277126 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:48 AM UTC 24 |
134997008 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.1890510849 |
|
|
Aug 25 07:48:46 AM UTC 24 |
Aug 25 07:48:48 AM UTC 24 |
46373589 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all.1833085530 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:48:49 AM UTC 24 |
7050127870 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.3092090089 |
|
|
Aug 25 07:48:46 AM UTC 24 |
Aug 25 07:48:50 AM UTC 24 |
37312773 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.2928533164 |
|
|
Aug 25 07:47:34 AM UTC 24 |
Aug 25 07:48:50 AM UTC 24 |
1474103450 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.635680511 |
|
|
Aug 25 07:48:30 AM UTC 24 |
Aug 25 07:48:51 AM UTC 24 |
3090633100 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.4019223490 |
|
|
Aug 25 07:47:46 AM UTC 24 |
Aug 25 07:48:51 AM UTC 24 |
351031417 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.2040740187 |
|
|
Aug 25 07:48:47 AM UTC 24 |
Aug 25 07:48:53 AM UTC 24 |
141578162 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.2609742888 |
|
|
Aug 25 07:44:24 AM UTC 24 |
Aug 25 07:48:54 AM UTC 24 |
5585287366 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.403370782 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:55 AM UTC 24 |
1933505234 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.327416569 |
|
|
Aug 25 07:48:54 AM UTC 24 |
Aug 25 07:48:56 AM UTC 24 |
11167806 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1145163737 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:56 AM UTC 24 |
80216395 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3441530625 |
|
|
Aug 25 07:48:53 AM UTC 24 |
Aug 25 07:48:56 AM UTC 24 |
58026623 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.565832917 |
|
|
Aug 25 07:47:27 AM UTC 24 |
Aug 25 07:48:57 AM UTC 24 |
1245417016 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.1973366269 |
|
|
Aug 25 07:48:53 AM UTC 24 |
Aug 25 07:48:57 AM UTC 24 |
31014355 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_errors.1233317410 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:49:07 AM UTC 24 |
5413417665 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.512496124 |
|
|
Aug 25 07:48:51 AM UTC 24 |
Aug 25 07:48:58 AM UTC 24 |
85413016 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.1742433587 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:48:58 AM UTC 24 |
281735943 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.815025126 |
|
|
Aug 25 07:48:14 AM UTC 24 |
Aug 25 07:48:59 AM UTC 24 |
221356508 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.937640392 |
|
|
Aug 25 07:48:01 AM UTC 24 |
Aug 25 07:49:01 AM UTC 24 |
273441858 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.2000144834 |
|
|
Aug 25 07:48:57 AM UTC 24 |
Aug 25 07:49:02 AM UTC 24 |
303228011 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.3208822502 |
|
|
Aug 25 07:48:52 AM UTC 24 |
Aug 25 07:49:02 AM UTC 24 |
331192332 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.3787662850 |
|
|
Aug 25 07:49:00 AM UTC 24 |
Aug 25 07:49:03 AM UTC 24 |
173449135 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.1283421833 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:49:03 AM UTC 24 |
525573498 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.3386788114 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:49:04 AM UTC 24 |
363607015 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2504463131 |
|
|
Aug 25 07:48:58 AM UTC 24 |
Aug 25 07:49:04 AM UTC 24 |
254415339 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.4074857933 |
|
|
Aug 25 07:48:53 AM UTC 24 |
Aug 25 07:49:06 AM UTC 24 |
265489972 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.1674056064 |
|
|
Aug 25 07:46:40 AM UTC 24 |
Aug 25 07:49:06 AM UTC 24 |
4951117063 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.1322405525 |
|
|
Aug 25 07:49:03 AM UTC 24 |
Aug 25 07:49:06 AM UTC 24 |
12485252 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.1768962413 |
|
|
Aug 25 07:46:18 AM UTC 24 |
Aug 25 07:49:06 AM UTC 24 |
14938514730 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.3033491783 |
|
|
Aug 25 07:49:02 AM UTC 24 |
Aug 25 07:49:07 AM UTC 24 |
159391450 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.206811400 |
|
|
Aug 25 07:48:51 AM UTC 24 |
Aug 25 07:49:08 AM UTC 24 |
758311690 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.840954568 |
|
|
Aug 25 07:48:53 AM UTC 24 |
Aug 25 07:49:08 AM UTC 24 |
555031613 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.4122956538 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:49:08 AM UTC 24 |
1165338274 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.3834887682 |
|
|
Aug 25 07:48:53 AM UTC 24 |
Aug 25 07:49:08 AM UTC 24 |
163144733 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.3095908418 |
|
|
Aug 25 07:49:05 AM UTC 24 |
Aug 25 07:49:09 AM UTC 24 |
45581264 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.3910361490 |
|
|
Aug 25 07:40:33 AM UTC 24 |
Aug 25 07:49:09 AM UTC 24 |
304147049325 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.1719387534 |
|
|
Aug 25 07:48:58 AM UTC 24 |
Aug 25 07:49:11 AM UTC 24 |
1292286976 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.694453073 |
|
|
Aug 25 07:49:04 AM UTC 24 |
Aug 25 07:49:12 AM UTC 24 |
166677429 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.451906527 |
|
|
Aug 25 07:48:56 AM UTC 24 |
Aug 25 07:49:13 AM UTC 24 |
197157066 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.2382752192 |
|
|
Aug 25 07:48:58 AM UTC 24 |
Aug 25 07:49:14 AM UTC 24 |
298474195 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.1618791926 |
|
|
Aug 25 07:47:27 AM UTC 24 |
Aug 25 07:49:15 AM UTC 24 |
18859194659 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_errors.1531706689 |
|
|
Aug 25 07:48:51 AM UTC 24 |
Aug 25 07:49:15 AM UTC 24 |
614253875 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.3963692651 |
|
|
Aug 25 07:48:59 AM UTC 24 |
Aug 25 07:49:15 AM UTC 24 |
299820234 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.460768217 |
|
|
Aug 25 07:48:59 AM UTC 24 |
Aug 25 07:49:16 AM UTC 24 |
1421483056 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.1357091107 |
|
|
Aug 25 07:49:06 AM UTC 24 |
Aug 25 07:49:16 AM UTC 24 |
2256936835 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.2087649109 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:49:17 AM UTC 24 |
77816305 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.1214617132 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:49:17 AM UTC 24 |
13165763 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.2002504824 |
|
|
Aug 25 07:47:28 AM UTC 24 |
Aug 25 07:49:17 AM UTC 24 |
13162075706 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.2875999459 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:49:18 AM UTC 24 |
137099342 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.955070299 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:20 AM UTC 24 |
11216438 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_errors.2547583246 |
|
|
Aug 25 07:49:05 AM UTC 24 |
Aug 25 07:49:20 AM UTC 24 |
491708657 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_errors.1496246342 |
|
|
Aug 25 07:48:57 AM UTC 24 |
Aug 25 07:49:20 AM UTC 24 |
2078456969 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.486347040 |
|
|
Aug 25 07:49:18 AM UTC 24 |
Aug 25 07:49:21 AM UTC 24 |
54743320 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.3982535241 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:49:21 AM UTC 24 |
274429651 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.3533199896 |
|
|
Aug 25 07:49:58 AM UTC 24 |
Aug 25 07:50:11 AM UTC 24 |
528930509 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.2039363127 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:21 AM UTC 24 |
1477266920 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.2028387246 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:22 AM UTC 24 |
29704693 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.1712048169 |
|
|
Aug 25 07:48:46 AM UTC 24 |
Aug 25 07:49:22 AM UTC 24 |
338054045 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.103418479 |
|
|
Aug 25 07:49:08 AM UTC 24 |
Aug 25 07:49:22 AM UTC 24 |
699335256 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.3221951033 |
|
|
Aug 25 07:49:19 AM UTC 24 |
Aug 25 07:49:23 AM UTC 24 |
30115251 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.666652589 |
|
|
Aug 25 07:49:05 AM UTC 24 |
Aug 25 07:49:23 AM UTC 24 |
292303680 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.1478406162 |
|
|
Aug 25 07:49:08 AM UTC 24 |
Aug 25 07:49:26 AM UTC 24 |
6990592290 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.451957945 |
|
|
Aug 25 07:49:22 AM UTC 24 |
Aug 25 07:49:26 AM UTC 24 |
141037016 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.1652561799 |
|
|
Aug 25 07:49:23 AM UTC 24 |
Aug 25 07:49:27 AM UTC 24 |
28697019 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.3634769057 |
|
|
Aug 25 07:49:24 AM UTC 24 |
Aug 25 07:49:27 AM UTC 24 |
42562126 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.931616004 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:28 AM UTC 24 |
171080873 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.548570035 |
|
|
Aug 25 07:49:18 AM UTC 24 |
Aug 25 07:49:30 AM UTC 24 |
70151031 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.2397879511 |
|
|
Aug 25 07:49:08 AM UTC 24 |
Aug 25 07:49:30 AM UTC 24 |
1387070531 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.4040514366 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:49:31 AM UTC 24 |
87090433 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.3241695586 |
|
|
Aug 25 07:49:28 AM UTC 24 |
Aug 25 07:49:33 AM UTC 24 |
107623618 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.2834008327 |
|
|
Aug 25 07:49:21 AM UTC 24 |
Aug 25 07:49:33 AM UTC 24 |
2324247955 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.3407600432 |
|
|
Aug 25 07:49:28 AM UTC 24 |
Aug 25 07:49:34 AM UTC 24 |
218971105 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_errors.1086694687 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:37 AM UTC 24 |
288107641 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.3359871159 |
|
|
Aug 25 07:49:22 AM UTC 24 |
Aug 25 07:49:38 AM UTC 24 |
277878427 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.47833029 |
|
|
Aug 25 07:49:31 AM UTC 24 |
Aug 25 07:49:39 AM UTC 24 |
229086771 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.2122064590 |
|
|
Aug 25 07:49:22 AM UTC 24 |
Aug 25 07:49:39 AM UTC 24 |
360499488 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.1623250522 |
|
|
Aug 25 07:49:23 AM UTC 24 |
Aug 25 07:49:40 AM UTC 24 |
2824078962 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.1510681285 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:42 AM UTC 24 |
1446641883 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.3664451156 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:42 AM UTC 24 |
2086175696 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.1244565994 |
|
|
Aug 25 07:50:04 AM UTC 24 |
Aug 25 07:50:09 AM UTC 24 |
54469631 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.3010434736 |
|
|
Aug 25 07:49:41 AM UTC 24 |
Aug 25 07:49:44 AM UTC 24 |
26147965 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.2698768413 |
|
|
Aug 25 07:49:56 AM UTC 24 |
Aug 25 07:50:10 AM UTC 24 |
184637399 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.2804950299 |
|
|
Aug 25 07:49:22 AM UTC 24 |
Aug 25 07:49:45 AM UTC 24 |
725280855 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_errors.2108205713 |
|
|
Aug 25 07:49:21 AM UTC 24 |
Aug 25 07:49:45 AM UTC 24 |
1775890054 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.2126693686 |
|
|
Aug 25 07:49:17 AM UTC 24 |
Aug 25 07:49:46 AM UTC 24 |
2671491688 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1849854306 |
|
|
Aug 25 07:49:31 AM UTC 24 |
Aug 25 07:49:47 AM UTC 24 |
1278053263 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.3777481564 |
|
|
Aug 25 07:49:29 AM UTC 24 |
Aug 25 07:49:47 AM UTC 24 |
1206104835 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_errors.3632491451 |
|
|
Aug 25 07:49:28 AM UTC 24 |
Aug 25 07:49:49 AM UTC 24 |
360605268 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.1138716967 |
|
|
Aug 25 07:49:31 AM UTC 24 |
Aug 25 07:49:50 AM UTC 24 |
1291455585 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.2343449168 |
|
|
Aug 25 07:49:18 AM UTC 24 |
Aug 25 07:49:54 AM UTC 24 |
259337065 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2646618682 |
|
|
Aug 25 07:49:53 AM UTC 24 |
Aug 25 07:49:56 AM UTC 24 |
13037971 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.1590088640 |
|
|
Aug 25 07:49:53 AM UTC 24 |
Aug 25 07:49:58 AM UTC 24 |
881856521 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.1072711844 |
|
|
Aug 25 07:49:53 AM UTC 24 |
Aug 25 07:49:58 AM UTC 24 |
247632862 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.280022242 |
|
|
Aug 25 07:49:54 AM UTC 24 |
Aug 25 07:49:58 AM UTC 24 |
537483542 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.3406647774 |
|
|
Aug 25 07:43:42 AM UTC 24 |
Aug 25 07:50:12 AM UTC 24 |
14099589139 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.2651036277 |
|
|
Aug 25 07:49:53 AM UTC 24 |
Aug 25 07:49:58 AM UTC 24 |
196884771 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.993158138 |
|
|
Aug 25 07:49:04 AM UTC 24 |
Aug 25 07:49:59 AM UTC 24 |
2032530571 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.1747659060 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:49:59 AM UTC 24 |
41217552 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.1704477963 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:49:59 AM UTC 24 |
36270206 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.1263231716 |
|
|
Aug 25 07:49:54 AM UTC 24 |
Aug 25 07:50:10 AM UTC 24 |
1141817478 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.4158582427 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:50:01 AM UTC 24 |
40885093 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.1873331415 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:50:02 AM UTC 24 |
182332325 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.2597265340 |
|
|
Aug 25 07:50:00 AM UTC 24 |
Aug 25 07:50:03 AM UTC 24 |
51013342 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.2236018166 |
|
|
Aug 25 07:48:55 AM UTC 24 |
Aug 25 07:50:03 AM UTC 24 |
1257488770 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.275063356 |
|
|
Aug 25 07:50:02 AM UTC 24 |
Aug 25 07:50:04 AM UTC 24 |
13189723 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.21255918 |
|
|
Aug 25 07:49:27 AM UTC 24 |
Aug 25 07:50:05 AM UTC 24 |
176722752 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.2033174889 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:50:06 AM UTC 24 |
1688398200 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.656085235 |
|
|
Aug 25 07:49:41 AM UTC 24 |
Aug 25 07:50:06 AM UTC 24 |
2605437446 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.3241554696 |
|
|
Aug 25 07:50:02 AM UTC 24 |
Aug 25 07:50:07 AM UTC 24 |
49266102 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all.3929583206 |
|
|
Aug 25 07:47:57 AM UTC 24 |
Aug 25 07:50:10 AM UTC 24 |
3794196518 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.3381201934 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:50:12 AM UTC 24 |
60964057 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.2999376708 |
|
|
Aug 25 07:49:59 AM UTC 24 |
Aug 25 07:50:13 AM UTC 24 |
533177798 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.3139108032 |
|
|
Aug 25 07:49:14 AM UTC 24 |
Aug 25 07:50:13 AM UTC 24 |
626741387 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.1973648528 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:50:13 AM UTC 24 |
1892075457 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.1693553361 |
|
|
Aug 25 07:49:59 AM UTC 24 |
Aug 25 07:50:13 AM UTC 24 |
825088644 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all_with_rand_reset.1866263368 |
|
|
Aug 25 07:48:44 AM UTC 24 |
Aug 25 07:51:05 AM UTC 24 |
3471210983 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.2023991177 |
|
|
Aug 25 07:50:12 AM UTC 24 |
Aug 25 07:50:14 AM UTC 24 |
14271210 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3402597912 |
|
|
Aug 25 07:49:56 AM UTC 24 |
Aug 25 07:50:14 AM UTC 24 |
524528156 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_errors.1614967623 |
|
|
Aug 25 07:49:53 AM UTC 24 |
Aug 25 07:50:15 AM UTC 24 |
1991721467 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.3666519186 |
|
|
Aug 25 07:50:13 AM UTC 24 |
Aug 25 07:50:15 AM UTC 24 |
29647798 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.2216433601 |
|
|
Aug 25 07:50:13 AM UTC 24 |
Aug 25 07:50:16 AM UTC 24 |
101838751 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.2477455858 |
|
|
Aug 25 07:49:56 AM UTC 24 |
Aug 25 07:50:17 AM UTC 24 |
293007561 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.4088614144 |
|
|
Aug 25 07:49:59 AM UTC 24 |
Aug 25 07:50:17 AM UTC 24 |
802411921 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_errors.3636056279 |
|
|
Aug 25 07:49:57 AM UTC 24 |
Aug 25 07:50:18 AM UTC 24 |
735043530 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.1423914844 |
|
|
Aug 25 07:50:04 AM UTC 24 |
Aug 25 07:50:19 AM UTC 24 |
260814359 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.1770836618 |
|
|
Aug 25 07:50:07 AM UTC 24 |
Aug 25 07:50:19 AM UTC 24 |
679823998 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.2167417322 |
|
|
Aug 25 07:50:07 AM UTC 24 |
Aug 25 07:50:20 AM UTC 24 |
260755054 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.3473258074 |
|
|
Aug 25 07:50:15 AM UTC 24 |
Aug 25 07:50:20 AM UTC 24 |
73628976 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.676602786 |
|
|
Aug 25 07:50:17 AM UTC 24 |
Aug 25 07:50:20 AM UTC 24 |
51155217 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.2158314309 |
|
|
Aug 25 07:50:14 AM UTC 24 |
Aug 25 07:50:21 AM UTC 24 |
173423993 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_stress_all_with_rand_reset.1758043430 |
|
|
Aug 25 07:49:41 AM UTC 24 |
Aug 25 07:50:21 AM UTC 24 |
1175732519 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_stress_all_with_rand_reset.259701922 |
|
|
Aug 25 07:48:10 AM UTC 24 |
Aug 25 07:50:21 AM UTC 24 |
2558679326 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.2777756349 |
|
|
Aug 25 07:50:19 AM UTC 24 |
Aug 25 07:50:22 AM UTC 24 |
15267533 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_errors.4067997136 |
|
|
Aug 25 07:50:05 AM UTC 24 |
Aug 25 07:50:24 AM UTC 24 |
693102538 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.1950231477 |
|
|
Aug 25 07:50:10 AM UTC 24 |
Aug 25 07:50:24 AM UTC 24 |
299165674 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_stress_all.4174945593 |
|
|
Aug 25 07:48:10 AM UTC 24 |
Aug 25 07:50:25 AM UTC 24 |
7213566150 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.2085227519 |
|
|
Aug 25 07:50:19 AM UTC 24 |
Aug 25 07:50:25 AM UTC 24 |
60747324 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.701226810 |
|
|
Aug 25 07:50:21 AM UTC 24 |
Aug 25 07:50:27 AM UTC 24 |
74485313 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.1802600066 |
|
|
Aug 25 07:50:07 AM UTC 24 |
Aug 25 07:50:27 AM UTC 24 |
2367374634 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.2011763481 |
|
|
Aug 25 07:50:15 AM UTC 24 |
Aug 25 07:50:27 AM UTC 24 |
233176332 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.950806446 |
|
|
Aug 25 07:50:25 AM UTC 24 |
Aug 25 07:50:28 AM UTC 24 |
16777975 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/48.lc_ctrl_volatile_unlock_smoke.1551021769 |
|
|
Aug 25 07:50:27 AM UTC 24 |
Aug 25 07:50:29 AM UTC 24 |
36414950 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/48.lc_ctrl_smoke.878458673 |
|
|
Aug 25 07:50:25 AM UTC 24 |
Aug 25 07:50:30 AM UTC 24 |
165963293 ps |