| T359 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.1544723303 |
|
|
Sep 04 06:14:31 AM UTC 24 |
Sep 04 06:14:34 AM UTC 24 |
585900257 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.3026618205 |
|
|
Sep 04 06:14:19 AM UTC 24 |
Sep 04 06:14:34 AM UTC 24 |
1588182308 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.3522378576 |
|
|
Sep 04 06:15:12 AM UTC 24 |
Sep 04 06:15:18 AM UTC 24 |
406344659 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.1814856171 |
|
|
Sep 04 06:14:34 AM UTC 24 |
Sep 04 06:14:36 AM UTC 24 |
18778397 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.441014607 |
|
|
Sep 04 06:14:27 AM UTC 24 |
Sep 04 06:14:36 AM UTC 24 |
229112173 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_smoke.2172605762 |
|
|
Sep 04 06:14:24 AM UTC 24 |
Sep 04 06:14:37 AM UTC 24 |
236882795 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_errors.735853271 |
|
|
Sep 04 06:13:25 AM UTC 24 |
Sep 04 06:14:38 AM UTC 24 |
17551996827 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.2850523682 |
|
|
Sep 04 06:14:36 AM UTC 24 |
Sep 04 06:14:38 AM UTC 24 |
22544468 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.1931516775 |
|
|
Sep 04 06:14:28 AM UTC 24 |
Sep 04 06:15:19 AM UTC 24 |
2238706977 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.858658452 |
|
|
Sep 04 06:14:12 AM UTC 24 |
Sep 04 06:14:39 AM UTC 24 |
323538067 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.1795433264 |
|
|
Sep 04 06:14:27 AM UTC 24 |
Sep 04 06:14:40 AM UTC 24 |
500964367 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.4163107877 |
|
|
Sep 04 06:13:42 AM UTC 24 |
Sep 04 06:15:20 AM UTC 24 |
11162320821 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.144120195 |
|
|
Sep 04 06:14:31 AM UTC 24 |
Sep 04 06:14:40 AM UTC 24 |
299488389 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.959994166 |
|
|
Sep 04 06:14:35 AM UTC 24 |
Sep 04 06:14:40 AM UTC 24 |
53374658 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.1847684512 |
|
|
Sep 04 06:14:37 AM UTC 24 |
Sep 04 06:14:41 AM UTC 24 |
70968996 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.3006201945 |
|
|
Sep 04 06:14:27 AM UTC 24 |
Sep 04 06:14:41 AM UTC 24 |
527830030 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3134304070 |
|
|
Sep 04 06:14:08 AM UTC 24 |
Sep 04 06:14:42 AM UTC 24 |
2316460782 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.132373211 |
|
|
Sep 04 06:13:39 AM UTC 24 |
Sep 04 06:14:42 AM UTC 24 |
2127621104 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.2294834519 |
|
|
Sep 04 06:13:54 AM UTC 24 |
Sep 04 06:14:44 AM UTC 24 |
3760491407 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2810646426 |
|
|
Sep 04 06:14:37 AM UTC 24 |
Sep 04 06:14:46 AM UTC 24 |
307111836 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.1559784318 |
|
|
Sep 04 06:14:18 AM UTC 24 |
Sep 04 06:14:47 AM UTC 24 |
4165911215 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3125251162 |
|
|
Sep 04 06:14:40 AM UTC 24 |
Sep 04 06:14:47 AM UTC 24 |
373305744 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3698308982 |
|
|
Sep 04 06:14:31 AM UTC 24 |
Sep 04 06:14:47 AM UTC 24 |
2704580334 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.845664688 |
|
|
Sep 04 06:14:30 AM UTC 24 |
Sep 04 06:14:48 AM UTC 24 |
581444998 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.2534673987 |
|
|
Sep 04 06:14:41 AM UTC 24 |
Sep 04 06:14:48 AM UTC 24 |
1520773619 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.591624505 |
|
|
Sep 04 06:14:47 AM UTC 24 |
Sep 04 06:14:49 AM UTC 24 |
22439875 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.3577387733 |
|
|
Sep 04 06:14:31 AM UTC 24 |
Sep 04 06:14:49 AM UTC 24 |
395260343 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.3092713320 |
|
|
Sep 04 06:14:30 AM UTC 24 |
Sep 04 06:14:50 AM UTC 24 |
600636406 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1676851865 |
|
|
Sep 04 06:14:48 AM UTC 24 |
Sep 04 06:14:50 AM UTC 24 |
15294983 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1834208941 |
|
|
Sep 04 06:14:38 AM UTC 24 |
Sep 04 06:14:51 AM UTC 24 |
394951838 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1230483920 |
|
|
Sep 04 06:14:42 AM UTC 24 |
Sep 04 06:14:52 AM UTC 24 |
231221820 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.2328872687 |
|
|
Sep 04 06:14:48 AM UTC 24 |
Sep 04 06:14:52 AM UTC 24 |
47235941 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.210267526 |
|
|
Sep 04 06:14:38 AM UTC 24 |
Sep 04 06:14:53 AM UTC 24 |
1229197309 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.1481668781 |
|
|
Sep 04 06:14:25 AM UTC 24 |
Sep 04 06:14:53 AM UTC 24 |
991174496 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1863356833 |
|
|
Sep 04 06:14:49 AM UTC 24 |
Sep 04 06:14:54 AM UTC 24 |
862510223 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.3327224181 |
|
|
Sep 04 06:14:49 AM UTC 24 |
Sep 04 06:14:54 AM UTC 24 |
182807956 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.293337045 |
|
|
Sep 04 06:14:30 AM UTC 24 |
Sep 04 06:15:20 AM UTC 24 |
2023777716 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.2261790800 |
|
|
Sep 04 06:14:41 AM UTC 24 |
Sep 04 06:14:54 AM UTC 24 |
725416283 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.3834395071 |
|
|
Sep 04 06:14:42 AM UTC 24 |
Sep 04 06:14:56 AM UTC 24 |
608723656 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.3362405529 |
|
|
Sep 04 06:14:53 AM UTC 24 |
Sep 04 06:14:56 AM UTC 24 |
63064143 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.378900288 |
|
|
Sep 04 06:14:52 AM UTC 24 |
Sep 04 06:14:57 AM UTC 24 |
944511687 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.2734494268 |
|
|
Sep 04 06:14:57 AM UTC 24 |
Sep 04 06:14:59 AM UTC 24 |
40324118 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.3059193553 |
|
|
Sep 04 06:14:57 AM UTC 24 |
Sep 04 06:15:00 AM UTC 24 |
39000039 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.1597969701 |
|
|
Sep 04 06:14:58 AM UTC 24 |
Sep 04 06:15:01 AM UTC 24 |
64638899 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.676703954 |
|
|
Sep 04 06:14:20 AM UTC 24 |
Sep 04 06:15:02 AM UTC 24 |
4392575340 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2238216613 |
|
|
Sep 04 06:14:37 AM UTC 24 |
Sep 04 06:15:03 AM UTC 24 |
651822952 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.1366211183 |
|
|
Sep 04 06:14:40 AM UTC 24 |
Sep 04 06:15:04 AM UTC 24 |
589497018 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.4259845834 |
|
|
Sep 04 06:14:54 AM UTC 24 |
Sep 04 06:15:05 AM UTC 24 |
2004919173 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.1056860598 |
|
|
Sep 04 06:14:07 AM UTC 24 |
Sep 04 06:15:05 AM UTC 24 |
2611124112 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.3342077725 |
|
|
Sep 04 06:14:55 AM UTC 24 |
Sep 04 06:15:07 AM UTC 24 |
1665968002 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3789676103 |
|
|
Sep 04 06:15:01 AM UTC 24 |
Sep 04 06:15:07 AM UTC 24 |
344656431 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.3753356001 |
|
|
Sep 04 06:14:50 AM UTC 24 |
Sep 04 06:15:07 AM UTC 24 |
1655790955 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.1239877327 |
|
|
Sep 04 06:14:50 AM UTC 24 |
Sep 04 06:15:08 AM UTC 24 |
2136979011 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.3881880841 |
|
|
Sep 04 06:14:48 AM UTC 24 |
Sep 04 06:15:20 AM UTC 24 |
732673612 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2936619801 |
|
|
Sep 04 06:14:41 AM UTC 24 |
Sep 04 06:15:08 AM UTC 24 |
1546041863 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.1915780850 |
|
|
Sep 04 06:14:43 AM UTC 24 |
Sep 04 06:15:09 AM UTC 24 |
833741673 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.2703379262 |
|
|
Sep 04 06:14:53 AM UTC 24 |
Sep 04 06:15:10 AM UTC 24 |
360585694 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.4246693206 |
|
|
Sep 04 06:14:17 AM UTC 24 |
Sep 04 06:15:10 AM UTC 24 |
1162630006 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.1691662075 |
|
|
Sep 04 06:15:05 AM UTC 24 |
Sep 04 06:15:10 AM UTC 24 |
219663104 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.3641630224 |
|
|
Sep 04 06:14:52 AM UTC 24 |
Sep 04 06:15:12 AM UTC 24 |
2848430323 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.3032430364 |
|
|
Sep 04 06:15:01 AM UTC 24 |
Sep 04 06:15:12 AM UTC 24 |
46829982 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.1335637990 |
|
|
Sep 04 06:14:54 AM UTC 24 |
Sep 04 06:15:13 AM UTC 24 |
1499349823 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.3904243104 |
|
|
Sep 04 06:15:11 AM UTC 24 |
Sep 04 06:15:14 AM UTC 24 |
12579640 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.2677195748 |
|
|
Sep 04 06:15:04 AM UTC 24 |
Sep 04 06:15:16 AM UTC 24 |
637566953 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.349829115 |
|
|
Sep 04 06:15:14 AM UTC 24 |
Sep 04 06:15:16 AM UTC 24 |
19678608 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.1067975098 |
|
|
Sep 04 06:15:17 AM UTC 24 |
Sep 04 06:15:21 AM UTC 24 |
32679787 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3546189242 |
|
|
Sep 04 06:15:06 AM UTC 24 |
Sep 04 06:15:21 AM UTC 24 |
2975837650 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.3972180193 |
|
|
Sep 04 06:15:10 AM UTC 24 |
Sep 04 06:15:21 AM UTC 24 |
375819858 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all_with_rand_reset.624948967 |
|
|
Sep 04 06:12:38 AM UTC 24 |
Sep 04 06:15:22 AM UTC 24 |
4651754924 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.1271567362 |
|
|
Sep 04 06:14:40 AM UTC 24 |
Sep 04 06:15:23 AM UTC 24 |
1476636750 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.866277111 |
|
|
Sep 04 06:15:10 AM UTC 24 |
Sep 04 06:15:23 AM UTC 24 |
4874292814 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.4009454494 |
|
|
Sep 04 06:15:04 AM UTC 24 |
Sep 04 06:15:23 AM UTC 24 |
729103740 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2497927599 |
|
|
Sep 04 06:15:15 AM UTC 24 |
Sep 04 06:15:24 AM UTC 24 |
71974692 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.716932606 |
|
|
Sep 04 06:15:09 AM UTC 24 |
Sep 04 06:15:26 AM UTC 24 |
385093643 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.1911009415 |
|
|
Sep 04 06:15:19 AM UTC 24 |
Sep 04 06:15:26 AM UTC 24 |
3033844831 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1327073269 |
|
|
Sep 04 06:14:43 AM UTC 24 |
Sep 04 06:15:27 AM UTC 24 |
7535743430 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.1723000182 |
|
|
Sep 04 06:15:25 AM UTC 24 |
Sep 04 06:15:28 AM UTC 24 |
33943651 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.481457846 |
|
|
Sep 04 06:15:18 AM UTC 24 |
Sep 04 06:15:29 AM UTC 24 |
1999832675 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.3315453336 |
|
|
Sep 04 06:15:25 AM UTC 24 |
Sep 04 06:15:29 AM UTC 24 |
44793975 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1459553334 |
|
|
Sep 04 06:15:09 AM UTC 24 |
Sep 04 06:15:30 AM UTC 24 |
640678338 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.1700895833 |
|
|
Sep 04 06:15:20 AM UTC 24 |
Sep 04 06:15:30 AM UTC 24 |
234206155 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.1914727180 |
|
|
Sep 04 06:15:27 AM UTC 24 |
Sep 04 06:15:30 AM UTC 24 |
21353596 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.890822269 |
|
|
Sep 04 06:15:55 AM UTC 24 |
Sep 04 06:16:18 AM UTC 24 |
1446411509 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1035860688 |
|
|
Sep 04 06:15:17 AM UTC 24 |
Sep 04 06:15:30 AM UTC 24 |
552765788 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.694996651 |
|
|
Sep 04 06:15:00 AM UTC 24 |
Sep 04 06:15:30 AM UTC 24 |
252254378 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.1874531405 |
|
|
Sep 04 06:15:22 AM UTC 24 |
Sep 04 06:15:34 AM UTC 24 |
594361096 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.2032053017 |
|
|
Sep 04 06:15:29 AM UTC 24 |
Sep 04 06:15:34 AM UTC 24 |
213732411 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.4127797925 |
|
|
Sep 04 06:15:31 AM UTC 24 |
Sep 04 06:15:35 AM UTC 24 |
240091734 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.1367763605 |
|
|
Sep 04 06:15:22 AM UTC 24 |
Sep 04 06:15:35 AM UTC 24 |
1988788524 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.3074894721 |
|
|
Sep 04 06:15:14 AM UTC 24 |
Sep 04 06:15:35 AM UTC 24 |
421541950 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.1083950634 |
|
|
Sep 04 06:13:43 AM UTC 24 |
Sep 04 06:15:36 AM UTC 24 |
20157011946 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.1105083241 |
|
|
Sep 04 06:15:30 AM UTC 24 |
Sep 04 06:15:40 AM UTC 24 |
1198737972 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.1778947823 |
|
|
Sep 04 06:15:28 AM UTC 24 |
Sep 04 06:15:40 AM UTC 24 |
140066884 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.3843410332 |
|
|
Sep 04 06:15:24 AM UTC 24 |
Sep 04 06:15:41 AM UTC 24 |
1363184471 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.606928510 |
|
|
Sep 04 06:15:38 AM UTC 24 |
Sep 04 06:15:41 AM UTC 24 |
85271993 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/2.lc_ctrl_stress_all.1376715762 |
|
|
Sep 04 06:12:24 AM UTC 24 |
Sep 04 06:15:43 AM UTC 24 |
9792986192 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.4033053535 |
|
|
Sep 04 06:15:36 AM UTC 24 |
Sep 04 06:15:43 AM UTC 24 |
672585979 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.1003951431 |
|
|
Sep 04 06:15:31 AM UTC 24 |
Sep 04 06:15:43 AM UTC 24 |
1591059696 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2190228111 |
|
|
Sep 04 06:15:42 AM UTC 24 |
Sep 04 06:15:44 AM UTC 24 |
13479125 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.1205294096 |
|
|
Sep 04 06:15:42 AM UTC 24 |
Sep 04 06:15:45 AM UTC 24 |
20037389 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.3835959074 |
|
|
Sep 04 06:14:53 AM UTC 24 |
Sep 04 06:15:45 AM UTC 24 |
3356556850 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.2713932264 |
|
|
Sep 04 06:15:30 AM UTC 24 |
Sep 04 06:15:45 AM UTC 24 |
1985462383 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.37872544 |
|
|
Sep 04 06:13:30 AM UTC 24 |
Sep 04 06:15:47 AM UTC 24 |
5848313294 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.3306938173 |
|
|
Sep 04 06:15:34 AM UTC 24 |
Sep 04 06:15:47 AM UTC 24 |
705975727 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.2796060447 |
|
|
Sep 04 06:15:27 AM UTC 24 |
Sep 04 06:15:49 AM UTC 24 |
259213641 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2680818497 |
|
|
Sep 04 06:15:42 AM UTC 24 |
Sep 04 06:16:17 AM UTC 24 |
2801297302 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.2188149692 |
|
|
Sep 04 06:15:36 AM UTC 24 |
Sep 04 06:15:49 AM UTC 24 |
307499210 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.2797637855 |
|
|
Sep 04 06:15:43 AM UTC 24 |
Sep 04 06:15:49 AM UTC 24 |
587287437 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.4289796248 |
|
|
Sep 04 06:15:22 AM UTC 24 |
Sep 04 06:15:51 AM UTC 24 |
779492429 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.1557422243 |
|
|
Sep 04 06:15:06 AM UTC 24 |
Sep 04 06:15:51 AM UTC 24 |
876766148 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.1642451565 |
|
|
Sep 04 06:15:45 AM UTC 24 |
Sep 04 06:15:53 AM UTC 24 |
673973618 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2450804423 |
|
|
Sep 04 06:15:42 AM UTC 24 |
Sep 04 06:15:53 AM UTC 24 |
142880759 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.1309658418 |
|
|
Sep 04 06:15:45 AM UTC 24 |
Sep 04 06:15:55 AM UTC 24 |
220200125 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.205720011 |
|
|
Sep 04 06:15:09 AM UTC 24 |
Sep 04 06:15:55 AM UTC 24 |
1435968903 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.1098652181 |
|
|
Sep 04 06:15:31 AM UTC 24 |
Sep 04 06:15:55 AM UTC 24 |
4341008298 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.2912135973 |
|
|
Sep 04 06:15:54 AM UTC 24 |
Sep 04 06:15:57 AM UTC 24 |
25637979 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3506152717 |
|
|
Sep 04 06:15:48 AM UTC 24 |
Sep 04 06:15:57 AM UTC 24 |
716178823 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.3950042333 |
|
|
Sep 04 06:15:55 AM UTC 24 |
Sep 04 06:15:57 AM UTC 24 |
22405503 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.1016780187 |
|
|
Sep 04 06:15:54 AM UTC 24 |
Sep 04 06:15:58 AM UTC 24 |
51953000 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.1533816115 |
|
|
Sep 04 06:15:22 AM UTC 24 |
Sep 04 06:15:59 AM UTC 24 |
1236579462 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.4055825053 |
|
|
Sep 04 06:15:46 AM UTC 24 |
Sep 04 06:16:00 AM UTC 24 |
326127673 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.2117113770 |
|
|
Sep 04 06:15:36 AM UTC 24 |
Sep 04 06:16:00 AM UTC 24 |
1485076587 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.3887570943 |
|
|
Sep 04 06:15:44 AM UTC 24 |
Sep 04 06:16:00 AM UTC 24 |
4124646127 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1454002981 |
|
|
Sep 04 06:15:20 AM UTC 24 |
Sep 04 06:16:00 AM UTC 24 |
4256078922 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.992757621 |
|
|
Sep 04 06:15:49 AM UTC 24 |
Sep 04 06:16:01 AM UTC 24 |
202833935 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.2573452542 |
|
|
Sep 04 06:15:58 AM UTC 24 |
Sep 04 06:16:01 AM UTC 24 |
48288954 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.1246444764 |
|
|
Sep 04 06:15:24 AM UTC 24 |
Sep 04 06:16:02 AM UTC 24 |
1038450661 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.24163424 |
|
|
Sep 04 06:15:46 AM UTC 24 |
Sep 04 06:16:03 AM UTC 24 |
455225075 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.2755963533 |
|
|
Sep 04 06:15:59 AM UTC 24 |
Sep 04 06:16:04 AM UTC 24 |
137536607 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2538752027 |
|
|
Sep 04 06:15:49 AM UTC 24 |
Sep 04 06:16:06 AM UTC 24 |
572125770 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.2375178545 |
|
|
Sep 04 06:15:51 AM UTC 24 |
Sep 04 06:16:06 AM UTC 24 |
294114256 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.225469917 |
|
|
Sep 04 06:15:20 AM UTC 24 |
Sep 04 06:16:07 AM UTC 24 |
1427801889 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.419393973 |
|
|
Sep 04 06:16:01 AM UTC 24 |
Sep 04 06:16:07 AM UTC 24 |
216603278 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.1645849538 |
|
|
Sep 04 06:15:56 AM UTC 24 |
Sep 04 06:16:07 AM UTC 24 |
70753779 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.3384528363 |
|
|
Sep 04 06:15:58 AM UTC 24 |
Sep 04 06:16:08 AM UTC 24 |
278367944 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.2729657951 |
|
|
Sep 04 06:16:07 AM UTC 24 |
Sep 04 06:16:10 AM UTC 24 |
37463855 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.3079263983 |
|
|
Sep 04 06:16:07 AM UTC 24 |
Sep 04 06:16:10 AM UTC 24 |
17355220 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.3406580275 |
|
|
Sep 04 06:14:46 AM UTC 24 |
Sep 04 06:16:12 AM UTC 24 |
19763805006 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.765017334 |
|
|
Sep 04 06:16:07 AM UTC 24 |
Sep 04 06:16:12 AM UTC 24 |
704447660 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.442270878 |
|
|
Sep 04 06:16:03 AM UTC 24 |
Sep 04 06:16:13 AM UTC 24 |
824549436 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.2395014981 |
|
|
Sep 04 06:16:01 AM UTC 24 |
Sep 04 06:16:15 AM UTC 24 |
793623651 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.865485321 |
|
|
Sep 04 06:16:03 AM UTC 24 |
Sep 04 06:16:15 AM UTC 24 |
361216761 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.2714610062 |
|
|
Sep 04 06:16:09 AM UTC 24 |
Sep 04 06:16:15 AM UTC 24 |
514012237 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.2349378161 |
|
|
Sep 04 06:16:00 AM UTC 24 |
Sep 04 06:16:16 AM UTC 24 |
418103102 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.1577192053 |
|
|
Sep 04 06:15:59 AM UTC 24 |
Sep 04 06:16:16 AM UTC 24 |
3992926250 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.3870491207 |
|
|
Sep 04 06:14:52 AM UTC 24 |
Sep 04 06:16:17 AM UTC 24 |
27663534007 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.1685344225 |
|
|
Sep 04 06:16:09 AM UTC 24 |
Sep 04 06:16:18 AM UTC 24 |
393894298 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.1685860600 |
|
|
Sep 04 06:16:17 AM UTC 24 |
Sep 04 06:16:19 AM UTC 24 |
43589108 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.3839635648 |
|
|
Sep 04 06:16:13 AM UTC 24 |
Sep 04 06:16:20 AM UTC 24 |
839459424 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.2994469294 |
|
|
Sep 04 06:17:03 AM UTC 24 |
Sep 04 06:17:06 AM UTC 24 |
22666743 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.1586923398 |
|
|
Sep 04 06:15:47 AM UTC 24 |
Sep 04 06:16:20 AM UTC 24 |
1821299325 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1667901440 |
|
|
Sep 04 06:16:18 AM UTC 24 |
Sep 04 06:16:20 AM UTC 24 |
11882023 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.456143884 |
|
|
Sep 04 06:15:31 AM UTC 24 |
Sep 04 06:16:20 AM UTC 24 |
6177638159 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.1382955093 |
|
|
Sep 04 06:16:17 AM UTC 24 |
Sep 04 06:16:20 AM UTC 24 |
86769593 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.559366187 |
|
|
Sep 04 06:16:13 AM UTC 24 |
Sep 04 06:16:21 AM UTC 24 |
322058705 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3225492747 |
|
|
Sep 04 06:14:18 AM UTC 24 |
Sep 04 06:16:23 AM UTC 24 |
4638624077 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.2796302269 |
|
|
Sep 04 06:16:20 AM UTC 24 |
Sep 04 06:16:23 AM UTC 24 |
26672858 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.2163664969 |
|
|
Sep 04 06:16:02 AM UTC 24 |
Sep 04 06:16:23 AM UTC 24 |
326073464 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.3823365863 |
|
|
Sep 04 06:16:19 AM UTC 24 |
Sep 04 06:16:25 AM UTC 24 |
40043038 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.1574968316 |
|
|
Sep 04 06:16:11 AM UTC 24 |
Sep 04 06:16:26 AM UTC 24 |
1490545314 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.3881178686 |
|
|
Sep 04 06:16:16 AM UTC 24 |
Sep 04 06:16:27 AM UTC 24 |
940684233 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.2957312308 |
|
|
Sep 04 06:16:11 AM UTC 24 |
Sep 04 06:16:27 AM UTC 24 |
473721489 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.2491876880 |
|
|
Sep 04 06:16:13 AM UTC 24 |
Sep 04 06:16:27 AM UTC 24 |
996904316 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.2611898351 |
|
|
Sep 04 06:16:25 AM UTC 24 |
Sep 04 06:16:27 AM UTC 24 |
17105745 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.3560069423 |
|
|
Sep 04 06:16:26 AM UTC 24 |
Sep 04 06:16:28 AM UTC 24 |
13021663 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.908951905 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:31 AM UTC 24 |
275695765 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.4232169958 |
|
|
Sep 04 06:16:25 AM UTC 24 |
Sep 04 06:16:31 AM UTC 24 |
58818260 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.3290132939 |
|
|
Sep 04 06:15:31 AM UTC 24 |
Sep 04 06:16:31 AM UTC 24 |
4448652072 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.4081113555 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:32 AM UTC 24 |
1605374864 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.3432588896 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:32 AM UTC 24 |
656406507 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.1303001519 |
|
|
Sep 04 06:16:00 AM UTC 24 |
Sep 04 06:16:32 AM UTC 24 |
4666470798 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.928047528 |
|
|
Sep 04 06:16:28 AM UTC 24 |
Sep 04 06:16:32 AM UTC 24 |
125601392 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3132431307 |
|
|
Sep 04 06:16:09 AM UTC 24 |
Sep 04 06:16:33 AM UTC 24 |
151971395 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.1022573225 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:33 AM UTC 24 |
1217541327 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.2649615726 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:34 AM UTC 24 |
617802661 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.3004444079 |
|
|
Sep 04 06:16:01 AM UTC 24 |
Sep 04 06:16:35 AM UTC 24 |
1034263515 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.2998333021 |
|
|
Sep 04 06:15:46 AM UTC 24 |
Sep 04 06:16:35 AM UTC 24 |
6525092100 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.2824693352 |
|
|
Sep 04 06:16:33 AM UTC 24 |
Sep 04 06:16:35 AM UTC 24 |
116563236 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.3580053968 |
|
|
Sep 04 06:16:33 AM UTC 24 |
Sep 04 06:16:36 AM UTC 24 |
58848144 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.606225915 |
|
|
Sep 04 06:16:35 AM UTC 24 |
Sep 04 06:16:37 AM UTC 24 |
38190910 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.189316335 |
|
|
Sep 04 06:16:28 AM UTC 24 |
Sep 04 06:16:40 AM UTC 24 |
344282092 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.2422108779 |
|
|
Sep 04 06:16:35 AM UTC 24 |
Sep 04 06:16:40 AM UTC 24 |
49694920 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.2866292933 |
|
|
Sep 04 06:16:28 AM UTC 24 |
Sep 04 06:16:40 AM UTC 24 |
392323074 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.1664275882 |
|
|
Sep 04 06:16:28 AM UTC 24 |
Sep 04 06:16:41 AM UTC 24 |
205755469 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.597141149 |
|
|
Sep 04 06:16:36 AM UTC 24 |
Sep 04 06:16:41 AM UTC 24 |
147179468 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.674850556 |
|
|
Sep 04 06:16:37 AM UTC 24 |
Sep 04 06:16:41 AM UTC 24 |
72726431 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.735466934 |
|
|
Sep 04 06:16:29 AM UTC 24 |
Sep 04 06:16:41 AM UTC 24 |
1151291624 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.2015457372 |
|
|
Sep 04 06:16:18 AM UTC 24 |
Sep 04 06:16:42 AM UTC 24 |
159277900 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.1125998275 |
|
|
Sep 04 06:16:47 AM UTC 24 |
Sep 04 06:17:04 AM UTC 24 |
540611688 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.2983139241 |
|
|
Sep 04 06:16:32 AM UTC 24 |
Sep 04 06:16:43 AM UTC 24 |
589796882 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.3595195744 |
|
|
Sep 04 06:16:42 AM UTC 24 |
Sep 04 06:16:45 AM UTC 24 |
46539900 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.2127729915 |
|
|
Sep 04 06:16:42 AM UTC 24 |
Sep 04 06:16:45 AM UTC 24 |
11701377 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.2432378611 |
|
|
Sep 04 06:16:32 AM UTC 24 |
Sep 04 06:16:45 AM UTC 24 |
583141719 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.822747260 |
|
|
Sep 04 06:12:38 AM UTC 24 |
Sep 04 06:16:46 AM UTC 24 |
28530416484 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3141876100 |
|
|
Sep 04 06:16:42 AM UTC 24 |
Sep 04 06:16:46 AM UTC 24 |
116528492 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.798425021 |
|
|
Sep 04 06:16:33 AM UTC 24 |
Sep 04 06:16:46 AM UTC 24 |
1107659167 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.3827230316 |
|
|
Sep 04 06:16:45 AM UTC 24 |
Sep 04 06:16:48 AM UTC 24 |
44130167 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.2985730317 |
|
|
Sep 04 06:16:38 AM UTC 24 |
Sep 04 06:16:49 AM UTC 24 |
540979708 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3211858512 |
|
|
Sep 04 06:17:02 AM UTC 24 |
Sep 04 06:17:04 AM UTC 24 |
19247478 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.3437252884 |
|
|
Sep 04 06:16:21 AM UTC 24 |
Sep 04 06:16:50 AM UTC 24 |
8426528165 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.613257011 |
|
|
Sep 04 06:16:36 AM UTC 24 |
Sep 04 06:16:50 AM UTC 24 |
929415227 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.622322664 |
|
|
Sep 04 06:14:56 AM UTC 24 |
Sep 04 06:16:51 AM UTC 24 |
2518749034 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.4006645379 |
|
|
Sep 04 06:16:36 AM UTC 24 |
Sep 04 06:16:53 AM UTC 24 |
399206551 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.3794358555 |
|
|
Sep 04 06:16:51 AM UTC 24 |
Sep 04 06:16:53 AM UTC 24 |
51907678 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2383877997 |
|
|
Sep 04 06:16:28 AM UTC 24 |
Sep 04 06:16:53 AM UTC 24 |
280423323 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.2968573545 |
|
|
Sep 04 06:17:01 AM UTC 24 |
Sep 04 06:17:05 AM UTC 24 |
162591865 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.1720428938 |
|
|
Sep 04 06:16:46 AM UTC 24 |
Sep 04 06:16:55 AM UTC 24 |
260302207 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.2880452478 |
|
|
Sep 04 06:16:52 AM UTC 24 |
Sep 04 06:16:55 AM UTC 24 |
13777106 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.3904835970 |
|
|
Sep 04 06:16:40 AM UTC 24 |
Sep 04 06:16:56 AM UTC 24 |
381064430 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.3719399634 |
|
|
Sep 04 06:16:45 AM UTC 24 |
Sep 04 06:16:56 AM UTC 24 |
128741531 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.2949529022 |
|
|
Sep 04 06:16:47 AM UTC 24 |
Sep 04 06:16:58 AM UTC 24 |
2287324519 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.1538500201 |
|
|
Sep 04 06:14:20 AM UTC 24 |
Sep 04 06:16:58 AM UTC 24 |
25210287977 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.1706766729 |
|
|
Sep 04 06:16:46 AM UTC 24 |
Sep 04 06:16:59 AM UTC 24 |
236620396 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.1433194925 |
|
|
Sep 04 06:16:40 AM UTC 24 |
Sep 04 06:17:00 AM UTC 24 |
1711372418 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.445726127 |
|
|
Sep 04 06:16:33 AM UTC 24 |
Sep 04 06:17:00 AM UTC 24 |
4245002435 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.530082086 |
|
|
Sep 04 06:16:55 AM UTC 24 |
Sep 04 06:17:00 AM UTC 24 |
84044044 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.4259709296 |
|
|
Sep 04 06:16:47 AM UTC 24 |
Sep 04 06:17:01 AM UTC 24 |
421272304 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.1741992600 |
|
|
Sep 04 06:16:59 AM UTC 24 |
Sep 04 06:17:02 AM UTC 24 |
431574604 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.267342941 |
|
|
Sep 04 06:16:35 AM UTC 24 |
Sep 04 06:17:03 AM UTC 24 |
407632950 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.359989231 |
|
|
Sep 04 06:16:56 AM UTC 24 |
Sep 04 06:17:03 AM UTC 24 |
492754099 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.2499358093 |
|
|
Sep 04 06:16:47 AM UTC 24 |
Sep 04 06:17:03 AM UTC 24 |
734989646 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.145740531 |
|
|
Sep 04 06:16:55 AM UTC 24 |
Sep 04 06:17:04 AM UTC 24 |
414812850 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.4269976392 |
|
|
Sep 04 06:16:55 AM UTC 24 |
Sep 04 06:17:04 AM UTC 24 |
65694473 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.1446925264 |
|
|
Sep 04 06:15:37 AM UTC 24 |
Sep 04 06:17:07 AM UTC 24 |
12495237986 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.3728337431 |
|
|
Sep 04 06:14:31 AM UTC 24 |
Sep 04 06:17:07 AM UTC 24 |
8981470439 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.30700031 |
|
|
Sep 04 06:16:57 AM UTC 24 |
Sep 04 06:17:08 AM UTC 24 |
205922153 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.1925337080 |
|
|
Sep 04 06:17:06 AM UTC 24 |
Sep 04 06:17:08 AM UTC 24 |
14945431 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.1577356735 |
|
|
Sep 04 06:16:52 AM UTC 24 |
Sep 04 06:17:09 AM UTC 24 |
204277045 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.3347341509 |
|
|
Sep 04 06:16:43 AM UTC 24 |
Sep 04 06:17:09 AM UTC 24 |
702101480 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2630236930 |
|
|
Sep 04 06:16:56 AM UTC 24 |
Sep 04 06:17:10 AM UTC 24 |
285023137 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1432339581 |
|
|
Sep 04 06:17:02 AM UTC 24 |
Sep 04 06:17:10 AM UTC 24 |
254947483 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.2803029232 |
|
|
Sep 04 06:17:07 AM UTC 24 |
Sep 04 06:17:11 AM UTC 24 |
51079187 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1789019103 |
|
|
Sep 04 06:17:09 AM UTC 24 |
Sep 04 06:17:11 AM UTC 24 |
24588065 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3611615781 |
|
|
Sep 04 06:16:57 AM UTC 24 |
Sep 04 06:17:11 AM UTC 24 |
1147232945 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.1034254920 |
|
|
Sep 04 06:16:56 AM UTC 24 |
Sep 04 06:17:12 AM UTC 24 |
1215630456 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.3370731593 |
|
|
Sep 04 06:17:09 AM UTC 24 |
Sep 04 06:17:15 AM UTC 24 |
93524082 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.1971722529 |
|
|
Sep 04 06:17:10 AM UTC 24 |
Sep 04 06:17:15 AM UTC 24 |
903506653 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.3589517805 |
|
|
Sep 04 06:16:52 AM UTC 24 |
Sep 04 06:17:17 AM UTC 24 |
724275799 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.578612108 |
|
|
Sep 04 06:17:04 AM UTC 24 |
Sep 04 06:17:17 AM UTC 24 |
3719661439 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.2485507924 |
|
|
Sep 04 06:17:09 AM UTC 24 |
Sep 04 06:17:17 AM UTC 24 |
244954918 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.2658666504 |
|
|
Sep 04 06:17:16 AM UTC 24 |
Sep 04 06:17:18 AM UTC 24 |
38664990 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.2107952566 |
|
|
Sep 04 06:17:16 AM UTC 24 |
Sep 04 06:17:18 AM UTC 24 |
34488919 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.2844468104 |
|
|
Sep 04 06:17:04 AM UTC 24 |
Sep 04 06:17:19 AM UTC 24 |
1051432570 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.1494299551 |
|
|
Sep 04 06:17:04 AM UTC 24 |
Sep 04 06:17:19 AM UTC 24 |
647239747 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2396802245 |
|
|
Sep 04 06:17:18 AM UTC 24 |
Sep 04 06:17:20 AM UTC 24 |
43034792 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.3801861728 |
|
|
Sep 04 06:17:04 AM UTC 24 |
Sep 04 06:17:21 AM UTC 24 |
332549065 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.2380477870 |
|
|
Sep 04 06:17:11 AM UTC 24 |
Sep 04 06:17:21 AM UTC 24 |
1249557056 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.3628471422 |
|
|
Sep 04 06:12:52 AM UTC 24 |
Sep 04 06:17:21 AM UTC 24 |
13935271858 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.2897052582 |
|
|
Sep 04 06:17:10 AM UTC 24 |
Sep 04 06:17:22 AM UTC 24 |
1075642295 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.3942540765 |
|
|
Sep 04 06:17:04 AM UTC 24 |
Sep 04 06:17:22 AM UTC 24 |
3171933116 ps |