| T363 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.267096606 |
|
|
Sep 09 11:23:20 AM UTC 24 |
Sep 09 11:23:35 AM UTC 24 |
338057856 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.1342409076 |
|
|
Sep 09 11:23:23 AM UTC 24 |
Sep 09 11:23:35 AM UTC 24 |
697568735 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.2393920570 |
|
|
Sep 09 11:23:28 AM UTC 24 |
Sep 09 11:23:35 AM UTC 24 |
423581144 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.880647020 |
|
|
Sep 09 11:23:13 AM UTC 24 |
Sep 09 11:23:36 AM UTC 24 |
457229904 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.1009612033 |
|
|
Sep 09 11:23:25 AM UTC 24 |
Sep 09 11:23:36 AM UTC 24 |
433536297 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.3627015031 |
|
|
Sep 09 11:23:06 AM UTC 24 |
Sep 09 11:23:37 AM UTC 24 |
1196643331 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/1.lc_ctrl_stress_all.3251240000 |
|
|
Sep 09 11:21:14 AM UTC 24 |
Sep 09 11:23:37 AM UTC 24 |
16565351189 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.2190877701 |
|
|
Sep 09 11:23:29 AM UTC 24 |
Sep 09 11:23:38 AM UTC 24 |
967345879 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.381568704 |
|
|
Sep 09 11:23:34 AM UTC 24 |
Sep 09 11:23:38 AM UTC 24 |
241628024 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.3291275626 |
|
|
Sep 09 11:23:18 AM UTC 24 |
Sep 09 11:23:38 AM UTC 24 |
962932325 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_access.1774789705 |
|
|
Sep 09 11:23:19 AM UTC 24 |
Sep 09 11:23:39 AM UTC 24 |
1366226805 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.4230156631 |
|
|
Sep 09 11:23:31 AM UTC 24 |
Sep 09 11:23:40 AM UTC 24 |
415848067 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all_with_rand_reset.2837113738 |
|
|
Sep 09 11:22:29 AM UTC 24 |
Sep 09 11:23:40 AM UTC 24 |
2304640589 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.3786058547 |
|
|
Sep 09 11:23:29 AM UTC 24 |
Sep 09 11:23:41 AM UTC 24 |
688531092 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.2320631760 |
|
|
Sep 09 11:23:26 AM UTC 24 |
Sep 09 11:23:42 AM UTC 24 |
911375485 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.920525117 |
|
|
Sep 09 11:23:25 AM UTC 24 |
Sep 09 11:23:42 AM UTC 24 |
494042731 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.177929249 |
|
|
Sep 09 11:23:40 AM UTC 24 |
Sep 09 11:23:42 AM UTC 24 |
69492471 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.156019527 |
|
|
Sep 09 11:23:33 AM UTC 24 |
Sep 09 11:23:42 AM UTC 24 |
421067121 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.2269090373 |
|
|
Sep 09 11:23:41 AM UTC 24 |
Sep 09 11:23:43 AM UTC 24 |
30706773 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.3966206828 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:10 AM UTC 24 |
925165973 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.993750636 |
|
|
Sep 09 11:23:40 AM UTC 24 |
Sep 09 11:23:44 AM UTC 24 |
83863518 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.2845978264 |
|
|
Sep 09 11:23:37 AM UTC 24 |
Sep 09 11:23:45 AM UTC 24 |
3349872640 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.3537741980 |
|
|
Sep 09 11:23:34 AM UTC 24 |
Sep 09 11:23:46 AM UTC 24 |
891846918 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1536511986 |
|
|
Sep 09 11:23:35 AM UTC 24 |
Sep 09 11:23:46 AM UTC 24 |
1478787639 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.4150544526 |
|
|
Sep 09 11:23:42 AM UTC 24 |
Sep 09 11:23:46 AM UTC 24 |
154362277 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.814711545 |
|
|
Sep 09 11:23:04 AM UTC 24 |
Sep 09 11:23:47 AM UTC 24 |
4512556941 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.4112452517 |
|
|
Sep 09 11:23:43 AM UTC 24 |
Sep 09 11:23:47 AM UTC 24 |
44341054 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.2210341883 |
|
|
Sep 09 11:23:35 AM UTC 24 |
Sep 09 11:23:47 AM UTC 24 |
1958269780 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.107873025 |
|
|
Sep 09 11:22:47 AM UTC 24 |
Sep 09 11:23:49 AM UTC 24 |
19347472689 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1086999355 |
|
|
Sep 09 11:23:38 AM UTC 24 |
Sep 09 11:23:50 AM UTC 24 |
501234680 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.3380435399 |
|
|
Sep 09 11:23:38 AM UTC 24 |
Sep 09 11:23:51 AM UTC 24 |
616961911 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.2013859385 |
|
|
Sep 09 11:23:49 AM UTC 24 |
Sep 09 11:23:51 AM UTC 24 |
64325761 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3898192485 |
|
|
Sep 09 11:23:19 AM UTC 24 |
Sep 09 11:23:51 AM UTC 24 |
1727127217 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.452893593 |
|
|
Sep 09 11:23:35 AM UTC 24 |
Sep 09 11:23:51 AM UTC 24 |
293520117 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3151517510 |
|
|
Sep 09 11:23:46 AM UTC 24 |
Sep 09 11:24:10 AM UTC 24 |
700709948 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all_with_rand_reset.2616193181 |
|
|
Sep 09 11:22:18 AM UTC 24 |
Sep 09 11:23:52 AM UTC 24 |
7491408251 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.1784101708 |
|
|
Sep 09 11:23:45 AM UTC 24 |
Sep 09 11:23:52 AM UTC 24 |
1050913501 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3728987774 |
|
|
Sep 09 11:23:42 AM UTC 24 |
Sep 09 11:23:52 AM UTC 24 |
438060478 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.1977571532 |
|
|
Sep 09 11:23:50 AM UTC 24 |
Sep 09 11:23:53 AM UTC 24 |
17787236 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.666459769 |
|
|
Sep 09 11:23:49 AM UTC 24 |
Sep 09 11:23:53 AM UTC 24 |
113587604 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.2212712772 |
|
|
Sep 09 11:23:28 AM UTC 24 |
Sep 09 11:23:53 AM UTC 24 |
3233485058 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.449996056 |
|
|
Sep 09 11:23:42 AM UTC 24 |
Sep 09 11:23:53 AM UTC 24 |
167964798 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.4058898521 |
|
|
Sep 09 11:23:30 AM UTC 24 |
Sep 09 11:23:56 AM UTC 24 |
2574787612 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.18974668 |
|
|
Sep 09 11:23:37 AM UTC 24 |
Sep 09 11:23:57 AM UTC 24 |
2639971527 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.959589875 |
|
|
Sep 09 11:23:23 AM UTC 24 |
Sep 09 11:23:57 AM UTC 24 |
1910328873 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.4187263385 |
|
|
Sep 09 11:23:25 AM UTC 24 |
Sep 09 11:23:57 AM UTC 24 |
941145337 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.2738579479 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:23:58 AM UTC 24 |
77417254 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.1285171946 |
|
|
Sep 09 11:23:45 AM UTC 24 |
Sep 09 11:23:58 AM UTC 24 |
418482518 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.4267639085 |
|
|
Sep 09 11:23:52 AM UTC 24 |
Sep 09 11:23:58 AM UTC 24 |
387016598 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.2745079482 |
|
|
Sep 09 11:22:47 AM UTC 24 |
Sep 09 11:23:59 AM UTC 24 |
2564734596 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.3587740614 |
|
|
Sep 09 11:23:51 AM UTC 24 |
Sep 09 11:23:59 AM UTC 24 |
119048925 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.2824693479 |
|
|
Sep 09 11:23:42 AM UTC 24 |
Sep 09 11:23:59 AM UTC 24 |
566225895 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.3116263012 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:00 AM UTC 24 |
591368399 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.2563788669 |
|
|
Sep 09 11:23:58 AM UTC 24 |
Sep 09 11:24:01 AM UTC 24 |
44321982 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.438683151 |
|
|
Sep 09 11:23:46 AM UTC 24 |
Sep 09 11:24:01 AM UTC 24 |
1286609183 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.314158553 |
|
|
Sep 09 11:23:37 AM UTC 24 |
Sep 09 11:24:01 AM UTC 24 |
2736883516 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.687650391 |
|
|
Sep 09 11:23:47 AM UTC 24 |
Sep 09 11:24:01 AM UTC 24 |
1469581856 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.3594384322 |
|
|
Sep 09 11:23:59 AM UTC 24 |
Sep 09 11:24:02 AM UTC 24 |
66532836 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.1635887027 |
|
|
Sep 09 11:23:44 AM UTC 24 |
Sep 09 11:24:02 AM UTC 24 |
631176805 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.774221555 |
|
|
Sep 09 11:24:00 AM UTC 24 |
Sep 09 11:24:02 AM UTC 24 |
25126101 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.3179883985 |
|
|
Sep 09 11:23:59 AM UTC 24 |
Sep 09 11:24:02 AM UTC 24 |
31936516 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.1250979272 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:04 AM UTC 24 |
3063506777 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.3266890065 |
|
|
Sep 09 11:23:33 AM UTC 24 |
Sep 09 11:24:05 AM UTC 24 |
1273539279 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.522521821 |
|
|
Sep 09 11:24:02 AM UTC 24 |
Sep 09 11:24:08 AM UTC 24 |
474187435 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.3965294121 |
|
|
Sep 09 11:23:52 AM UTC 24 |
Sep 09 11:24:08 AM UTC 24 |
994035803 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.2558308253 |
|
|
Sep 09 11:23:52 AM UTC 24 |
Sep 09 11:24:08 AM UTC 24 |
441629107 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.869283459 |
|
|
Sep 09 11:23:18 AM UTC 24 |
Sep 09 11:24:09 AM UTC 24 |
6614010730 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.50943127 |
|
|
Sep 09 11:24:01 AM UTC 24 |
Sep 09 11:24:10 AM UTC 24 |
163096341 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.372910168 |
|
|
Sep 09 11:24:03 AM UTC 24 |
Sep 09 11:24:11 AM UTC 24 |
908979660 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.2425808540 |
|
|
Sep 09 11:24:09 AM UTC 24 |
Sep 09 11:24:12 AM UTC 24 |
17571185 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.834193214 |
|
|
Sep 09 11:24:02 AM UTC 24 |
Sep 09 11:24:12 AM UTC 24 |
1169563220 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.4107761551 |
|
|
Sep 09 11:23:26 AM UTC 24 |
Sep 09 11:24:12 AM UTC 24 |
6335521904 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.516562108 |
|
|
Sep 09 11:23:59 AM UTC 24 |
Sep 09 11:24:12 AM UTC 24 |
263935014 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.682461103 |
|
|
Sep 09 11:24:31 AM UTC 24 |
Sep 09 11:24:48 AM UTC 24 |
922231860 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.1469370116 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
413278604 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.3989030445 |
|
|
Sep 09 11:23:08 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
3429227299 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.2765556074 |
|
|
Sep 09 11:24:11 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
29371405 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.298869348 |
|
|
Sep 09 11:24:09 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
71411703 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.3679259283 |
|
|
Sep 09 11:24:01 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
237393576 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2869250284 |
|
|
Sep 09 11:24:17 AM UTC 24 |
Sep 09 11:24:43 AM UTC 24 |
277430504 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.791453743 |
|
|
Sep 09 11:24:04 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
887488036 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.1865317940 |
|
|
Sep 09 11:23:37 AM UTC 24 |
Sep 09 11:24:13 AM UTC 24 |
4316003346 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.2916851950 |
|
|
Sep 09 11:23:47 AM UTC 24 |
Sep 09 11:24:14 AM UTC 24 |
15653788372 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.840606457 |
|
|
Sep 09 11:23:49 AM UTC 24 |
Sep 09 11:24:15 AM UTC 24 |
11981407763 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.2381510306 |
|
|
Sep 09 11:24:11 AM UTC 24 |
Sep 09 11:24:16 AM UTC 24 |
1165116944 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.3438032106 |
|
|
Sep 09 11:23:58 AM UTC 24 |
Sep 09 11:24:16 AM UTC 24 |
1360382257 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.2332305609 |
|
|
Sep 09 11:24:05 AM UTC 24 |
Sep 09 11:24:17 AM UTC 24 |
1536610959 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.2580034214 |
|
|
Sep 09 11:24:11 AM UTC 24 |
Sep 09 11:24:17 AM UTC 24 |
159589518 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.2651270523 |
|
|
Sep 09 11:22:53 AM UTC 24 |
Sep 09 11:24:17 AM UTC 24 |
7612050883 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.1278453635 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:24:18 AM UTC 24 |
22933318 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.2503206001 |
|
|
Sep 09 11:23:41 AM UTC 24 |
Sep 09 11:24:18 AM UTC 24 |
1404987761 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.2701208487 |
|
|
Sep 09 11:24:12 AM UTC 24 |
Sep 09 11:24:18 AM UTC 24 |
218534340 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.541550991 |
|
|
Sep 09 11:24:17 AM UTC 24 |
Sep 09 11:24:19 AM UTC 24 |
43736378 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.1583196972 |
|
|
Sep 09 11:23:10 AM UTC 24 |
Sep 09 11:24:19 AM UTC 24 |
4750790009 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1252484220 |
|
|
Sep 09 11:23:43 AM UTC 24 |
Sep 09 11:24:20 AM UTC 24 |
1096311831 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.3677085252 |
|
|
Sep 09 11:23:57 AM UTC 24 |
Sep 09 11:24:21 AM UTC 24 |
555631918 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.145176155 |
|
|
Sep 09 11:24:13 AM UTC 24 |
Sep 09 11:24:21 AM UTC 24 |
568004743 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2324231802 |
|
|
Sep 09 11:24:17 AM UTC 24 |
Sep 09 11:24:21 AM UTC 24 |
38876165 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1664864079 |
|
|
Sep 09 11:24:18 AM UTC 24 |
Sep 09 11:24:23 AM UTC 24 |
108976045 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.3782476632 |
|
|
Sep 09 11:23:35 AM UTC 24 |
Sep 09 11:24:23 AM UTC 24 |
14306989517 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.798449556 |
|
|
Sep 09 11:24:13 AM UTC 24 |
Sep 09 11:24:24 AM UTC 24 |
244392572 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.233788356 |
|
|
Sep 09 11:24:03 AM UTC 24 |
Sep 09 11:24:24 AM UTC 24 |
2513844491 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.349303024 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:24:25 AM UTC 24 |
619195501 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.2632095246 |
|
|
Sep 09 11:24:12 AM UTC 24 |
Sep 09 11:24:25 AM UTC 24 |
4806551279 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.3784835642 |
|
|
Sep 09 11:24:02 AM UTC 24 |
Sep 09 11:24:25 AM UTC 24 |
1303580188 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.4059090727 |
|
|
Sep 09 11:24:19 AM UTC 24 |
Sep 09 11:24:26 AM UTC 24 |
915060140 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.98454161 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:24:27 AM UTC 24 |
922743667 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.1107600203 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:24:28 AM UTC 24 |
1318694208 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.3482332331 |
|
|
Sep 09 11:24:26 AM UTC 24 |
Sep 09 11:24:28 AM UTC 24 |
40472166 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1154824745 |
|
|
Sep 09 11:24:26 AM UTC 24 |
Sep 09 11:24:28 AM UTC 24 |
29138876 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.3773242666 |
|
|
Sep 09 11:24:18 AM UTC 24 |
Sep 09 11:24:29 AM UTC 24 |
268445038 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.2099925441 |
|
|
Sep 09 11:24:26 AM UTC 24 |
Sep 09 11:24:30 AM UTC 24 |
93920761 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.131720665 |
|
|
Sep 09 11:23:00 AM UTC 24 |
Sep 09 11:24:30 AM UTC 24 |
14160753961 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.4186471013 |
|
|
Sep 09 11:24:19 AM UTC 24 |
Sep 09 11:24:30 AM UTC 24 |
333904745 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.3584277755 |
|
|
Sep 09 11:24:12 AM UTC 24 |
Sep 09 11:24:30 AM UTC 24 |
833059227 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.1155105413 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:31 AM UTC 24 |
2648255711 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.4021151305 |
|
|
Sep 09 11:23:50 AM UTC 24 |
Sep 09 11:24:31 AM UTC 24 |
367240197 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.2802387330 |
|
|
Sep 09 11:24:27 AM UTC 24 |
Sep 09 11:24:31 AM UTC 24 |
186052792 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all.212175279 |
|
|
Sep 09 11:21:01 AM UTC 24 |
Sep 09 11:24:32 AM UTC 24 |
40189452815 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.2625131101 |
|
|
Sep 09 11:24:21 AM UTC 24 |
Sep 09 11:24:32 AM UTC 24 |
392353142 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.2744829530 |
|
|
Sep 09 11:24:22 AM UTC 24 |
Sep 09 11:24:33 AM UTC 24 |
403167610 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.2964762614 |
|
|
Sep 09 11:24:22 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
2204917816 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.1815497852 |
|
|
Sep 09 11:24:37 AM UTC 24 |
Sep 09 11:24:45 AM UTC 24 |
261123187 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1787226591 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
325849516 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.3532850546 |
|
|
Sep 09 11:24:42 AM UTC 24 |
Sep 09 11:24:47 AM UTC 24 |
170683520 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.3659138969 |
|
|
Sep 09 11:24:19 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
1654922262 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.1890912301 |
|
|
Sep 09 11:24:19 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
1289064395 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.890628166 |
|
|
Sep 09 11:23:59 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
3055930381 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.895501177 |
|
|
Sep 09 11:24:33 AM UTC 24 |
Sep 09 11:24:35 AM UTC 24 |
20220871 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.1852911969 |
|
|
Sep 09 11:24:22 AM UTC 24 |
Sep 09 11:24:36 AM UTC 24 |
981892006 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.1192570357 |
|
|
Sep 09 11:24:11 AM UTC 24 |
Sep 09 11:24:36 AM UTC 24 |
299689064 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.3287414955 |
|
|
Sep 09 11:24:31 AM UTC 24 |
Sep 09 11:24:36 AM UTC 24 |
251651936 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.2712908610 |
|
|
Sep 09 11:24:34 AM UTC 24 |
Sep 09 11:24:37 AM UTC 24 |
30806386 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.1972216084 |
|
|
Sep 09 11:24:24 AM UTC 24 |
Sep 09 11:24:38 AM UTC 24 |
294224985 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.1394768283 |
|
|
Sep 09 11:24:27 AM UTC 24 |
Sep 09 11:24:38 AM UTC 24 |
73884803 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.4035330233 |
|
|
Sep 09 11:24:36 AM UTC 24 |
Sep 09 11:24:38 AM UTC 24 |
23252884 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.2772309205 |
|
|
Sep 09 11:24:29 AM UTC 24 |
Sep 09 11:24:38 AM UTC 24 |
541478685 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.472743294 |
|
|
Sep 09 11:24:30 AM UTC 24 |
Sep 09 11:24:39 AM UTC 24 |
618434510 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.3856764790 |
|
|
Sep 09 11:24:31 AM UTC 24 |
Sep 09 11:24:41 AM UTC 24 |
2450230409 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.2849625402 |
|
|
Sep 09 11:24:36 AM UTC 24 |
Sep 09 11:24:41 AM UTC 24 |
323329671 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.170569339 |
|
|
Sep 09 11:24:36 AM UTC 24 |
Sep 09 11:24:42 AM UTC 24 |
584786868 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.3111408892 |
|
|
Sep 09 11:24:39 AM UTC 24 |
Sep 09 11:24:42 AM UTC 24 |
18927096 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.2897917675 |
|
|
Sep 09 11:24:33 AM UTC 24 |
Sep 09 11:24:42 AM UTC 24 |
338317922 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1248257262 |
|
|
Sep 09 11:24:40 AM UTC 24 |
Sep 09 11:24:42 AM UTC 24 |
29765424 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.1473850208 |
|
|
Sep 09 11:24:27 AM UTC 24 |
Sep 09 11:24:43 AM UTC 24 |
843122029 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.4259323289 |
|
|
Sep 09 11:24:40 AM UTC 24 |
Sep 09 11:24:43 AM UTC 24 |
63844382 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.567804576 |
|
|
Sep 09 11:24:44 AM UTC 24 |
Sep 09 11:24:48 AM UTC 24 |
446701086 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.684472210 |
|
|
Sep 09 11:24:37 AM UTC 24 |
Sep 09 11:24:45 AM UTC 24 |
661688311 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.4028046253 |
|
|
Sep 09 11:24:33 AM UTC 24 |
Sep 09 11:24:45 AM UTC 24 |
1026134641 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.3368668860 |
|
|
Sep 09 11:24:02 AM UTC 24 |
Sep 09 11:24:47 AM UTC 24 |
8800154295 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.1954563210 |
|
|
Sep 09 11:24:30 AM UTC 24 |
Sep 09 11:24:48 AM UTC 24 |
802662657 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.4102251843 |
|
|
Sep 09 11:24:27 AM UTC 24 |
Sep 09 11:24:49 AM UTC 24 |
438524273 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.3044899002 |
|
|
Sep 09 11:24:47 AM UTC 24 |
Sep 09 11:24:49 AM UTC 24 |
57687231 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.3874755269 |
|
|
Sep 09 11:24:48 AM UTC 24 |
Sep 09 11:24:50 AM UTC 24 |
16966979 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.3861520774 |
|
|
Sep 09 11:24:47 AM UTC 24 |
Sep 09 11:24:51 AM UTC 24 |
44056113 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.1768348698 |
|
|
Sep 09 11:24:44 AM UTC 24 |
Sep 09 11:24:52 AM UTC 24 |
1203544861 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.2580963439 |
|
|
Sep 09 11:24:42 AM UTC 24 |
Sep 09 11:24:52 AM UTC 24 |
185221600 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.298866118 |
|
|
Sep 09 11:24:37 AM UTC 24 |
Sep 09 11:24:52 AM UTC 24 |
364191175 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.3233925996 |
|
|
Sep 09 11:24:42 AM UTC 24 |
Sep 09 11:24:52 AM UTC 24 |
451955230 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.2289509054 |
|
|
Sep 09 11:24:49 AM UTC 24 |
Sep 09 11:24:53 AM UTC 24 |
240911153 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.2449181624 |
|
|
Sep 09 11:24:39 AM UTC 24 |
Sep 09 11:24:54 AM UTC 24 |
387625098 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.2898277688 |
|
|
Sep 09 11:24:44 AM UTC 24 |
Sep 09 11:24:54 AM UTC 24 |
998742916 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.954522835 |
|
|
Sep 09 11:24:49 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
618459577 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.4100748276 |
|
|
Sep 09 11:24:36 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
1555620417 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.4078359003 |
|
|
Sep 09 11:23:54 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
6348558990 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.4118207691 |
|
|
Sep 09 11:23:30 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
9575880656 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.2578181305 |
|
|
Sep 09 11:24:53 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
30211047 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.3503627859 |
|
|
Sep 09 11:23:00 AM UTC 24 |
Sep 09 11:24:55 AM UTC 24 |
4024471453 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.3973782235 |
|
|
Sep 09 11:24:44 AM UTC 24 |
Sep 09 11:24:56 AM UTC 24 |
1047330426 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.4158112311 |
|
|
Sep 09 11:24:37 AM UTC 24 |
Sep 09 11:24:56 AM UTC 24 |
1187955611 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3941104583 |
|
|
Sep 09 11:24:54 AM UTC 24 |
Sep 09 11:24:57 AM UTC 24 |
63641113 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.1541081976 |
|
|
Sep 09 11:24:45 AM UTC 24 |
Sep 09 11:24:57 AM UTC 24 |
764080675 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.3505661850 |
|
|
Sep 09 11:24:13 AM UTC 24 |
Sep 09 11:24:57 AM UTC 24 |
1716774444 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.62947066 |
|
|
Sep 09 11:24:31 AM UTC 24 |
Sep 09 11:24:58 AM UTC 24 |
1831283364 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.769741400 |
|
|
Sep 09 11:24:54 AM UTC 24 |
Sep 09 11:24:59 AM UTC 24 |
167996503 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.1989915473 |
|
|
Sep 09 11:24:49 AM UTC 24 |
Sep 09 11:24:59 AM UTC 24 |
89859510 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.959452761 |
|
|
Sep 09 11:24:49 AM UTC 24 |
Sep 09 11:25:00 AM UTC 24 |
236598906 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.3103519327 |
|
|
Sep 09 11:24:51 AM UTC 24 |
Sep 09 11:25:01 AM UTC 24 |
261694540 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1865531031 |
|
|
Sep 09 11:24:59 AM UTC 24 |
Sep 09 11:25:01 AM UTC 24 |
34047438 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.3251487598 |
|
|
Sep 09 11:24:56 AM UTC 24 |
Sep 09 11:25:01 AM UTC 24 |
84396822 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.2191765498 |
|
|
Sep 09 11:24:59 AM UTC 24 |
Sep 09 11:25:02 AM UTC 24 |
67271160 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.3856459102 |
|
|
Sep 09 11:24:56 AM UTC 24 |
Sep 09 11:25:02 AM UTC 24 |
1204032255 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3912890428 |
|
|
Sep 09 11:24:56 AM UTC 24 |
Sep 09 11:25:04 AM UTC 24 |
273346399 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.4003800209 |
|
|
Sep 09 11:23:38 AM UTC 24 |
Sep 09 11:25:05 AM UTC 24 |
4794453413 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.2388389684 |
|
|
Sep 09 11:24:52 AM UTC 24 |
Sep 09 11:25:05 AM UTC 24 |
1909879026 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.321494623 |
|
|
Sep 09 11:24:36 AM UTC 24 |
Sep 09 11:25:06 AM UTC 24 |
252770319 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.1815491609 |
|
|
Sep 09 11:25:01 AM UTC 24 |
Sep 09 11:25:07 AM UTC 24 |
164278199 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.2089402208 |
|
|
Sep 09 11:25:01 AM UTC 24 |
Sep 09 11:25:07 AM UTC 24 |
93570122 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.1015684997 |
|
|
Sep 09 11:24:56 AM UTC 24 |
Sep 09 11:25:07 AM UTC 24 |
232497309 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.1786075050 |
|
|
Sep 09 11:25:03 AM UTC 24 |
Sep 09 11:25:09 AM UTC 24 |
990401900 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.1394798277 |
|
|
Sep 09 11:24:59 AM UTC 24 |
Sep 09 11:25:09 AM UTC 24 |
125056305 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.2556436797 |
|
|
Sep 09 11:24:58 AM UTC 24 |
Sep 09 11:25:10 AM UTC 24 |
1324599274 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1664678978 |
|
|
Sep 09 11:25:07 AM UTC 24 |
Sep 09 11:25:10 AM UTC 24 |
77713851 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.322833222 |
|
|
Sep 09 11:24:58 AM UTC 24 |
Sep 09 11:25:10 AM UTC 24 |
299327659 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.3742345506 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:25:11 AM UTC 24 |
5576388516 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.1984925579 |
|
|
Sep 09 11:25:09 AM UTC 24 |
Sep 09 11:25:11 AM UTC 24 |
11813435 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.3240936277 |
|
|
Sep 09 11:24:56 AM UTC 24 |
Sep 09 11:25:11 AM UTC 24 |
1008189873 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.415867005 |
|
|
Sep 09 11:25:03 AM UTC 24 |
Sep 09 11:25:13 AM UTC 24 |
1031362019 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.3534419706 |
|
|
Sep 09 11:24:19 AM UTC 24 |
Sep 09 11:25:13 AM UTC 24 |
4861681972 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.529404934 |
|
|
Sep 09 11:25:21 AM UTC 24 |
Sep 09 11:25:24 AM UTC 24 |
34877509 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.4107262271 |
|
|
Sep 09 11:24:49 AM UTC 24 |
Sep 09 11:25:14 AM UTC 24 |
2100234031 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2862012762 |
|
|
Sep 09 11:25:04 AM UTC 24 |
Sep 09 11:25:14 AM UTC 24 |
717852782 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.294338181 |
|
|
Sep 09 11:24:42 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
997964093 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.50141257 |
|
|
Sep 09 11:24:58 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
2743739991 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.841527021 |
|
|
Sep 09 11:25:11 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
54015239 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.4283673456 |
|
|
Sep 09 11:25:10 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
157156948 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.1521088018 |
|
|
Sep 09 11:25:03 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
386938416 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.2315994842 |
|
|
Sep 09 11:24:02 AM UTC 24 |
Sep 09 11:25:15 AM UTC 24 |
5017971265 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1187108194 |
|
|
Sep 09 11:24:53 AM UTC 24 |
Sep 09 11:25:16 AM UTC 24 |
411992386 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.596142525 |
|
|
Sep 09 11:24:33 AM UTC 24 |
Sep 09 11:25:16 AM UTC 24 |
1674895688 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.4126574533 |
|
|
Sep 09 11:25:08 AM UTC 24 |
Sep 09 11:25:16 AM UTC 24 |
710186161 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.2530195604 |
|
|
Sep 09 11:25:06 AM UTC 24 |
Sep 09 11:25:17 AM UTC 24 |
436883893 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.353767247 |
|
|
Sep 09 11:24:15 AM UTC 24 |
Sep 09 11:25:18 AM UTC 24 |
14209010280 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3514236846 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:19 AM UTC 24 |
42612489 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.362366331 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:19 AM UTC 24 |
49079599 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.4190322622 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:20 AM UTC 24 |
71846499 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.1545360569 |
|
|
Sep 09 11:25:05 AM UTC 24 |
Sep 09 11:25:20 AM UTC 24 |
3886975267 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.120369584 |
|
|
Sep 09 11:25:11 AM UTC 24 |
Sep 09 11:25:21 AM UTC 24 |
946337497 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.4114683791 |
|
|
Sep 09 11:25:13 AM UTC 24 |
Sep 09 11:25:21 AM UTC 24 |
444271150 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2045280434 |
|
|
Sep 09 11:25:00 AM UTC 24 |
Sep 09 11:25:22 AM UTC 24 |
818991282 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2812047104 |
|
|
Sep 09 11:24:48 AM UTC 24 |
Sep 09 11:25:22 AM UTC 24 |
919027661 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3563864330 |
|
|
Sep 09 11:25:20 AM UTC 24 |
Sep 09 11:25:23 AM UTC 24 |
17016166 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.2291907494 |
|
|
Sep 09 11:25:13 AM UTC 24 |
Sep 09 11:25:23 AM UTC 24 |
322383179 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.1205527745 |
|
|
Sep 09 11:24:21 AM UTC 24 |
Sep 09 11:25:23 AM UTC 24 |
5063349443 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.1088241192 |
|
|
Sep 09 11:25:13 AM UTC 24 |
Sep 09 11:25:23 AM UTC 24 |
474772493 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.356846679 |
|
|
Sep 09 11:24:55 AM UTC 24 |
Sep 09 11:25:23 AM UTC 24 |
715659800 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.1064853557 |
|
|
Sep 09 11:25:20 AM UTC 24 |
Sep 09 11:25:24 AM UTC 24 |
55142283 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.1543578909 |
|
|
Sep 09 11:23:45 AM UTC 24 |
Sep 09 11:25:25 AM UTC 24 |
3794417770 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.657379044 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:25 AM UTC 24 |
721550747 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.4274820586 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:25 AM UTC 24 |
146208330 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.1855694971 |
|
|
Sep 09 11:25:21 AM UTC 24 |
Sep 09 11:25:26 AM UTC 24 |
255058142 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.1821868428 |
|
|
Sep 09 11:25:11 AM UTC 24 |
Sep 09 11:25:26 AM UTC 24 |
570922975 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.2107649 |
|
|
Sep 09 11:25:23 AM UTC 24 |
Sep 09 11:25:26 AM UTC 24 |
75026006 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.197303652 |
|
|
Sep 09 11:25:14 AM UTC 24 |
Sep 09 11:25:27 AM UTC 24 |
1403416244 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.2202935743 |
|
|
Sep 09 11:24:45 AM UTC 24 |
Sep 09 11:25:27 AM UTC 24 |
3719444329 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.513283246 |
|
|
Sep 09 11:25:18 AM UTC 24 |
Sep 09 11:25:27 AM UTC 24 |
236908633 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.3202925930 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:28 AM UTC 24 |
1360663294 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.3442292456 |
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|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:28 AM UTC 24 |
151642913 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.645459450 |
|
|
Sep 09 11:25:26 AM UTC 24 |
Sep 09 11:25:28 AM UTC 24 |
13675538 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3916575384 |
|
|
Sep 09 11:25:26 AM UTC 24 |
Sep 09 11:25:28 AM UTC 24 |
112708866 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.493108977 |
|
|
Sep 09 11:25:24 AM UTC 24 |
Sep 09 11:25:29 AM UTC 24 |
182687500 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.1144355023 |
|
|
Sep 09 11:25:10 AM UTC 24 |
Sep 09 11:25:30 AM UTC 24 |
830594218 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.2520672066 |
|
|
Sep 09 11:25:18 AM UTC 24 |
Sep 09 11:25:30 AM UTC 24 |
206830130 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.404680947 |
|
|
Sep 09 11:25:26 AM UTC 24 |
Sep 09 11:25:30 AM UTC 24 |
288094905 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.3819858269 |
|
|
Sep 09 11:24:30 AM UTC 24 |
Sep 09 11:25:31 AM UTC 24 |
1357762084 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.3095583060 |
|
|
Sep 09 11:23:11 AM UTC 24 |
Sep 09 11:25:32 AM UTC 24 |
4407494910 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.2378682630 |
|
|
Sep 09 11:25:38 AM UTC 24 |
Sep 09 11:25:54 AM UTC 24 |
629728372 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.2148078064 |
|
|
Sep 09 11:25:27 AM UTC 24 |
Sep 09 11:25:32 AM UTC 24 |
209394177 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.4090656419 |
|
|
Sep 09 11:24:39 AM UTC 24 |
Sep 09 11:25:33 AM UTC 24 |
2105271405 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.814644151 |
|
|
Sep 09 11:25:16 AM UTC 24 |
Sep 09 11:25:33 AM UTC 24 |
577572633 ps |