| T369 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.3006046804 |
|
|
Sep 24 12:39:15 PM UTC 24 |
Sep 24 12:39:37 PM UTC 24 |
3211021127 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.2099482936 |
|
|
Sep 24 12:39:30 PM UTC 24 |
Sep 24 12:39:38 PM UTC 24 |
330733777 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.2421474876 |
|
|
Sep 24 12:39:36 PM UTC 24 |
Sep 24 12:39:39 PM UTC 24 |
25683862 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.720028438 |
|
|
Sep 24 12:39:37 PM UTC 24 |
Sep 24 12:39:40 PM UTC 24 |
46265536 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.2785331229 |
|
|
Sep 24 12:39:28 PM UTC 24 |
Sep 24 12:39:40 PM UTC 24 |
115274760 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.630741428 |
|
|
Sep 24 12:39:01 PM UTC 24 |
Sep 24 12:39:40 PM UTC 24 |
363329897 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.309401803 |
|
|
Sep 24 12:39:20 PM UTC 24 |
Sep 24 12:39:41 PM UTC 24 |
393329398 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.1083510356 |
|
|
Sep 24 12:39:11 PM UTC 24 |
Sep 24 12:39:41 PM UTC 24 |
374340495 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.1328163177 |
|
|
Sep 24 12:38:45 PM UTC 24 |
Sep 24 12:39:41 PM UTC 24 |
1338015364 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.2948916115 |
|
|
Sep 24 12:38:39 PM UTC 24 |
Sep 24 12:39:42 PM UTC 24 |
6181051665 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.351582851 |
|
|
Sep 24 12:39:10 PM UTC 24 |
Sep 24 12:39:42 PM UTC 24 |
8767424012 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.2618731552 |
|
|
Sep 24 12:40:12 PM UTC 24 |
Sep 24 12:40:16 PM UTC 24 |
37187984 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.4010094530 |
|
|
Sep 24 12:39:37 PM UTC 24 |
Sep 24 12:39:42 PM UTC 24 |
110511009 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.862434516 |
|
|
Sep 24 12:39:30 PM UTC 24 |
Sep 24 12:39:45 PM UTC 24 |
401984226 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.597755129 |
|
|
Sep 24 12:39:40 PM UTC 24 |
Sep 24 12:39:45 PM UTC 24 |
109291004 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3564278086 |
|
|
Sep 24 12:39:42 PM UTC 24 |
Sep 24 12:39:46 PM UTC 24 |
200536527 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2506194184 |
|
|
Sep 24 12:39:40 PM UTC 24 |
Sep 24 12:39:46 PM UTC 24 |
236399676 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.1998426335 |
|
|
Sep 24 12:39:36 PM UTC 24 |
Sep 24 12:39:46 PM UTC 24 |
330798178 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.2706090891 |
|
|
Sep 24 12:37:30 PM UTC 24 |
Sep 24 12:39:47 PM UTC 24 |
12243694182 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.2758685864 |
|
|
Sep 24 12:39:33 PM UTC 24 |
Sep 24 12:39:49 PM UTC 24 |
516077362 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.680854869 |
|
|
Sep 24 12:39:04 PM UTC 24 |
Sep 24 12:39:49 PM UTC 24 |
2056568655 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.1755270396 |
|
|
Sep 24 12:39:33 PM UTC 24 |
Sep 24 12:39:50 PM UTC 24 |
4604502609 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.1359340912 |
|
|
Sep 24 12:39:30 PM UTC 24 |
Sep 24 12:39:50 PM UTC 24 |
525668494 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.641345687 |
|
|
Sep 24 12:39:36 PM UTC 24 |
Sep 24 12:39:51 PM UTC 24 |
485048700 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.4190780731 |
|
|
Sep 24 12:39:33 PM UTC 24 |
Sep 24 12:39:51 PM UTC 24 |
719230864 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.4087184872 |
|
|
Sep 24 12:39:03 PM UTC 24 |
Sep 24 12:39:51 PM UTC 24 |
2299091525 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.3414620203 |
|
|
Sep 24 12:38:29 PM UTC 24 |
Sep 24 12:39:51 PM UTC 24 |
7859329526 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.2055825336 |
|
|
Sep 24 12:39:49 PM UTC 24 |
Sep 24 12:39:52 PM UTC 24 |
53922636 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.174238219 |
|
|
Sep 24 12:39:36 PM UTC 24 |
Sep 24 12:39:52 PM UTC 24 |
232495021 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.1363044535 |
|
|
Sep 24 12:39:49 PM UTC 24 |
Sep 24 12:39:52 PM UTC 24 |
117119189 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.865306466 |
|
|
Sep 24 12:40:05 PM UTC 24 |
Sep 24 12:40:15 PM UTC 24 |
220027280 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.3767734903 |
|
|
Sep 24 12:39:50 PM UTC 24 |
Sep 24 12:39:53 PM UTC 24 |
30688347 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.753062241 |
|
|
Sep 24 12:39:42 PM UTC 24 |
Sep 24 12:39:53 PM UTC 24 |
609423597 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.15518604 |
|
|
Sep 24 12:39:42 PM UTC 24 |
Sep 24 12:39:55 PM UTC 24 |
389936259 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.4247782984 |
|
|
Sep 24 12:39:44 PM UTC 24 |
Sep 24 12:39:55 PM UTC 24 |
3058796379 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.4040687156 |
|
|
Sep 24 12:39:52 PM UTC 24 |
Sep 24 12:39:56 PM UTC 24 |
137570273 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.1510886231 |
|
|
Sep 24 12:39:40 PM UTC 24 |
Sep 24 12:39:57 PM UTC 24 |
1496252552 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.3701595508 |
|
|
Sep 24 12:39:52 PM UTC 24 |
Sep 24 12:39:57 PM UTC 24 |
289239623 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.3565826953 |
|
|
Sep 24 12:39:50 PM UTC 24 |
Sep 24 12:39:58 PM UTC 24 |
55692834 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.3689755027 |
|
|
Sep 24 12:39:43 PM UTC 24 |
Sep 24 12:39:58 PM UTC 24 |
1111088460 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.1063885865 |
|
|
Sep 24 12:39:53 PM UTC 24 |
Sep 24 12:39:59 PM UTC 24 |
98892675 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.2854855133 |
|
|
Sep 24 12:39:57 PM UTC 24 |
Sep 24 12:40:00 PM UTC 24 |
21697934 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.3444244423 |
|
|
Sep 24 12:39:46 PM UTC 24 |
Sep 24 12:40:00 PM UTC 24 |
933363162 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2050408741 |
|
|
Sep 24 12:39:47 PM UTC 24 |
Sep 24 12:40:00 PM UTC 24 |
239945203 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.228207392 |
|
|
Sep 24 12:39:15 PM UTC 24 |
Sep 24 12:40:00 PM UTC 24 |
1868168827 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.3523603357 |
|
|
Sep 24 12:39:58 PM UTC 24 |
Sep 24 12:40:00 PM UTC 24 |
13056819 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.2321475800 |
|
|
Sep 24 12:39:58 PM UTC 24 |
Sep 24 12:40:02 PM UTC 24 |
88166132 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.986928822 |
|
|
Sep 24 12:38:51 PM UTC 24 |
Sep 24 12:40:02 PM UTC 24 |
22109242308 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_state_failure.2177147467 |
|
|
Sep 24 12:38:26 PM UTC 24 |
Sep 24 12:40:03 PM UTC 24 |
5561545042 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.810293584 |
|
|
Sep 24 12:40:01 PM UTC 24 |
Sep 24 12:40:04 PM UTC 24 |
34291536 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.443765225 |
|
|
Sep 24 12:39:53 PM UTC 24 |
Sep 24 12:40:04 PM UTC 24 |
202404843 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.1617477236 |
|
|
Sep 24 12:39:52 PM UTC 24 |
Sep 24 12:40:16 PM UTC 24 |
553778618 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.1176938210 |
|
|
Sep 24 12:39:28 PM UTC 24 |
Sep 24 12:40:05 PM UTC 24 |
1345057428 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.886352861 |
|
|
Sep 24 12:39:52 PM UTC 24 |
Sep 24 12:40:05 PM UTC 24 |
350383517 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.828424569 |
|
|
Sep 24 12:40:01 PM UTC 24 |
Sep 24 12:40:08 PM UTC 24 |
4085635099 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.2003686561 |
|
|
Sep 24 12:39:59 PM UTC 24 |
Sep 24 12:40:09 PM UTC 24 |
60436533 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.3153606568 |
|
|
Sep 24 12:40:03 PM UTC 24 |
Sep 24 12:40:10 PM UTC 24 |
948390332 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.3133940722 |
|
|
Sep 24 12:39:46 PM UTC 24 |
Sep 24 12:40:11 PM UTC 24 |
2246750210 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.2795990090 |
|
|
Sep 24 12:40:01 PM UTC 24 |
Sep 24 12:40:11 PM UTC 24 |
659904611 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.4273607458 |
|
|
Sep 24 12:39:54 PM UTC 24 |
Sep 24 12:40:11 PM UTC 24 |
364717618 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.3353525314 |
|
|
Sep 24 12:40:09 PM UTC 24 |
Sep 24 12:40:12 PM UTC 24 |
18128683 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1772292130 |
|
|
Sep 24 12:40:03 PM UTC 24 |
Sep 24 12:40:12 PM UTC 24 |
205951630 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.516454524 |
|
|
Sep 24 12:39:53 PM UTC 24 |
Sep 24 12:40:13 PM UTC 24 |
1820737614 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.1025884089 |
|
|
Sep 24 12:39:53 PM UTC 24 |
Sep 24 12:40:13 PM UTC 24 |
867253412 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.1735301943 |
|
|
Sep 24 12:40:10 PM UTC 24 |
Sep 24 12:40:13 PM UTC 24 |
22080573 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.1806646779 |
|
|
Sep 24 12:40:10 PM UTC 24 |
Sep 24 12:40:14 PM UTC 24 |
30580341 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.1698475631 |
|
|
Sep 24 12:39:58 PM UTC 24 |
Sep 24 12:40:16 PM UTC 24 |
505654278 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.2546791433 |
|
|
Sep 24 12:40:05 PM UTC 24 |
Sep 24 12:40:17 PM UTC 24 |
1797291191 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.3865039598 |
|
|
Sep 24 12:41:02 PM UTC 24 |
Sep 24 12:41:05 PM UTC 24 |
54501851 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.1717919571 |
|
|
Sep 24 12:39:55 PM UTC 24 |
Sep 24 12:40:17 PM UTC 24 |
716942594 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2949680693 |
|
|
Sep 24 12:39:39 PM UTC 24 |
Sep 24 12:40:19 PM UTC 24 |
685470106 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.2921585725 |
|
|
Sep 24 12:40:13 PM UTC 24 |
Sep 24 12:40:19 PM UTC 24 |
507589890 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.907247303 |
|
|
Sep 24 12:39:56 PM UTC 24 |
Sep 24 12:40:21 PM UTC 24 |
2380417756 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.2090656791 |
|
|
Sep 24 12:39:50 PM UTC 24 |
Sep 24 12:40:22 PM UTC 24 |
426254223 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3037042899 |
|
|
Sep 24 12:39:18 PM UTC 24 |
Sep 24 12:40:22 PM UTC 24 |
5791776082 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.244082713 |
|
|
Sep 24 12:40:20 PM UTC 24 |
Sep 24 12:40:23 PM UTC 24 |
41633693 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2085843342 |
|
|
Sep 24 12:40:12 PM UTC 24 |
Sep 24 12:40:23 PM UTC 24 |
81255343 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3809263950 |
|
|
Sep 24 12:40:02 PM UTC 24 |
Sep 24 12:40:24 PM UTC 24 |
814736263 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.2056160307 |
|
|
Sep 24 12:39:20 PM UTC 24 |
Sep 24 12:40:24 PM UTC 24 |
5438212121 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.3169255363 |
|
|
Sep 24 12:40:01 PM UTC 24 |
Sep 24 12:40:24 PM UTC 24 |
4070278000 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.827175604 |
|
|
Sep 24 12:40:06 PM UTC 24 |
Sep 24 12:40:24 PM UTC 24 |
316820745 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1831313142 |
|
|
Sep 24 12:40:12 PM UTC 24 |
Sep 24 12:40:25 PM UTC 24 |
1486293457 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.365046529 |
|
|
Sep 24 12:40:12 PM UTC 24 |
Sep 24 12:40:25 PM UTC 24 |
690041358 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.3906258372 |
|
|
Sep 24 12:40:23 PM UTC 24 |
Sep 24 12:40:25 PM UTC 24 |
39655344 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.987837578 |
|
|
Sep 24 12:38:59 PM UTC 24 |
Sep 24 12:40:25 PM UTC 24 |
19584874490 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.922129777 |
|
|
Sep 24 12:40:17 PM UTC 24 |
Sep 24 12:40:26 PM UTC 24 |
6046457173 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.1621084802 |
|
|
Sep 24 12:40:14 PM UTC 24 |
Sep 24 12:40:26 PM UTC 24 |
1124982958 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.1789459607 |
|
|
Sep 24 12:40:23 PM UTC 24 |
Sep 24 12:40:26 PM UTC 24 |
140256456 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.551010689 |
|
|
Sep 24 12:40:17 PM UTC 24 |
Sep 24 12:40:30 PM UTC 24 |
716016902 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.2278333561 |
|
|
Sep 24 12:39:53 PM UTC 24 |
Sep 24 12:40:30 PM UTC 24 |
6861143656 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.1219433103 |
|
|
Sep 24 12:40:18 PM UTC 24 |
Sep 24 12:40:30 PM UTC 24 |
267558063 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.3244882737 |
|
|
Sep 24 12:40:17 PM UTC 24 |
Sep 24 12:40:30 PM UTC 24 |
1095938883 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all_with_rand_reset.941938268 |
|
|
Sep 24 12:38:32 PM UTC 24 |
Sep 24 12:40:30 PM UTC 24 |
5888741068 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.1917512461 |
|
|
Sep 24 12:39:30 PM UTC 24 |
Sep 24 12:40:31 PM UTC 24 |
2369153188 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.205842292 |
|
|
Sep 24 12:40:24 PM UTC 24 |
Sep 24 12:40:31 PM UTC 24 |
115277960 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.2910637723 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:40:32 PM UTC 24 |
429263654 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.3491884656 |
|
|
Sep 24 12:40:27 PM UTC 24 |
Sep 24 12:40:32 PM UTC 24 |
229308155 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.2755131232 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:40:32 PM UTC 24 |
233801208 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.1129450090 |
|
|
Sep 24 12:40:24 PM UTC 24 |
Sep 24 12:40:34 PM UTC 24 |
55678427 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.533212991 |
|
|
Sep 24 12:40:31 PM UTC 24 |
Sep 24 12:40:34 PM UTC 24 |
55815480 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.4035607263 |
|
|
Sep 24 12:40:31 PM UTC 24 |
Sep 24 12:40:34 PM UTC 24 |
74359757 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.477698741 |
|
|
Sep 24 12:40:49 PM UTC 24 |
Sep 24 12:41:04 PM UTC 24 |
2071923426 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.3589614574 |
|
|
Sep 24 12:39:43 PM UTC 24 |
Sep 24 12:40:36 PM UTC 24 |
1960816266 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.324332156 |
|
|
Sep 24 12:40:31 PM UTC 24 |
Sep 24 12:40:36 PM UTC 24 |
101271064 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.3122594654 |
|
|
Sep 24 12:40:28 PM UTC 24 |
Sep 24 12:40:38 PM UTC 24 |
214805026 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.1050919908 |
|
|
Sep 24 12:39:23 PM UTC 24 |
Sep 24 12:40:39 PM UTC 24 |
4726303652 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1750737051 |
|
|
Sep 24 12:40:33 PM UTC 24 |
Sep 24 12:40:39 PM UTC 24 |
206916670 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.3868270281 |
|
|
Sep 24 12:39:42 PM UTC 24 |
Sep 24 12:40:41 PM UTC 24 |
10012063444 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.3381560667 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:40:41 PM UTC 24 |
670830884 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.2665568879 |
|
|
Sep 24 12:40:38 PM UTC 24 |
Sep 24 12:40:42 PM UTC 24 |
339212373 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.3623026918 |
|
|
Sep 24 12:38:45 PM UTC 24 |
Sep 24 12:40:42 PM UTC 24 |
6833916748 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.1964829590 |
|
|
Sep 24 12:40:28 PM UTC 24 |
Sep 24 12:40:43 PM UTC 24 |
2410384364 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.2839367576 |
|
|
Sep 24 12:40:12 PM UTC 24 |
Sep 24 12:40:44 PM UTC 24 |
231854109 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.3973466968 |
|
|
Sep 24 12:40:27 PM UTC 24 |
Sep 24 12:40:44 PM UTC 24 |
804666327 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2643377705 |
|
|
Sep 24 12:40:33 PM UTC 24 |
Sep 24 12:40:44 PM UTC 24 |
87378431 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.3674295236 |
|
|
Sep 24 12:40:43 PM UTC 24 |
Sep 24 12:40:46 PM UTC 24 |
18315493 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.3144909913 |
|
|
Sep 24 12:40:44 PM UTC 24 |
Sep 24 12:40:46 PM UTC 24 |
34370303 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.1542220564 |
|
|
Sep 24 12:40:33 PM UTC 24 |
Sep 24 12:41:05 PM UTC 24 |
1487141532 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.1524308102 |
|
|
Sep 24 12:40:35 PM UTC 24 |
Sep 24 12:40:47 PM UTC 24 |
323156673 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.1885139959 |
|
|
Sep 24 12:40:36 PM UTC 24 |
Sep 24 12:40:48 PM UTC 24 |
387528259 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.2374451624 |
|
|
Sep 24 12:40:35 PM UTC 24 |
Sep 24 12:40:48 PM UTC 24 |
1306285139 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.3634478996 |
|
|
Sep 24 12:39:33 PM UTC 24 |
Sep 24 12:40:48 PM UTC 24 |
2130589289 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.1951738526 |
|
|
Sep 24 12:40:44 PM UTC 24 |
Sep 24 12:40:48 PM UTC 24 |
66752374 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.2253993130 |
|
|
Sep 24 12:40:33 PM UTC 24 |
Sep 24 12:40:48 PM UTC 24 |
336500757 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.2266305497 |
|
|
Sep 24 12:40:23 PM UTC 24 |
Sep 24 12:40:50 PM UTC 24 |
979001485 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.2692233630 |
|
|
Sep 24 12:40:45 PM UTC 24 |
Sep 24 12:40:50 PM UTC 24 |
62859422 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.2905481351 |
|
|
Sep 24 12:40:13 PM UTC 24 |
Sep 24 12:40:50 PM UTC 24 |
1095763429 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.2175684087 |
|
|
Sep 24 12:40:33 PM UTC 24 |
Sep 24 12:40:51 PM UTC 24 |
2302343647 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.899187514 |
|
|
Sep 24 12:40:40 PM UTC 24 |
Sep 24 12:40:53 PM UTC 24 |
239071515 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1106993531 |
|
|
Sep 24 12:39:52 PM UTC 24 |
Sep 24 12:40:53 PM UTC 24 |
5810711737 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2805435396 |
|
|
Sep 24 12:40:40 PM UTC 24 |
Sep 24 12:40:53 PM UTC 24 |
818323773 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.3889806300 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:40:53 PM UTC 24 |
687708869 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.758365932 |
|
|
Sep 24 12:40:48 PM UTC 24 |
Sep 24 12:40:53 PM UTC 24 |
96446018 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.1380129316 |
|
|
Sep 24 12:40:49 PM UTC 24 |
Sep 24 12:40:54 PM UTC 24 |
73997504 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.1886522696 |
|
|
Sep 24 12:40:24 PM UTC 24 |
Sep 24 12:40:54 PM UTC 24 |
2807098735 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.66259377 |
|
|
Sep 24 12:40:45 PM UTC 24 |
Sep 24 12:40:54 PM UTC 24 |
88654612 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.344251960 |
|
|
Sep 24 12:40:03 PM UTC 24 |
Sep 24 12:40:55 PM UTC 24 |
18592179053 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2333557962 |
|
|
Sep 24 12:39:36 PM UTC 24 |
Sep 24 12:40:55 PM UTC 24 |
17857110960 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.205078968 |
|
|
Sep 24 12:40:54 PM UTC 24 |
Sep 24 12:40:57 PM UTC 24 |
18429252 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.1194200595 |
|
|
Sep 24 12:40:54 PM UTC 24 |
Sep 24 12:40:57 PM UTC 24 |
90194274 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.2545412791 |
|
|
Sep 24 12:38:57 PM UTC 24 |
Sep 24 12:40:57 PM UTC 24 |
16535855454 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.3645773347 |
|
|
Sep 24 12:40:46 PM UTC 24 |
Sep 24 12:40:59 PM UTC 24 |
359465872 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.1562068577 |
|
|
Sep 24 12:40:54 PM UTC 24 |
Sep 24 12:41:01 PM UTC 24 |
433427051 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.2112965060 |
|
|
Sep 24 12:40:56 PM UTC 24 |
Sep 24 12:41:01 PM UTC 24 |
128427169 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.2032091426 |
|
|
Sep 24 12:40:39 PM UTC 24 |
Sep 24 12:41:02 PM UTC 24 |
4168221707 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.4286894414 |
|
|
Sep 24 12:40:48 PM UTC 24 |
Sep 24 12:41:03 PM UTC 24 |
352254622 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.1113997240 |
|
|
Sep 24 12:41:03 PM UTC 24 |
Sep 24 12:41:08 PM UTC 24 |
130102196 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.2474209448 |
|
|
Sep 24 12:40:52 PM UTC 24 |
Sep 24 12:41:04 PM UTC 24 |
302773986 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.2214107550 |
|
|
Sep 24 12:40:56 PM UTC 24 |
Sep 24 12:41:05 PM UTC 24 |
160454148 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.864001437 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:41:06 PM UTC 24 |
9624525047 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.172793049 |
|
|
Sep 24 12:40:49 PM UTC 24 |
Sep 24 12:41:06 PM UTC 24 |
1122253009 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.225633187 |
|
|
Sep 24 12:41:04 PM UTC 24 |
Sep 24 12:41:07 PM UTC 24 |
38802497 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.4162748783 |
|
|
Sep 24 12:40:50 PM UTC 24 |
Sep 24 12:41:07 PM UTC 24 |
1329076288 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.3986539935 |
|
|
Sep 24 12:40:45 PM UTC 24 |
Sep 24 12:41:08 PM UTC 24 |
173069950 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.300073956 |
|
|
Sep 24 12:40:50 PM UTC 24 |
Sep 24 12:41:08 PM UTC 24 |
2215142213 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.279636460 |
|
|
Sep 24 12:40:57 PM UTC 24 |
Sep 24 12:41:09 PM UTC 24 |
3732467873 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.2433035331 |
|
|
Sep 24 12:41:34 PM UTC 24 |
Sep 24 12:41:51 PM UTC 24 |
5695873777 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.1101266126 |
|
|
Sep 24 12:41:06 PM UTC 24 |
Sep 24 12:41:11 PM UTC 24 |
249778699 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.231692091 |
|
|
Sep 24 12:40:56 PM UTC 24 |
Sep 24 12:41:11 PM UTC 24 |
276080622 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.795577248 |
|
|
Sep 24 12:41:06 PM UTC 24 |
Sep 24 12:41:11 PM UTC 24 |
45645094 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.141846722 |
|
|
Sep 24 12:40:26 PM UTC 24 |
Sep 24 12:41:13 PM UTC 24 |
6344235384 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.773376410 |
|
|
Sep 24 12:41:10 PM UTC 24 |
Sep 24 12:41:13 PM UTC 24 |
14787652 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1355144584 |
|
|
Sep 24 12:40:56 PM UTC 24 |
Sep 24 12:41:13 PM UTC 24 |
1091116004 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.2012623564 |
|
|
Sep 24 12:41:07 PM UTC 24 |
Sep 24 12:41:13 PM UTC 24 |
971290558 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.4093316912 |
|
|
Sep 24 12:41:11 PM UTC 24 |
Sep 24 12:41:14 PM UTC 24 |
18730433 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.3800904753 |
|
|
Sep 24 12:41:07 PM UTC 24 |
Sep 24 12:41:16 PM UTC 24 |
217173060 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.3965013584 |
|
|
Sep 24 12:41:12 PM UTC 24 |
Sep 24 12:41:18 PM UTC 24 |
85051293 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.2829071306 |
|
|
Sep 24 12:40:16 PM UTC 24 |
Sep 24 12:41:18 PM UTC 24 |
2971444006 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.971589026 |
|
|
Sep 24 12:41:10 PM UTC 24 |
Sep 24 12:41:19 PM UTC 24 |
191045120 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.1768884881 |
|
|
Sep 24 12:40:57 PM UTC 24 |
Sep 24 12:41:19 PM UTC 24 |
419358142 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1089931971 |
|
|
Sep 24 12:40:59 PM UTC 24 |
Sep 24 12:41:20 PM UTC 24 |
302199726 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.1132540024 |
|
|
Sep 24 12:41:09 PM UTC 24 |
Sep 24 12:41:20 PM UTC 24 |
521609987 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.924535461 |
|
|
Sep 24 12:40:35 PM UTC 24 |
Sep 24 12:41:20 PM UTC 24 |
1813601856 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.2817140393 |
|
|
Sep 24 12:41:09 PM UTC 24 |
Sep 24 12:41:21 PM UTC 24 |
435654969 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.319655389 |
|
|
Sep 24 12:41:07 PM UTC 24 |
Sep 24 12:41:22 PM UTC 24 |
949548736 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3223195634 |
|
|
Sep 24 12:41:21 PM UTC 24 |
Sep 24 12:41:23 PM UTC 24 |
21724085 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.2977260075 |
|
|
Sep 24 12:41:21 PM UTC 24 |
Sep 24 12:41:24 PM UTC 24 |
25891097 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.3045847628 |
|
|
Sep 24 12:41:21 PM UTC 24 |
Sep 24 12:41:24 PM UTC 24 |
423954879 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.516952448 |
|
|
Sep 24 12:41:49 PM UTC 24 |
Sep 24 12:41:52 PM UTC 24 |
49674527 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.202107864 |
|
|
Sep 24 12:41:12 PM UTC 24 |
Sep 24 12:41:26 PM UTC 24 |
613842705 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.4289469947 |
|
|
Sep 24 12:40:56 PM UTC 24 |
Sep 24 12:41:26 PM UTC 24 |
7070524421 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.4231658281 |
|
|
Sep 24 12:41:14 PM UTC 24 |
Sep 24 12:41:26 PM UTC 24 |
351875960 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.2985454874 |
|
|
Sep 24 12:41:22 PM UTC 24 |
Sep 24 12:41:26 PM UTC 24 |
35798109 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.1760890823 |
|
|
Sep 24 12:41:14 PM UTC 24 |
Sep 24 12:41:27 PM UTC 24 |
738474687 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.124823516 |
|
|
Sep 24 12:41:14 PM UTC 24 |
Sep 24 12:41:28 PM UTC 24 |
764329325 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.1846826715 |
|
|
Sep 24 12:41:06 PM UTC 24 |
Sep 24 12:41:28 PM UTC 24 |
311866592 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3325483355 |
|
|
Sep 24 12:40:54 PM UTC 24 |
Sep 24 12:41:28 PM UTC 24 |
1710810997 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3823605781 |
|
|
Sep 24 12:41:21 PM UTC 24 |
Sep 24 12:41:29 PM UTC 24 |
66530647 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.2275922752 |
|
|
Sep 24 12:41:27 PM UTC 24 |
Sep 24 12:41:29 PM UTC 24 |
27541258 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.4294473803 |
|
|
Sep 24 12:41:06 PM UTC 24 |
Sep 24 12:41:31 PM UTC 24 |
960735521 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.3508425625 |
|
|
Sep 24 12:41:29 PM UTC 24 |
Sep 24 12:41:31 PM UTC 24 |
13725870 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.3981885957 |
|
|
Sep 24 12:40:49 PM UTC 24 |
Sep 24 12:41:31 PM UTC 24 |
2613893413 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.2938327538 |
|
|
Sep 24 12:41:17 PM UTC 24 |
Sep 24 12:41:33 PM UTC 24 |
1355567606 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.904810945 |
|
|
Sep 24 12:41:25 PM UTC 24 |
Sep 24 12:41:33 PM UTC 24 |
781164054 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.3575347731 |
|
|
Sep 24 12:40:13 PM UTC 24 |
Sep 24 12:41:33 PM UTC 24 |
5307555045 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.2560937318 |
|
|
Sep 24 12:41:29 PM UTC 24 |
Sep 24 12:41:33 PM UTC 24 |
165889283 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.3471515981 |
|
|
Sep 24 12:41:15 PM UTC 24 |
Sep 24 12:41:34 PM UTC 24 |
678172770 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.3955541279 |
|
|
Sep 24 12:41:30 PM UTC 24 |
Sep 24 12:41:34 PM UTC 24 |
128167412 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.4112905144 |
|
|
Sep 24 12:41:14 PM UTC 24 |
Sep 24 12:41:34 PM UTC 24 |
304056024 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.1461938111 |
|
|
Sep 24 12:40:49 PM UTC 24 |
Sep 24 12:41:36 PM UTC 24 |
2334795355 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.827030041 |
|
|
Sep 24 12:41:26 PM UTC 24 |
Sep 24 12:41:36 PM UTC 24 |
340318856 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.1508825034 |
|
|
Sep 24 12:41:35 PM UTC 24 |
Sep 24 12:41:38 PM UTC 24 |
41679486 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.2765897867 |
|
|
Sep 24 12:41:35 PM UTC 24 |
Sep 24 12:41:38 PM UTC 24 |
15539602 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.1380740667 |
|
|
Sep 24 12:41:35 PM UTC 24 |
Sep 24 12:41:39 PM UTC 24 |
35335833 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.2706120748 |
|
|
Sep 24 12:41:30 PM UTC 24 |
Sep 24 12:41:40 PM UTC 24 |
210165288 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.1639864822 |
|
|
Sep 24 12:41:41 PM UTC 24 |
Sep 24 12:41:53 PM UTC 24 |
349931795 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2473582061 |
|
|
Sep 24 12:41:32 PM UTC 24 |
Sep 24 12:41:40 PM UTC 24 |
336305223 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.3431216563 |
|
|
Sep 24 12:41:38 PM UTC 24 |
Sep 24 12:41:42 PM UTC 24 |
190070022 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.152079980 |
|
|
Sep 24 12:41:26 PM UTC 24 |
Sep 24 12:41:43 PM UTC 24 |
1529525934 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.2320568849 |
|
|
Sep 24 12:41:09 PM UTC 24 |
Sep 24 12:41:44 PM UTC 24 |
13047988690 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.3584767228 |
|
|
Sep 24 12:41:34 PM UTC 24 |
Sep 24 12:41:46 PM UTC 24 |
3284892370 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.591078485 |
|
|
Sep 24 12:41:32 PM UTC 24 |
Sep 24 12:41:46 PM UTC 24 |
308967391 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.1377235266 |
|
|
Sep 24 12:41:23 PM UTC 24 |
Sep 24 12:41:47 PM UTC 24 |
1533776664 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.10198523 |
|
|
Sep 24 12:41:12 PM UTC 24 |
Sep 24 12:41:47 PM UTC 24 |
260947713 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.1218250337 |
|
|
Sep 24 12:41:40 PM UTC 24 |
Sep 24 12:41:47 PM UTC 24 |
1696930446 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.3176187174 |
|
|
Sep 24 12:41:45 PM UTC 24 |
Sep 24 12:41:48 PM UTC 24 |
126434633 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.826578437 |
|
|
Sep 24 12:41:26 PM UTC 24 |
Sep 24 12:41:48 PM UTC 24 |
668342469 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.4177197293 |
|
|
Sep 24 12:41:31 PM UTC 24 |
Sep 24 12:41:48 PM UTC 24 |
314578967 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3418714311 |
|
|
Sep 24 12:40:38 PM UTC 24 |
Sep 24 12:41:49 PM UTC 24 |
14248246356 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.1759718570 |
|
|
Sep 24 12:41:47 PM UTC 24 |
Sep 24 12:41:50 PM UTC 24 |
22922649 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.3405010244 |
|
|
Sep 24 12:41:25 PM UTC 24 |
Sep 24 12:41:50 PM UTC 24 |
2109373074 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.1268252228 |
|
|
Sep 24 12:41:37 PM UTC 24 |
Sep 24 12:41:50 PM UTC 24 |
100108614 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.1712451214 |
|
|
Sep 24 12:40:02 PM UTC 24 |
Sep 24 12:41:50 PM UTC 24 |
2822286284 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2595151145 |
|
|
Sep 24 12:41:21 PM UTC 24 |
Sep 24 12:41:50 PM UTC 24 |
324265814 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.4087980954 |
|
|
Sep 24 12:41:39 PM UTC 24 |
Sep 24 12:41:51 PM UTC 24 |
470317186 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.3571075972 |
|
|
Sep 24 12:41:46 PM UTC 24 |
Sep 24 12:41:51 PM UTC 24 |
241404775 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1227842558 |
|
|
Sep 24 12:39:47 PM UTC 24 |
Sep 24 12:41:54 PM UTC 24 |
20101511758 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.1665451954 |
|
|
Sep 24 12:41:41 PM UTC 24 |
Sep 24 12:41:53 PM UTC 24 |
654838015 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.3791751338 |
|
|
Sep 24 12:41:52 PM UTC 24 |
Sep 24 12:41:55 PM UTC 24 |
12397819 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3902849200 |
|
|
Sep 24 12:41:52 PM UTC 24 |
Sep 24 12:41:55 PM UTC 24 |
29614111 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.795472165 |
|
|
Sep 24 12:41:52 PM UTC 24 |
Sep 24 12:41:55 PM UTC 24 |
14338437 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.1587576658 |
|
|
Sep 24 12:41:40 PM UTC 24 |
Sep 24 12:41:55 PM UTC 24 |
334872564 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.1234387689 |
|
|
Sep 24 12:41:29 PM UTC 24 |
Sep 24 12:41:58 PM UTC 24 |
241208624 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.3245959596 |
|
|
Sep 24 12:41:39 PM UTC 24 |
Sep 24 12:41:58 PM UTC 24 |
1570503390 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.83680318 |
|
|
Sep 24 12:41:55 PM UTC 24 |
Sep 24 12:41:58 PM UTC 24 |
95015589 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.1555393912 |
|
|
Sep 24 12:41:55 PM UTC 24 |
Sep 24 12:42:01 PM UTC 24 |
428947648 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.3624259855 |
|
|
Sep 24 12:41:59 PM UTC 24 |
Sep 24 12:42:01 PM UTC 24 |
43049095 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1487005140 |
|
|
Sep 24 12:41:49 PM UTC 24 |
Sep 24 12:42:02 PM UTC 24 |
74529049 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.3138223805 |
|
|
Sep 24 12:41:37 PM UTC 24 |
Sep 24 12:42:03 PM UTC 24 |
739098157 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.1926295333 |
|
|
Sep 24 12:41:49 PM UTC 24 |
Sep 24 12:42:03 PM UTC 24 |
5987384202 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.942297716 |
|
|
Sep 24 12:42:36 PM UTC 24 |
Sep 24 12:42:45 PM UTC 24 |
184608077 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.2458225155 |
|
|
Sep 24 12:41:53 PM UTC 24 |
Sep 24 12:42:04 PM UTC 24 |
347538367 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.3590201233 |
|
|
Sep 24 12:41:59 PM UTC 24 |
Sep 24 12:42:04 PM UTC 24 |
45098979 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2874058362 |
|
|
Sep 24 12:42:02 PM UTC 24 |
Sep 24 12:42:04 PM UTC 24 |
31869086 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.415191351 |
|
|
Sep 24 12:41:50 PM UTC 24 |
Sep 24 12:42:08 PM UTC 24 |
2257347950 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.3775429562 |
|
|
Sep 24 12:41:49 PM UTC 24 |
Sep 24 12:42:08 PM UTC 24 |
689281286 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.1293251905 |
|
|
Sep 24 12:41:47 PM UTC 24 |
Sep 24 12:42:08 PM UTC 24 |
537025364 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.4176172979 |
|
|
Sep 24 12:41:56 PM UTC 24 |
Sep 24 12:42:09 PM UTC 24 |
412190695 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.2025179073 |
|
|
Sep 24 12:42:03 PM UTC 24 |
Sep 24 12:42:09 PM UTC 24 |
61128854 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.3569884829 |
|
|
Sep 24 12:41:50 PM UTC 24 |
Sep 24 12:42:09 PM UTC 24 |
2096481978 ps |