| T381 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.3126381971 |
|
|
Oct 03 10:21:23 AM UTC 24 |
Oct 03 10:22:12 AM UTC 24 |
5204913048 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.3497223898 |
|
|
Oct 03 10:21:56 AM UTC 24 |
Oct 03 10:22:14 AM UTC 24 |
346272189 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.4248085123 |
|
|
Oct 03 10:22:03 AM UTC 24 |
Oct 03 10:22:15 AM UTC 24 |
74791316 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3581878213 |
|
|
Oct 03 10:21:41 AM UTC 24 |
Oct 03 10:22:15 AM UTC 24 |
11478717943 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_mux.4210327251 |
|
|
Oct 03 10:21:57 AM UTC 24 |
Oct 03 10:22:17 AM UTC 24 |
2362653392 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.684867064 |
|
|
Oct 03 10:22:06 AM UTC 24 |
Oct 03 10:22:17 AM UTC 24 |
243739579 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.4279585860 |
|
|
Oct 03 10:22:10 AM UTC 24 |
Oct 03 10:22:20 AM UTC 24 |
1332434652 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.3884826596 |
|
|
Oct 03 10:22:06 AM UTC 24 |
Oct 03 10:22:20 AM UTC 24 |
681246290 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.4233494024 |
|
|
Oct 03 10:21:51 AM UTC 24 |
Oct 03 10:22:20 AM UTC 24 |
2230899948 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.2993091813 |
|
|
Oct 03 10:22:07 AM UTC 24 |
Oct 03 10:22:21 AM UTC 24 |
428403578 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.3501910162 |
|
|
Oct 03 10:22:04 AM UTC 24 |
Oct 03 10:22:21 AM UTC 24 |
364797815 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.3040852953 |
|
|
Oct 03 10:22:18 AM UTC 24 |
Oct 03 10:22:21 AM UTC 24 |
19148382 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.785079418 |
|
|
Oct 03 10:21:47 AM UTC 24 |
Oct 03 10:22:21 AM UTC 24 |
196658902 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.4233456960 |
|
|
Oct 03 10:22:20 AM UTC 24 |
Oct 03 10:22:24 AM UTC 24 |
26399760 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.4169670163 |
|
|
Oct 03 10:22:07 AM UTC 24 |
Oct 03 10:22:24 AM UTC 24 |
1744942283 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.3977524035 |
|
|
Oct 03 10:21:34 AM UTC 24 |
Oct 03 10:22:24 AM UTC 24 |
2676526328 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.619624427 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:25 AM UTC 24 |
24540653 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.2483555178 |
|
|
Oct 03 10:21:19 AM UTC 24 |
Oct 03 10:22:26 AM UTC 24 |
1000210871 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.713765399 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:28 AM UTC 24 |
284747377 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.2549194921 |
|
|
Oct 03 10:22:16 AM UTC 24 |
Oct 03 10:22:29 AM UTC 24 |
829408388 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.3764127493 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:30 AM UTC 24 |
70118498 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.653983896 |
|
|
Oct 03 10:22:26 AM UTC 24 |
Oct 03 10:22:30 AM UTC 24 |
131140190 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_jtag_state_failure.1297584672 |
|
|
Oct 03 10:20:28 AM UTC 24 |
Oct 03 10:22:30 AM UTC 24 |
8551048249 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.3491967449 |
|
|
Oct 03 10:20:36 AM UTC 24 |
Oct 03 10:22:31 AM UTC 24 |
3831815471 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.1079721052 |
|
|
Oct 03 10:22:13 AM UTC 24 |
Oct 03 10:22:31 AM UTC 24 |
325932619 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.633131603 |
|
|
Oct 03 10:22:31 AM UTC 24 |
Oct 03 10:22:34 AM UTC 24 |
17954363 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3464405329 |
|
|
Oct 03 10:22:23 AM UTC 24 |
Oct 03 10:22:35 AM UTC 24 |
1176522746 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.3056021698 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:36 AM UTC 24 |
373395035 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1270486870 |
|
|
Oct 03 10:22:33 AM UTC 24 |
Oct 03 10:22:36 AM UTC 24 |
14239428 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.4275263601 |
|
|
Oct 03 10:22:03 AM UTC 24 |
Oct 03 10:22:36 AM UTC 24 |
818307799 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.504630533 |
|
|
Oct 03 10:22:33 AM UTC 24 |
Oct 03 10:22:38 AM UTC 24 |
726531088 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.106112104 |
|
|
Oct 03 10:22:25 AM UTC 24 |
Oct 03 10:22:38 AM UTC 24 |
1741552520 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.1148821317 |
|
|
Oct 03 10:22:36 AM UTC 24 |
Oct 03 10:22:40 AM UTC 24 |
20744667 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.2939624566 |
|
|
Oct 03 10:22:15 AM UTC 24 |
Oct 03 10:22:42 AM UTC 24 |
2665185118 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.3493922356 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:46 AM UTC 24 |
780859055 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1580695553 |
|
|
Oct 03 10:22:29 AM UTC 24 |
Oct 03 10:22:46 AM UTC 24 |
815785932 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.502683203 |
|
|
Oct 03 10:22:24 AM UTC 24 |
Oct 03 10:22:46 AM UTC 24 |
304884385 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.1884475046 |
|
|
Oct 03 10:22:27 AM UTC 24 |
Oct 03 10:22:46 AM UTC 24 |
407953938 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.235259430 |
|
|
Oct 03 10:22:36 AM UTC 24 |
Oct 03 10:22:48 AM UTC 24 |
61789949 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.12991280 |
|
|
Oct 03 10:22:30 AM UTC 24 |
Oct 03 10:22:48 AM UTC 24 |
280649826 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.119089386 |
|
|
Oct 03 10:20:55 AM UTC 24 |
Oct 03 10:22:49 AM UTC 24 |
23529391132 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.2962100319 |
|
|
Oct 03 10:21:54 AM UTC 24 |
Oct 03 10:22:50 AM UTC 24 |
15515177035 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.3174100098 |
|
|
Oct 03 10:21:51 AM UTC 24 |
Oct 03 10:22:50 AM UTC 24 |
3621834255 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.1430756458 |
|
|
Oct 03 10:22:39 AM UTC 24 |
Oct 03 10:22:52 AM UTC 24 |
1333216410 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.1137133161 |
|
|
Oct 03 10:22:50 AM UTC 24 |
Oct 03 10:22:52 AM UTC 24 |
119866431 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.463424747 |
|
|
Oct 03 10:22:22 AM UTC 24 |
Oct 03 10:22:53 AM UTC 24 |
678251369 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.538064931 |
|
|
Oct 03 10:22:52 AM UTC 24 |
Oct 03 10:22:54 AM UTC 24 |
13437653 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.2776251889 |
|
|
Oct 03 10:22:38 AM UTC 24 |
Oct 03 10:22:55 AM UTC 24 |
376609628 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.953390977 |
|
|
Oct 03 10:22:52 AM UTC 24 |
Oct 03 10:22:55 AM UTC 24 |
38896988 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.423397105 |
|
|
Oct 03 10:22:46 AM UTC 24 |
Oct 03 10:22:56 AM UTC 24 |
503288273 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.3690730201 |
|
|
Oct 03 10:22:43 AM UTC 24 |
Oct 03 10:22:56 AM UTC 24 |
616111736 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.1539436970 |
|
|
Oct 03 10:22:54 AM UTC 24 |
Oct 03 10:22:58 AM UTC 24 |
162337421 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3648962200 |
|
|
Oct 03 10:22:48 AM UTC 24 |
Oct 03 10:22:59 AM UTC 24 |
3528275862 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.1038997081 |
|
|
Oct 03 10:22:49 AM UTC 24 |
Oct 03 10:22:59 AM UTC 24 |
510171817 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.1029514002 |
|
|
Oct 03 10:22:36 AM UTC 24 |
Oct 03 10:23:00 AM UTC 24 |
525012557 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.396390520 |
|
|
Oct 03 10:22:56 AM UTC 24 |
Oct 03 10:23:01 AM UTC 24 |
468262395 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.1767206317 |
|
|
Oct 03 10:22:35 AM UTC 24 |
Oct 03 10:23:02 AM UTC 24 |
1344613792 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.1831081155 |
|
|
Oct 03 10:21:07 AM UTC 24 |
Oct 03 10:23:03 AM UTC 24 |
2977793913 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.2382866181 |
|
|
Oct 03 10:22:58 AM UTC 24 |
Oct 03 10:23:03 AM UTC 24 |
90014437 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.4265256340 |
|
|
Oct 03 10:22:53 AM UTC 24 |
Oct 03 10:23:03 AM UTC 24 |
207670733 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1235121766 |
|
|
Oct 03 10:23:00 AM UTC 24 |
Oct 03 10:23:03 AM UTC 24 |
257604403 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.3264305937 |
|
|
Oct 03 10:22:47 AM UTC 24 |
Oct 03 10:23:05 AM UTC 24 |
1548497063 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.2324808526 |
|
|
Oct 03 10:23:04 AM UTC 24 |
Oct 03 10:23:06 AM UTC 24 |
15184953 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.2818104942 |
|
|
Oct 03 10:23:04 AM UTC 24 |
Oct 03 10:23:06 AM UTC 24 |
17234149 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.3920132023 |
|
|
Oct 03 10:22:00 AM UTC 24 |
Oct 03 10:23:08 AM UTC 24 |
5599195462 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.2279563559 |
|
|
Oct 03 10:23:04 AM UTC 24 |
Oct 03 10:23:09 AM UTC 24 |
454620966 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.107524332 |
|
|
Oct 03 10:22:54 AM UTC 24 |
Oct 03 10:23:09 AM UTC 24 |
1062344164 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.3395380898 |
|
|
Oct 03 10:22:09 AM UTC 24 |
Oct 03 10:23:11 AM UTC 24 |
17337795039 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.294503525 |
|
|
Oct 03 10:22:55 AM UTC 24 |
Oct 03 10:23:11 AM UTC 24 |
382987096 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2329183602 |
|
|
Oct 03 10:23:07 AM UTC 24 |
Oct 03 10:23:13 AM UTC 24 |
57707961 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.3620446039 |
|
|
Oct 03 10:22:41 AM UTC 24 |
Oct 03 10:23:13 AM UTC 24 |
8399727791 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/1.lc_ctrl_stress_all.4166682465 |
|
|
Oct 03 10:18:06 AM UTC 24 |
Oct 03 10:23:14 AM UTC 24 |
7583218053 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.3865402936 |
|
|
Oct 03 10:23:07 AM UTC 24 |
Oct 03 10:23:15 AM UTC 24 |
452088083 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.4239954267 |
|
|
Oct 03 10:23:00 AM UTC 24 |
Oct 03 10:23:15 AM UTC 24 |
1008381686 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3392093543 |
|
|
Oct 03 10:22:57 AM UTC 24 |
Oct 03 10:23:16 AM UTC 24 |
540823601 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2412508167 |
|
|
Oct 03 10:21:43 AM UTC 24 |
Oct 03 10:23:16 AM UTC 24 |
2942202970 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.423438246 |
|
|
Oct 03 10:23:01 AM UTC 24 |
Oct 03 10:23:16 AM UTC 24 |
241559219 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.1142258406 |
|
|
Oct 03 10:23:12 AM UTC 24 |
Oct 03 10:23:19 AM UTC 24 |
1344392115 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.4139471082 |
|
|
Oct 03 10:23:10 AM UTC 24 |
Oct 03 10:23:20 AM UTC 24 |
1169313398 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.3664073747 |
|
|
Oct 03 10:23:18 AM UTC 24 |
Oct 03 10:23:20 AM UTC 24 |
15029138 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.2763887654 |
|
|
Oct 03 10:23:09 AM UTC 24 |
Oct 03 10:23:23 AM UTC 24 |
426267115 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.97554833 |
|
|
Oct 03 10:23:21 AM UTC 24 |
Oct 03 10:23:24 AM UTC 24 |
47224988 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.1546958160 |
|
|
Oct 03 10:22:53 AM UTC 24 |
Oct 03 10:23:26 AM UTC 24 |
617065686 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.404382635 |
|
|
Oct 03 10:23:02 AM UTC 24 |
Oct 03 10:23:26 AM UTC 24 |
1594727853 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1894220064 |
|
|
Oct 03 10:23:09 AM UTC 24 |
Oct 03 10:23:26 AM UTC 24 |
1166422301 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.898003998 |
|
|
Oct 03 10:23:24 AM UTC 24 |
Oct 03 10:23:28 AM UTC 24 |
48036936 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.744811171 |
|
|
Oct 03 10:23:20 AM UTC 24 |
Oct 03 10:23:29 AM UTC 24 |
254918334 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.2487965816 |
|
|
Oct 03 10:23:15 AM UTC 24 |
Oct 03 10:23:30 AM UTC 24 |
1024125309 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.938511375 |
|
|
Oct 03 10:23:27 AM UTC 24 |
Oct 03 10:23:31 AM UTC 24 |
55663860 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.2517080315 |
|
|
Oct 03 10:23:16 AM UTC 24 |
Oct 03 10:23:32 AM UTC 24 |
2790742984 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.3650922345 |
|
|
Oct 03 10:23:17 AM UTC 24 |
Oct 03 10:23:33 AM UTC 24 |
3085527002 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.43254457 |
|
|
Oct 03 10:22:06 AM UTC 24 |
Oct 03 10:23:34 AM UTC 24 |
8220472105 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.1932233641 |
|
|
Oct 03 10:22:24 AM UTC 24 |
Oct 03 10:23:34 AM UTC 24 |
11983392456 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.1377935181 |
|
|
Oct 03 10:22:18 AM UTC 24 |
Oct 03 10:23:35 AM UTC 24 |
2529748133 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.3375706301 |
|
|
Oct 03 10:23:15 AM UTC 24 |
Oct 03 10:23:35 AM UTC 24 |
1799298208 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.441943007 |
|
|
Oct 03 10:22:46 AM UTC 24 |
Oct 03 10:23:35 AM UTC 24 |
9100367753 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.1846232279 |
|
|
Oct 03 10:24:01 AM UTC 24 |
Oct 03 10:24:13 AM UTC 24 |
460591875 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.3903500823 |
|
|
Oct 03 10:23:21 AM UTC 24 |
Oct 03 10:23:37 AM UTC 24 |
129633950 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.157305869 |
|
|
Oct 03 10:22:30 AM UTC 24 |
Oct 03 10:23:39 AM UTC 24 |
3273977114 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.1278276904 |
|
|
Oct 03 10:23:37 AM UTC 24 |
Oct 03 10:23:40 AM UTC 24 |
23257527 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.775444141 |
|
|
Oct 03 10:23:37 AM UTC 24 |
Oct 03 10:23:40 AM UTC 24 |
19062414 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.1619961175 |
|
|
Oct 03 10:23:29 AM UTC 24 |
Oct 03 10:23:40 AM UTC 24 |
1634901291 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2964422083 |
|
|
Oct 03 10:23:38 AM UTC 24 |
Oct 03 10:23:41 AM UTC 24 |
46044935 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.2969473387 |
|
|
Oct 03 10:23:27 AM UTC 24 |
Oct 03 10:23:42 AM UTC 24 |
1837038888 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.4173434945 |
|
|
Oct 03 10:23:34 AM UTC 24 |
Oct 03 10:23:42 AM UTC 24 |
584043178 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.506111198 |
|
|
Oct 03 10:23:32 AM UTC 24 |
Oct 03 10:23:42 AM UTC 24 |
448469315 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.4022544164 |
|
|
Oct 03 10:23:25 AM UTC 24 |
Oct 03 10:23:43 AM UTC 24 |
1557002431 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.4020485184 |
|
|
Oct 03 10:23:30 AM UTC 24 |
Oct 03 10:23:44 AM UTC 24 |
5600882196 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1834576186 |
|
|
Oct 03 10:23:41 AM UTC 24 |
Oct 03 10:23:45 AM UTC 24 |
165792420 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.2485168522 |
|
|
Oct 03 10:23:33 AM UTC 24 |
Oct 03 10:23:45 AM UTC 24 |
1168009163 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.2072269151 |
|
|
Oct 03 10:21:45 AM UTC 24 |
Oct 03 10:23:46 AM UTC 24 |
6291679993 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.4147895690 |
|
|
Oct 03 10:23:21 AM UTC 24 |
Oct 03 10:23:47 AM UTC 24 |
417767289 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.2357590964 |
|
|
Oct 03 10:23:06 AM UTC 24 |
Oct 03 10:23:47 AM UTC 24 |
770221199 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.468532402 |
|
|
Oct 03 10:22:56 AM UTC 24 |
Oct 03 10:23:48 AM UTC 24 |
1239776508 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.478370418 |
|
|
Oct 03 10:23:39 AM UTC 24 |
Oct 03 10:23:50 AM UTC 24 |
276466422 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.2395374804 |
|
|
Oct 03 10:23:42 AM UTC 24 |
Oct 03 10:23:50 AM UTC 24 |
808609279 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.1671889322 |
|
|
Oct 03 10:23:35 AM UTC 24 |
Oct 03 10:23:50 AM UTC 24 |
1323258738 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.2161176624 |
|
|
Oct 03 10:23:13 AM UTC 24 |
Oct 03 10:23:50 AM UTC 24 |
2127098555 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.65314705 |
|
|
Oct 03 10:23:43 AM UTC 24 |
Oct 03 10:23:51 AM UTC 24 |
333414818 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.1444914351 |
|
|
Oct 03 10:23:41 AM UTC 24 |
Oct 03 10:23:52 AM UTC 24 |
1335759811 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.227745615 |
|
|
Oct 03 10:23:50 AM UTC 24 |
Oct 03 10:23:52 AM UTC 24 |
107404700 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.2266664640 |
|
|
Oct 03 10:23:51 AM UTC 24 |
Oct 03 10:23:53 AM UTC 24 |
39386777 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.706413237 |
|
|
Oct 03 10:23:51 AM UTC 24 |
Oct 03 10:23:54 AM UTC 24 |
333536913 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.2402873477 |
|
|
Oct 03 10:23:10 AM UTC 24 |
Oct 03 10:23:55 AM UTC 24 |
1458629696 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1517111914 |
|
|
Oct 03 10:23:12 AM UTC 24 |
Oct 03 10:23:56 AM UTC 24 |
1230317351 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.2313740185 |
|
|
Oct 03 10:23:41 AM UTC 24 |
Oct 03 10:23:56 AM UTC 24 |
5224042020 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.1070960316 |
|
|
Oct 03 10:23:02 AM UTC 24 |
Oct 03 10:23:56 AM UTC 24 |
2705954048 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.2368260358 |
|
|
Oct 03 10:23:52 AM UTC 24 |
Oct 03 10:23:58 AM UTC 24 |
100637467 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.2466827018 |
|
|
Oct 03 10:23:45 AM UTC 24 |
Oct 03 10:23:59 AM UTC 24 |
3382831310 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.3903803165 |
|
|
Oct 03 10:23:47 AM UTC 24 |
Oct 03 10:24:00 AM UTC 24 |
1616146531 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.835489322 |
|
|
Oct 03 10:23:47 AM UTC 24 |
Oct 03 10:24:00 AM UTC 24 |
402670031 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.2376029983 |
|
|
Oct 03 10:23:57 AM UTC 24 |
Oct 03 10:24:02 AM UTC 24 |
56273881 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.3189195446 |
|
|
Oct 03 10:23:48 AM UTC 24 |
Oct 03 10:24:03 AM UTC 24 |
748634596 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.472690489 |
|
|
Oct 03 10:23:47 AM UTC 24 |
Oct 03 10:24:04 AM UTC 24 |
387343656 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.322662223 |
|
|
Oct 03 10:22:39 AM UTC 24 |
Oct 03 10:24:04 AM UTC 24 |
10773473935 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.1512818391 |
|
|
Oct 03 10:23:30 AM UTC 24 |
Oct 03 10:24:05 AM UTC 24 |
6919497552 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.2341949145 |
|
|
Oct 03 10:23:54 AM UTC 24 |
Oct 03 10:24:06 AM UTC 24 |
1542847880 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.2125918367 |
|
|
Oct 03 10:23:52 AM UTC 24 |
Oct 03 10:24:06 AM UTC 24 |
303794081 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.4207466884 |
|
|
Oct 03 10:22:50 AM UTC 24 |
Oct 03 10:24:06 AM UTC 24 |
5838832757 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.3050223761 |
|
|
Oct 03 10:24:04 AM UTC 24 |
Oct 03 10:24:07 AM UTC 24 |
63764355 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.2985363776 |
|
|
Oct 03 10:24:04 AM UTC 24 |
Oct 03 10:24:07 AM UTC 24 |
32010832 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.274995015 |
|
|
Oct 03 10:24:06 AM UTC 24 |
Oct 03 10:24:08 AM UTC 24 |
62094881 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.1495282580 |
|
|
Oct 03 10:23:51 AM UTC 24 |
Oct 03 10:24:13 AM UTC 24 |
648351818 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.2542290805 |
|
|
Oct 03 10:23:53 AM UTC 24 |
Oct 03 10:24:08 AM UTC 24 |
3148268922 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.3366898701 |
|
|
Oct 03 10:23:53 AM UTC 24 |
Oct 03 10:24:09 AM UTC 24 |
2268877649 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.2346811839 |
|
|
Oct 03 10:23:56 AM UTC 24 |
Oct 03 10:24:12 AM UTC 24 |
2661664859 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.3380552073 |
|
|
Oct 03 10:24:07 AM UTC 24 |
Oct 03 10:24:13 AM UTC 24 |
89584601 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.4268037977 |
|
|
Oct 03 10:24:08 AM UTC 24 |
Oct 03 10:24:15 AM UTC 24 |
266358228 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2740888706 |
|
|
Oct 03 10:24:13 AM UTC 24 |
Oct 03 10:24:15 AM UTC 24 |
62890388 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.2489859811 |
|
|
Oct 03 10:24:00 AM UTC 24 |
Oct 03 10:24:16 AM UTC 24 |
2085057773 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.267080665 |
|
|
Oct 03 10:24:07 AM UTC 24 |
Oct 03 10:24:16 AM UTC 24 |
412645232 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.597549671 |
|
|
Oct 03 10:24:08 AM UTC 24 |
Oct 03 10:24:17 AM UTC 24 |
926354372 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1655412306 |
|
|
Oct 03 10:24:14 AM UTC 24 |
Oct 03 10:24:17 AM UTC 24 |
70368729 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.2730126851 |
|
|
Oct 03 10:23:00 AM UTC 24 |
Oct 03 10:24:17 AM UTC 24 |
6183808900 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.4036936283 |
|
|
Oct 03 10:23:58 AM UTC 24 |
Oct 03 10:24:19 AM UTC 24 |
2159691790 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.2123829246 |
|
|
Oct 03 10:23:35 AM UTC 24 |
Oct 03 10:24:19 AM UTC 24 |
7154804719 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2235510423 |
|
|
Oct 03 10:23:38 AM UTC 24 |
Oct 03 10:24:20 AM UTC 24 |
2199010518 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.2186946775 |
|
|
Oct 03 10:24:14 AM UTC 24 |
Oct 03 10:24:21 AM UTC 24 |
559051539 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.3650084552 |
|
|
Oct 03 10:23:43 AM UTC 24 |
Oct 03 10:24:22 AM UTC 24 |
6165758099 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.443699901 |
|
|
Oct 03 10:24:17 AM UTC 24 |
Oct 03 10:24:23 AM UTC 24 |
68429302 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.62538707 |
|
|
Oct 03 10:23:57 AM UTC 24 |
Oct 03 10:24:23 AM UTC 24 |
866564364 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.199667110 |
|
|
Oct 03 10:24:22 AM UTC 24 |
Oct 03 10:24:24 AM UTC 24 |
21075050 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.861735994 |
|
|
Oct 03 10:24:18 AM UTC 24 |
Oct 03 10:24:25 AM UTC 24 |
980413745 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.1313486006 |
|
|
Oct 03 10:24:23 AM UTC 24 |
Oct 03 10:24:25 AM UTC 24 |
43921621 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.4105158872 |
|
|
Oct 03 10:24:08 AM UTC 24 |
Oct 03 10:24:26 AM UTC 24 |
326730582 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1336543642 |
|
|
Oct 03 10:24:23 AM UTC 24 |
Oct 03 10:24:26 AM UTC 24 |
81792188 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.3781297987 |
|
|
Oct 03 10:24:18 AM UTC 24 |
Oct 03 10:24:26 AM UTC 24 |
1151302056 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.314872442 |
|
|
Oct 03 10:24:17 AM UTC 24 |
Oct 03 10:24:27 AM UTC 24 |
61686890 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.1661241170 |
|
|
Oct 03 10:24:10 AM UTC 24 |
Oct 03 10:24:27 AM UTC 24 |
717250140 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.87037746 |
|
|
Oct 03 10:24:10 AM UTC 24 |
Oct 03 10:24:27 AM UTC 24 |
2218639058 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.1599359585 |
|
|
Oct 03 10:24:07 AM UTC 24 |
Oct 03 10:24:28 AM UTC 24 |
574957759 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.3351016269 |
|
|
Oct 03 10:24:25 AM UTC 24 |
Oct 03 10:24:29 AM UTC 24 |
160559755 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.2349996636 |
|
|
Oct 03 10:24:18 AM UTC 24 |
Oct 03 10:24:31 AM UTC 24 |
179956582 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2797774160 |
|
|
Oct 03 10:22:26 AM UTC 24 |
Oct 03 10:24:32 AM UTC 24 |
83266847038 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.1651339608 |
|
|
Oct 03 10:24:06 AM UTC 24 |
Oct 03 10:24:32 AM UTC 24 |
703903709 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3327759174 |
|
|
Oct 03 10:23:44 AM UTC 24 |
Oct 03 10:24:32 AM UTC 24 |
3757500471 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.1934203328 |
|
|
Oct 03 10:24:18 AM UTC 24 |
Oct 03 10:24:33 AM UTC 24 |
651651515 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1278951965 |
|
|
Oct 03 10:24:26 AM UTC 24 |
Oct 03 10:24:33 AM UTC 24 |
1272902805 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3733565988 |
|
|
Oct 03 10:24:31 AM UTC 24 |
Oct 03 10:24:33 AM UTC 24 |
81725495 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.127558186 |
|
|
Oct 03 10:24:32 AM UTC 24 |
Oct 03 10:24:34 AM UTC 24 |
11687323 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.4242897644 |
|
|
Oct 03 10:24:27 AM UTC 24 |
Oct 03 10:24:36 AM UTC 24 |
1816567181 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.3448190758 |
|
|
Oct 03 10:24:21 AM UTC 24 |
Oct 03 10:24:37 AM UTC 24 |
1700106604 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.609652727 |
|
|
Oct 03 10:24:17 AM UTC 24 |
Oct 03 10:24:38 AM UTC 24 |
1732054321 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.1482325965 |
|
|
Oct 03 10:24:32 AM UTC 24 |
Oct 03 10:24:38 AM UTC 24 |
110097392 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.2297351388 |
|
|
Oct 03 10:23:57 AM UTC 24 |
Oct 03 10:24:39 AM UTC 24 |
4480532693 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.1779918948 |
|
|
Oct 03 10:24:33 AM UTC 24 |
Oct 03 10:24:39 AM UTC 24 |
84831753 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.1972956886 |
|
|
Oct 03 10:24:27 AM UTC 24 |
Oct 03 10:24:40 AM UTC 24 |
245345668 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.547185949 |
|
|
Oct 03 10:24:39 AM UTC 24 |
Oct 03 10:24:42 AM UTC 24 |
47147306 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.2346021781 |
|
|
Oct 03 10:24:15 AM UTC 24 |
Oct 03 10:24:42 AM UTC 24 |
478197964 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.2975586725 |
|
|
Oct 03 10:24:19 AM UTC 24 |
Oct 03 10:24:43 AM UTC 24 |
519754349 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.191791953 |
|
|
Oct 03 10:24:41 AM UTC 24 |
Oct 03 10:24:43 AM UTC 24 |
38215750 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.1129629647 |
|
|
Oct 03 10:24:27 AM UTC 24 |
Oct 03 10:24:44 AM UTC 24 |
650939918 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.587137705 |
|
|
Oct 03 10:24:28 AM UTC 24 |
Oct 03 10:24:44 AM UTC 24 |
786336331 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.2511970163 |
|
|
Oct 03 10:24:28 AM UTC 24 |
Oct 03 10:24:44 AM UTC 24 |
1473963161 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.1243378506 |
|
|
Oct 03 10:24:28 AM UTC 24 |
Oct 03 10:24:44 AM UTC 24 |
315670190 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.1390966063 |
|
|
Oct 03 10:24:35 AM UTC 24 |
Oct 03 10:24:46 AM UTC 24 |
213839619 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.2515867037 |
|
|
Oct 03 10:24:37 AM UTC 24 |
Oct 03 10:24:46 AM UTC 24 |
355269285 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.2825993150 |
|
|
Oct 03 10:24:35 AM UTC 24 |
Oct 03 10:24:46 AM UTC 24 |
5887219842 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.4055108743 |
|
|
Oct 03 10:24:33 AM UTC 24 |
Oct 03 10:24:46 AM UTC 24 |
292142786 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3022751416 |
|
|
Oct 03 10:24:40 AM UTC 24 |
Oct 03 10:24:47 AM UTC 24 |
236266788 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.861369734 |
|
|
Oct 03 10:24:43 AM UTC 24 |
Oct 03 10:25:05 AM UTC 24 |
324439788 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.1739495747 |
|
|
Oct 03 10:24:24 AM UTC 24 |
Oct 03 10:24:47 AM UTC 24 |
763698195 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.279572065 |
|
|
Oct 03 10:24:35 AM UTC 24 |
Oct 03 10:24:47 AM UTC 24 |
1450892106 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.2986610121 |
|
|
Oct 03 10:24:44 AM UTC 24 |
Oct 03 10:24:48 AM UTC 24 |
82677720 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.1872263592 |
|
|
Oct 03 10:21:58 AM UTC 24 |
Oct 03 10:24:49 AM UTC 24 |
182135619562 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.2668442881 |
|
|
Oct 03 10:24:47 AM UTC 24 |
Oct 03 10:24:50 AM UTC 24 |
70477941 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.2163266542 |
|
|
Oct 03 10:24:49 AM UTC 24 |
Oct 03 10:24:51 AM UTC 24 |
27103373 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.452516824 |
|
|
Oct 03 10:24:43 AM UTC 24 |
Oct 03 10:24:51 AM UTC 24 |
300439994 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all_with_rand_reset.1343392554 |
|
|
Oct 03 10:23:04 AM UTC 24 |
Oct 03 10:24:51 AM UTC 24 |
2579206246 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.1793348132 |
|
|
Oct 03 10:24:46 AM UTC 24 |
Oct 03 10:24:52 AM UTC 24 |
386580488 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.1164085836 |
|
|
Oct 03 10:24:49 AM UTC 24 |
Oct 03 10:24:53 AM UTC 24 |
105577325 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.124601468 |
|
|
Oct 03 10:24:36 AM UTC 24 |
Oct 03 10:24:53 AM UTC 24 |
342497305 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.1187874763 |
|
|
Oct 03 10:24:50 AM UTC 24 |
Oct 03 10:24:54 AM UTC 24 |
96807801 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.2125154747 |
|
|
Oct 03 10:24:49 AM UTC 24 |
Oct 03 10:24:54 AM UTC 24 |
75715704 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.2770779662 |
|
|
Oct 03 10:24:46 AM UTC 24 |
Oct 03 10:24:55 AM UTC 24 |
246009962 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.3431506731 |
|
|
Oct 03 10:24:38 AM UTC 24 |
Oct 03 10:24:57 AM UTC 24 |
826466584 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.1218066123 |
|
|
Oct 03 10:24:55 AM UTC 24 |
Oct 03 10:24:58 AM UTC 24 |
78467670 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.1133893661 |
|
|
Oct 03 10:24:47 AM UTC 24 |
Oct 03 10:24:58 AM UTC 24 |
646354722 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.1982263298 |
|
|
Oct 03 10:23:56 AM UTC 24 |
Oct 03 10:24:58 AM UTC 24 |
13877427640 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.3489585024 |
|
|
Oct 03 10:23:43 AM UTC 24 |
Oct 03 10:24:59 AM UTC 24 |
6886942410 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3584706386 |
|
|
Oct 03 10:24:58 AM UTC 24 |
Oct 03 10:25:00 AM UTC 24 |
30298259 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.139727786 |
|
|
Oct 03 10:24:55 AM UTC 24 |
Oct 03 10:25:01 AM UTC 24 |
111478101 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.3419852367 |
|
|
Oct 03 10:24:33 AM UTC 24 |
Oct 03 10:25:03 AM UTC 24 |
729457114 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.4288586167 |
|
|
Oct 03 10:24:53 AM UTC 24 |
Oct 03 10:25:03 AM UTC 24 |
260684365 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.1108332021 |
|
|
Oct 03 10:24:46 AM UTC 24 |
Oct 03 10:25:03 AM UTC 24 |
391256191 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.2452661958 |
|
|
Oct 03 10:24:59 AM UTC 24 |
Oct 03 10:25:04 AM UTC 24 |
43529578 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2874464620 |
|
|
Oct 03 10:24:46 AM UTC 24 |
Oct 03 10:25:06 AM UTC 24 |
678395646 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.3615838209 |
|
|
Oct 03 10:24:53 AM UTC 24 |
Oct 03 10:25:06 AM UTC 24 |
541910229 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.2740096987 |
|
|
Oct 03 10:24:50 AM UTC 24 |
Oct 03 10:25:06 AM UTC 24 |
1770634591 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.1266156365 |
|
|
Oct 03 10:24:44 AM UTC 24 |
Oct 03 10:25:06 AM UTC 24 |
2610899353 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.1907973341 |
|
|
Oct 03 10:25:01 AM UTC 24 |
Oct 03 10:25:07 AM UTC 24 |
1250058191 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.838181034 |
|
|
Oct 03 10:23:27 AM UTC 24 |
Oct 03 10:25:07 AM UTC 24 |
12548697296 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.450001723 |
|
|
Oct 03 10:24:54 AM UTC 24 |
Oct 03 10:25:08 AM UTC 24 |
553096579 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.1113000247 |
|
|
Oct 03 10:25:07 AM UTC 24 |
Oct 03 10:25:09 AM UTC 24 |
20882386 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.3676641534 |
|
|
Oct 03 10:25:07 AM UTC 24 |
Oct 03 10:25:10 AM UTC 24 |
11776752 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.3592033469 |
|
|
Oct 03 10:24:53 AM UTC 24 |
Oct 03 10:25:10 AM UTC 24 |
697261958 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.2301990242 |
|
|
Oct 03 10:25:07 AM UTC 24 |
Oct 03 10:25:10 AM UTC 24 |
30569981 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.791576739 |
|
|
Oct 03 10:24:51 AM UTC 24 |
Oct 03 10:25:10 AM UTC 24 |
1760415761 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.2862299740 |
|
|
Oct 03 10:24:59 AM UTC 24 |
Oct 03 10:25:11 AM UTC 24 |
126457547 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.2619403310 |
|
|
Oct 03 10:24:49 AM UTC 24 |
Oct 03 10:25:12 AM UTC 24 |
210805585 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.2619263282 |
|
|
Oct 03 10:24:59 AM UTC 24 |
Oct 03 10:25:13 AM UTC 24 |
287777688 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.2256889820 |
|
|
Oct 03 10:25:09 AM UTC 24 |
Oct 03 10:25:13 AM UTC 24 |
366906313 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.3335310116 |
|
|
Oct 03 10:22:17 AM UTC 24 |
Oct 03 10:25:14 AM UTC 24 |
19534748387 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.3412795601 |
|
|
Oct 03 10:25:10 AM UTC 24 |
Oct 03 10:25:14 AM UTC 24 |
130237738 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.1630651029 |
|
|
Oct 03 10:25:01 AM UTC 24 |
Oct 03 10:25:15 AM UTC 24 |
1734405778 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.4014750003 |
|
|
Oct 03 10:25:13 AM UTC 24 |
Oct 03 10:25:16 AM UTC 24 |
13429552 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.320893258 |
|
|
Oct 03 10:25:04 AM UTC 24 |
Oct 03 10:25:16 AM UTC 24 |
1005952759 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.588104108 |
|
|
Oct 03 10:25:02 AM UTC 24 |
Oct 03 10:25:18 AM UTC 24 |
465533501 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.1947246702 |
|
|
Oct 03 10:25:15 AM UTC 24 |
Oct 03 10:25:18 AM UTC 24 |
19004037 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_02/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.4218704802 |
|
|
Oct 03 10:25:04 AM UTC 24 |
Oct 03 10:25:18 AM UTC 24 |
622084904 ps |