| T363 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.3364770922 |
|
|
Oct 12 02:10:45 PM UTC 24 |
Oct 12 02:10:50 PM UTC 24 |
293029787 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3042194581 |
|
|
Oct 12 02:10:47 PM UTC 24 |
Oct 12 02:10:50 PM UTC 24 |
27892660 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.360415924 |
|
|
Oct 12 02:10:37 PM UTC 24 |
Oct 12 02:10:50 PM UTC 24 |
588182179 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.771510359 |
|
|
Oct 12 02:10:16 PM UTC 24 |
Oct 12 02:10:51 PM UTC 24 |
925017571 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.2243869362 |
|
|
Oct 12 02:10:02 PM UTC 24 |
Oct 12 02:10:51 PM UTC 24 |
1178083340 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_post_trans.604748153 |
|
|
Oct 12 02:10:22 PM UTC 24 |
Oct 12 02:10:52 PM UTC 24 |
581473100 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.1334936711 |
|
|
Oct 12 02:10:30 PM UTC 24 |
Oct 12 02:10:53 PM UTC 24 |
1152221946 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.1759594957 |
|
|
Oct 12 02:10:07 PM UTC 24 |
Oct 12 02:10:53 PM UTC 24 |
10214327633 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.2496053158 |
|
|
Oct 12 02:11:19 PM UTC 24 |
Oct 12 02:11:21 PM UTC 24 |
286751816 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_prog_failure.4079501966 |
|
|
Oct 12 02:10:30 PM UTC 24 |
Oct 12 02:10:53 PM UTC 24 |
3832132117 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.1129214145 |
|
|
Oct 12 02:10:37 PM UTC 24 |
Oct 12 02:10:53 PM UTC 24 |
623350219 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.2368543050 |
|
|
Oct 12 02:10:25 PM UTC 24 |
Oct 12 02:10:53 PM UTC 24 |
200277714 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.1652700277 |
|
|
Oct 12 02:10:42 PM UTC 24 |
Oct 12 02:10:54 PM UTC 24 |
330537750 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.3134611700 |
|
|
Oct 12 02:10:52 PM UTC 24 |
Oct 12 02:10:54 PM UTC 24 |
37305364 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.3316972671 |
|
|
Oct 12 02:11:14 PM UTC 24 |
Oct 12 02:11:19 PM UTC 24 |
205412435 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1720645793 |
|
|
Oct 12 02:10:53 PM UTC 24 |
Oct 12 02:10:55 PM UTC 24 |
15594611 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.1654886438 |
|
|
Oct 12 02:10:46 PM UTC 24 |
Oct 12 02:10:56 PM UTC 24 |
280433432 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.198234957 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:10:57 PM UTC 24 |
1590068686 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.594641182 |
|
|
Oct 12 02:10:42 PM UTC 24 |
Oct 12 02:10:57 PM UTC 24 |
894283240 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.2155406530 |
|
|
Oct 12 02:10:55 PM UTC 24 |
Oct 12 02:10:58 PM UTC 24 |
19696861 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.3046412351 |
|
|
Oct 12 02:10:52 PM UTC 24 |
Oct 12 02:10:59 PM UTC 24 |
1512927240 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.2911817728 |
|
|
Oct 12 02:10:51 PM UTC 24 |
Oct 12 02:10:59 PM UTC 24 |
345772956 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.3012037553 |
|
|
Oct 12 02:10:40 PM UTC 24 |
Oct 12 02:10:59 PM UTC 24 |
331836605 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.436826612 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:11:00 PM UTC 24 |
935757987 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.2202837699 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:11:00 PM UTC 24 |
210428593 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.3784205277 |
|
|
Oct 12 02:10:55 PM UTC 24 |
Oct 12 02:11:00 PM UTC 24 |
91060714 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.661056073 |
|
|
Oct 12 02:11:00 PM UTC 24 |
Oct 12 02:11:02 PM UTC 24 |
16777877 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2773653562 |
|
|
Oct 12 02:10:51 PM UTC 24 |
Oct 12 02:11:02 PM UTC 24 |
515943059 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_jtag_state_failure.87794619 |
|
|
Oct 12 02:09:15 PM UTC 24 |
Oct 12 02:11:03 PM UTC 24 |
15107748747 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.899541082 |
|
|
Oct 12 02:10:54 PM UTC 24 |
Oct 12 02:11:03 PM UTC 24 |
66552846 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.734535252 |
|
|
Oct 12 02:11:01 PM UTC 24 |
Oct 12 02:11:03 PM UTC 24 |
13794767 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2455763181 |
|
|
Oct 12 02:10:46 PM UTC 24 |
Oct 12 02:11:04 PM UTC 24 |
979504974 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.527286245 |
|
|
Oct 12 02:10:32 PM UTC 24 |
Oct 12 02:11:04 PM UTC 24 |
2141618524 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3497977378 |
|
|
Oct 12 02:10:55 PM UTC 24 |
Oct 12 02:11:04 PM UTC 24 |
1282653276 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.3978594966 |
|
|
Oct 12 02:10:34 PM UTC 24 |
Oct 12 02:11:04 PM UTC 24 |
1307504136 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1483507355 |
|
|
Oct 12 02:10:51 PM UTC 24 |
Oct 12 02:11:05 PM UTC 24 |
3213273295 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.727369910 |
|
|
Oct 12 02:11:01 PM UTC 24 |
Oct 12 02:11:06 PM UTC 24 |
345520186 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.55682724 |
|
|
Oct 12 02:10:51 PM UTC 24 |
Oct 12 02:11:07 PM UTC 24 |
531236197 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2015038815 |
|
|
Oct 12 02:10:24 PM UTC 24 |
Oct 12 02:11:07 PM UTC 24 |
12097715081 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3616349168 |
|
|
Oct 12 02:10:22 PM UTC 24 |
Oct 12 02:11:07 PM UTC 24 |
9978253293 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.797235678 |
|
|
Oct 12 02:11:03 PM UTC 24 |
Oct 12 02:11:07 PM UTC 24 |
29677589 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.991290909 |
|
|
Oct 12 02:10:56 PM UTC 24 |
Oct 12 02:11:08 PM UTC 24 |
1425417652 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.4221829983 |
|
|
Oct 12 02:10:55 PM UTC 24 |
Oct 12 02:11:09 PM UTC 24 |
824760994 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.868280809 |
|
|
Oct 12 02:10:56 PM UTC 24 |
Oct 12 02:11:10 PM UTC 24 |
3280560370 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.4016501019 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:11:11 PM UTC 24 |
3360482157 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.21812955 |
|
|
Oct 12 02:11:09 PM UTC 24 |
Oct 12 02:11:11 PM UTC 24 |
95453578 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all.2187296127 |
|
|
Oct 12 02:08:54 PM UTC 24 |
Oct 12 02:11:12 PM UTC 24 |
8667881046 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.3696841097 |
|
|
Oct 12 02:10:38 PM UTC 24 |
Oct 12 02:11:12 PM UTC 24 |
3929481000 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.1026574916 |
|
|
Oct 12 02:10:58 PM UTC 24 |
Oct 12 02:11:12 PM UTC 24 |
314348986 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.504298072 |
|
|
Oct 12 02:11:03 PM UTC 24 |
Oct 12 02:11:13 PM UTC 24 |
287162138 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/1.lc_ctrl_stress_all.1022067210 |
|
|
Oct 12 02:09:00 PM UTC 24 |
Oct 12 02:11:13 PM UTC 24 |
7314131625 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.1958069149 |
|
|
Oct 12 02:11:11 PM UTC 24 |
Oct 12 02:11:13 PM UTC 24 |
30208062 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.1534806848 |
|
|
Oct 12 02:10:57 PM UTC 24 |
Oct 12 02:11:14 PM UTC 24 |
340652983 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.2567084704 |
|
|
Oct 12 02:10:58 PM UTC 24 |
Oct 12 02:11:14 PM UTC 24 |
367216236 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.349682444 |
|
|
Oct 12 02:11:10 PM UTC 24 |
Oct 12 02:11:14 PM UTC 24 |
162012755 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.1538260232 |
|
|
Oct 12 02:11:06 PM UTC 24 |
Oct 12 02:11:16 PM UTC 24 |
1425744934 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.3200610116 |
|
|
Oct 12 02:11:05 PM UTC 24 |
Oct 12 02:11:16 PM UTC 24 |
1259909519 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.1418376646 |
|
|
Oct 12 02:10:10 PM UTC 24 |
Oct 12 02:11:17 PM UTC 24 |
1941153191 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.1167501277 |
|
|
Oct 12 02:11:07 PM UTC 24 |
Oct 12 02:11:20 PM UTC 24 |
2080091936 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_jtag_errors.3893286162 |
|
|
Oct 12 02:09:44 PM UTC 24 |
Oct 12 02:11:17 PM UTC 24 |
26914299988 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.2358735925 |
|
|
Oct 12 02:10:57 PM UTC 24 |
Oct 12 02:11:18 PM UTC 24 |
1253622798 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.2467180004 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:11:18 PM UTC 24 |
633077670 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2613524211 |
|
|
Oct 12 02:11:13 PM UTC 24 |
Oct 12 02:11:18 PM UTC 24 |
316387354 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.1184196409 |
|
|
Oct 12 02:11:05 PM UTC 24 |
Oct 12 02:11:19 PM UTC 24 |
379602942 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.2553622132 |
|
|
Oct 12 02:11:13 PM UTC 24 |
Oct 12 02:11:19 PM UTC 24 |
64690953 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.2889449047 |
|
|
Oct 12 02:10:07 PM UTC 24 |
Oct 12 02:11:19 PM UTC 24 |
3264285339 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.1548939241 |
|
|
Oct 12 02:10:39 PM UTC 24 |
Oct 12 02:11:21 PM UTC 24 |
4291500629 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3720451451 |
|
|
Oct 12 02:11:05 PM UTC 24 |
Oct 12 02:11:20 PM UTC 24 |
1173257188 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.2352777958 |
|
|
Oct 12 02:11:19 PM UTC 24 |
Oct 12 02:11:21 PM UTC 24 |
37072592 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.2513461411 |
|
|
Oct 12 02:11:09 PM UTC 24 |
Oct 12 02:11:22 PM UTC 24 |
229810877 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.1144970835 |
|
|
Oct 12 02:10:03 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
6321743278 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.2304503264 |
|
|
Oct 12 02:11:19 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
499745622 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.860521766 |
|
|
Oct 12 02:11:06 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
995143848 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.1933704153 |
|
|
Oct 12 02:11:05 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
403099599 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.2044958075 |
|
|
Oct 12 02:11:09 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
483945419 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.3065495887 |
|
|
Oct 12 02:11:06 PM UTC 24 |
Oct 12 02:11:23 PM UTC 24 |
417305850 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.3905276003 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:11:24 PM UTC 24 |
91476170 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.352068539 |
|
|
Oct 12 02:11:16 PM UTC 24 |
Oct 12 02:11:24 PM UTC 24 |
218923973 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1698508243 |
|
|
Oct 12 02:11:13 PM UTC 24 |
Oct 12 02:11:25 PM UTC 24 |
439215748 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.378950454 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:11:25 PM UTC 24 |
46378965 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.2622375711 |
|
|
Oct 12 02:11:17 PM UTC 24 |
Oct 12 02:11:26 PM UTC 24 |
231059395 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.2096170602 |
|
|
Oct 12 02:11:22 PM UTC 24 |
Oct 12 02:11:26 PM UTC 24 |
70046936 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.3392594796 |
|
|
Oct 12 02:11:17 PM UTC 24 |
Oct 12 02:11:26 PM UTC 24 |
218689067 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2887685734 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:11:27 PM UTC 24 |
37288773 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.2137116372 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:11:27 PM UTC 24 |
79546715 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.1923664466 |
|
|
Oct 12 02:11:16 PM UTC 24 |
Oct 12 02:11:28 PM UTC 24 |
5615416153 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2376963981 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:11:29 PM UTC 24 |
73496365 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.4118102340 |
|
|
Oct 12 02:11:01 PM UTC 24 |
Oct 12 02:11:30 PM UTC 24 |
1114580903 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.2031752683 |
|
|
Oct 12 02:11:23 PM UTC 24 |
Oct 12 02:11:30 PM UTC 24 |
2294788897 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.938730925 |
|
|
Oct 12 02:11:13 PM UTC 24 |
Oct 12 02:11:30 PM UTC 24 |
1323314051 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.3151689097 |
|
|
Oct 12 02:09:56 PM UTC 24 |
Oct 12 02:11:30 PM UTC 24 |
5008612697 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.335376384 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:11:31 PM UTC 24 |
597899444 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.910247350 |
|
|
Oct 12 02:10:53 PM UTC 24 |
Oct 12 02:11:31 PM UTC 24 |
267844600 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.2592371536 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:11:31 PM UTC 24 |
1410460862 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1927791968 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:11:32 PM UTC 24 |
213216719 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.3978610360 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:11:32 PM UTC 24 |
105593334 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.3598058550 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:11:32 PM UTC 24 |
1336212291 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.1621879673 |
|
|
Oct 12 02:11:18 PM UTC 24 |
Oct 12 02:11:33 PM UTC 24 |
1479766071 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.3270555638 |
|
|
Oct 12 02:10:56 PM UTC 24 |
Oct 12 02:11:34 PM UTC 24 |
1446357068 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.2443995153 |
|
|
Oct 12 02:11:32 PM UTC 24 |
Oct 12 02:11:35 PM UTC 24 |
61960848 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1110051978 |
|
|
Oct 12 02:11:23 PM UTC 24 |
Oct 12 02:11:35 PM UTC 24 |
1162638584 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1201328490 |
|
|
Oct 12 02:11:33 PM UTC 24 |
Oct 12 02:11:35 PM UTC 24 |
14390944 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.1224769437 |
|
|
Oct 12 02:11:33 PM UTC 24 |
Oct 12 02:11:36 PM UTC 24 |
74378202 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.4107579623 |
|
|
Oct 12 02:11:31 PM UTC 24 |
Oct 12 02:11:37 PM UTC 24 |
693788233 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.2715589452 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:11:37 PM UTC 24 |
1466824064 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1587966302 |
|
|
Oct 12 02:11:14 PM UTC 24 |
Oct 12 02:11:39 PM UTC 24 |
4249767328 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.3761700270 |
|
|
Oct 12 02:11:26 PM UTC 24 |
Oct 12 02:11:39 PM UTC 24 |
76731027 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.200025838 |
|
|
Oct 12 02:11:06 PM UTC 24 |
Oct 12 02:11:39 PM UTC 24 |
4245248413 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.461039913 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:11:40 PM UTC 24 |
3133831498 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.206220114 |
|
|
Oct 12 02:11:11 PM UTC 24 |
Oct 12 02:11:40 PM UTC 24 |
833229658 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.3245980093 |
|
|
Oct 12 02:11:34 PM UTC 24 |
Oct 12 02:11:40 PM UTC 24 |
563730313 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.3772692998 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:11:41 PM UTC 24 |
715987812 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.530086714 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:11:41 PM UTC 24 |
1932026040 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.2358262177 |
|
|
Oct 12 02:11:36 PM UTC 24 |
Oct 12 02:11:41 PM UTC 24 |
367479072 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1355929038 |
|
|
Oct 12 02:10:55 PM UTC 24 |
Oct 12 02:11:42 PM UTC 24 |
2041130493 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.2162738712 |
|
|
Oct 12 02:11:45 PM UTC 24 |
Oct 12 02:11:54 PM UTC 24 |
540447033 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.1967745096 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:11:42 PM UTC 24 |
518899383 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.118622547 |
|
|
Oct 12 02:11:31 PM UTC 24 |
Oct 12 02:11:43 PM UTC 24 |
244644932 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.2008251326 |
|
|
Oct 12 02:09:29 PM UTC 24 |
Oct 12 02:11:43 PM UTC 24 |
24849507274 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.3421757123 |
|
|
Oct 12 02:11:42 PM UTC 24 |
Oct 12 02:11:44 PM UTC 24 |
26008032 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.3239093931 |
|
|
Oct 12 02:10:28 PM UTC 24 |
Oct 12 02:11:44 PM UTC 24 |
1437569383 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.1877082571 |
|
|
Oct 12 02:11:42 PM UTC 24 |
Oct 12 02:11:44 PM UTC 24 |
25524708 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.2664020113 |
|
|
Oct 12 02:11:29 PM UTC 24 |
Oct 12 02:11:44 PM UTC 24 |
839022945 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.2384021014 |
|
|
Oct 12 02:11:33 PM UTC 24 |
Oct 12 02:11:44 PM UTC 24 |
121373962 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.14812210 |
|
|
Oct 12 02:11:31 PM UTC 24 |
Oct 12 02:11:45 PM UTC 24 |
625131070 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.1124948489 |
|
|
Oct 12 02:11:42 PM UTC 24 |
Oct 12 02:11:45 PM UTC 24 |
210896275 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.177899348 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:11:46 PM UTC 24 |
2144312126 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.2504785029 |
|
|
Oct 12 02:11:45 PM UTC 24 |
Oct 12 02:11:54 PM UTC 24 |
836933286 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.937809119 |
|
|
Oct 12 02:11:35 PM UTC 24 |
Oct 12 02:11:46 PM UTC 24 |
1548442322 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.1789880382 |
|
|
Oct 12 02:11:16 PM UTC 24 |
Oct 12 02:11:47 PM UTC 24 |
3881111076 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.1044472104 |
|
|
Oct 12 02:11:43 PM UTC 24 |
Oct 12 02:11:47 PM UTC 24 |
166193653 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2293702006 |
|
|
Oct 12 02:11:46 PM UTC 24 |
Oct 12 02:11:49 PM UTC 24 |
28899452 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1729456947 |
|
|
Oct 12 02:11:31 PM UTC 24 |
Oct 12 02:11:49 PM UTC 24 |
475809895 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.1304074410 |
|
|
Oct 12 02:11:38 PM UTC 24 |
Oct 12 02:11:50 PM UTC 24 |
280327711 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1346290522 |
|
|
Oct 12 02:11:48 PM UTC 24 |
Oct 12 02:11:50 PM UTC 24 |
17158506 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.1663403163 |
|
|
Oct 12 02:10:38 PM UTC 24 |
Oct 12 02:11:50 PM UTC 24 |
14559499017 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.359589001 |
|
|
Oct 12 02:11:40 PM UTC 24 |
Oct 12 02:11:50 PM UTC 24 |
346260735 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.3818284652 |
|
|
Oct 12 02:11:34 PM UTC 24 |
Oct 12 02:11:50 PM UTC 24 |
1321035585 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.3770451698 |
|
|
Oct 12 02:11:22 PM UTC 24 |
Oct 12 02:11:51 PM UTC 24 |
667499474 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.2567916053 |
|
|
Oct 12 02:11:40 PM UTC 24 |
Oct 12 02:11:53 PM UTC 24 |
1269317396 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.1196417282 |
|
|
Oct 12 02:11:14 PM UTC 24 |
Oct 12 02:11:51 PM UTC 24 |
1510428774 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.2200430002 |
|
|
Oct 12 02:11:36 PM UTC 24 |
Oct 12 02:11:51 PM UTC 24 |
884240191 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.2623490574 |
|
|
Oct 12 02:11:38 PM UTC 24 |
Oct 12 02:11:52 PM UTC 24 |
1881251748 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all_with_rand_reset.1646276371 |
|
|
Oct 12 02:09:21 PM UTC 24 |
Oct 12 02:11:53 PM UTC 24 |
4612720205 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.721776624 |
|
|
Oct 12 02:11:48 PM UTC 24 |
Oct 12 02:11:53 PM UTC 24 |
980178962 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.4178082913 |
|
|
Oct 12 02:11:43 PM UTC 24 |
Oct 12 02:11:53 PM UTC 24 |
139540249 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.1291470802 |
|
|
Oct 12 02:11:50 PM UTC 24 |
Oct 12 02:11:54 PM UTC 24 |
27626742 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.423525672 |
|
|
Oct 12 02:11:49 PM UTC 24 |
Oct 12 02:11:54 PM UTC 24 |
228452610 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.112033492 |
|
|
Oct 12 02:11:22 PM UTC 24 |
Oct 12 02:11:54 PM UTC 24 |
6258155482 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.1312881132 |
|
|
Oct 12 02:11:45 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
872439072 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.3072489258 |
|
|
Oct 12 02:11:53 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
48954338 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.412790061 |
|
|
Oct 12 02:11:53 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
234560313 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.3162176066 |
|
|
Oct 12 02:11:26 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
463824878 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.4187211465 |
|
|
Oct 12 02:11:40 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
439927078 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1248153049 |
|
|
Oct 12 02:11:53 PM UTC 24 |
Oct 12 02:11:56 PM UTC 24 |
84543578 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.3973949762 |
|
|
Oct 12 02:10:20 PM UTC 24 |
Oct 12 02:11:58 PM UTC 24 |
16804112486 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.2262740481 |
|
|
Oct 12 02:11:45 PM UTC 24 |
Oct 12 02:11:59 PM UTC 24 |
450380067 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1584083811 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:11:59 PM UTC 24 |
193804540 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.2544575072 |
|
|
Oct 12 02:11:57 PM UTC 24 |
Oct 12 02:11:59 PM UTC 24 |
36131262 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1887313428 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:11:59 PM UTC 24 |
418608083 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.4149773279 |
|
|
Oct 12 02:11:57 PM UTC 24 |
Oct 12 02:12:00 PM UTC 24 |
82228874 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.436546729 |
|
|
Oct 12 02:11:20 PM UTC 24 |
Oct 12 02:12:00 PM UTC 24 |
690912642 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.311931317 |
|
|
Oct 12 02:11:45 PM UTC 24 |
Oct 12 02:12:00 PM UTC 24 |
335657100 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.2770388615 |
|
|
Oct 12 02:11:46 PM UTC 24 |
Oct 12 02:12:00 PM UTC 24 |
597721723 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.2593505944 |
|
|
Oct 12 02:11:57 PM UTC 24 |
Oct 12 02:12:01 PM UTC 24 |
30696088 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.281413255 |
|
|
Oct 12 02:11:52 PM UTC 24 |
Oct 12 02:12:01 PM UTC 24 |
248807236 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.2067897362 |
|
|
Oct 12 02:11:52 PM UTC 24 |
Oct 12 02:12:01 PM UTC 24 |
287219184 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.3886469239 |
|
|
Oct 12 02:11:50 PM UTC 24 |
Oct 12 02:12:02 PM UTC 24 |
233803133 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.1457280003 |
|
|
Oct 12 02:11:52 PM UTC 24 |
Oct 12 02:12:02 PM UTC 24 |
981008598 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.184556650 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:03 PM UTC 24 |
212599842 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.470741168 |
|
|
Oct 12 02:11:50 PM UTC 24 |
Oct 12 02:12:03 PM UTC 24 |
255634829 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.2706111889 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:04 PM UTC 24 |
267000948 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.3034179919 |
|
|
Oct 12 02:12:20 PM UTC 24 |
Oct 12 02:12:24 PM UTC 24 |
258839373 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.2854095090 |
|
|
Oct 12 02:11:33 PM UTC 24 |
Oct 12 02:12:05 PM UTC 24 |
464911019 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.1693055678 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:05 PM UTC 24 |
102616837 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.832924647 |
|
|
Oct 12 02:12:03 PM UTC 24 |
Oct 12 02:12:05 PM UTC 24 |
22589934 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.3723712671 |
|
|
Oct 12 02:11:48 PM UTC 24 |
Oct 12 02:12:24 PM UTC 24 |
206654182 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.3097677369 |
|
|
Oct 12 02:12:03 PM UTC 24 |
Oct 12 02:12:06 PM UTC 24 |
82134203 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.4134660377 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:07 PM UTC 24 |
134757153 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.1638751991 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:07 PM UTC 24 |
1626438027 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1598879936 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:08 PM UTC 24 |
246727274 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.1137239879 |
|
|
Oct 12 02:11:31 PM UTC 24 |
Oct 12 02:12:08 PM UTC 24 |
8922980009 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.1137633866 |
|
|
Oct 12 02:12:04 PM UTC 24 |
Oct 12 02:12:08 PM UTC 24 |
88872319 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.1846441701 |
|
|
Oct 12 02:12:03 PM UTC 24 |
Oct 12 02:12:09 PM UTC 24 |
67168146 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.1279972137 |
|
|
Oct 12 02:11:59 PM UTC 24 |
Oct 12 02:12:09 PM UTC 24 |
121477970 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.4207765853 |
|
|
Oct 12 02:10:50 PM UTC 24 |
Oct 12 02:12:10 PM UTC 24 |
9533832982 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3215993041 |
|
|
Oct 12 02:11:05 PM UTC 24 |
Oct 12 02:12:24 PM UTC 24 |
6383161124 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.4061587152 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:10 PM UTC 24 |
549874366 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.2615789498 |
|
|
Oct 12 02:11:52 PM UTC 24 |
Oct 12 02:12:10 PM UTC 24 |
578195342 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.2670230478 |
|
|
Oct 12 02:11:55 PM UTC 24 |
Oct 12 02:12:10 PM UTC 24 |
936697788 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3452067354 |
|
|
Oct 12 02:12:09 PM UTC 24 |
Oct 12 02:12:12 PM UTC 24 |
20234006 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1968413054 |
|
|
Oct 12 02:12:09 PM UTC 24 |
Oct 12 02:12:12 PM UTC 24 |
13530449 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.3204981161 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:12 PM UTC 24 |
550577758 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.2859025551 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:12 PM UTC 24 |
734662515 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.2805980572 |
|
|
Oct 12 02:12:09 PM UTC 24 |
Oct 12 02:12:13 PM UTC 24 |
87043329 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.3841328657 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:14 PM UTC 24 |
270433190 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.1976956471 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:14 PM UTC 24 |
455260366 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.330962005 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:14 PM UTC 24 |
466872548 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.268934171 |
|
|
Oct 12 02:11:38 PM UTC 24 |
Oct 12 02:12:15 PM UTC 24 |
10779556599 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3879386998 |
|
|
Oct 12 02:11:43 PM UTC 24 |
Oct 12 02:12:15 PM UTC 24 |
1411716403 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.154570457 |
|
|
Oct 12 02:09:21 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
42809001931 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.2996462961 |
|
|
Oct 12 02:12:04 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
155376361 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.1753636454 |
|
|
Oct 12 02:12:11 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
259421524 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.3549490132 |
|
|
Oct 12 02:12:05 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
243672472 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2928375059 |
|
|
Oct 12 02:12:06 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
2646664876 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.2387604398 |
|
|
Oct 12 02:12:14 PM UTC 24 |
Oct 12 02:12:16 PM UTC 24 |
70674267 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.2501358058 |
|
|
Oct 12 02:10:44 PM UTC 24 |
Oct 12 02:12:17 PM UTC 24 |
11674455065 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2619823699 |
|
|
Oct 12 02:12:07 PM UTC 24 |
Oct 12 02:12:17 PM UTC 24 |
406200506 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.338117727 |
|
|
Oct 12 02:12:15 PM UTC 24 |
Oct 12 02:12:18 PM UTC 24 |
15125555 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.2446945132 |
|
|
Oct 12 02:12:11 PM UTC 24 |
Oct 12 02:12:18 PM UTC 24 |
1571604361 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.114731753 |
|
|
Oct 12 02:12:10 PM UTC 24 |
Oct 12 02:12:18 PM UTC 24 |
72651299 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.1720639454 |
|
|
Oct 12 02:12:15 PM UTC 24 |
Oct 12 02:12:19 PM UTC 24 |
192782710 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.1338556032 |
|
|
Oct 12 02:12:07 PM UTC 24 |
Oct 12 02:12:19 PM UTC 24 |
345306308 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all_with_rand_reset.3884948286 |
|
|
Oct 12 02:11:09 PM UTC 24 |
Oct 12 02:12:20 PM UTC 24 |
11791816072 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2358120497 |
|
|
Oct 12 02:12:11 PM UTC 24 |
Oct 12 02:12:20 PM UTC 24 |
562338275 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.3149290747 |
|
|
Oct 12 02:11:25 PM UTC 24 |
Oct 12 02:12:20 PM UTC 24 |
12004886145 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.3660975955 |
|
|
Oct 12 02:12:05 PM UTC 24 |
Oct 12 02:12:20 PM UTC 24 |
1025968066 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3403642819 |
|
|
Oct 12 02:12:19 PM UTC 24 |
Oct 12 02:12:21 PM UTC 24 |
48389456 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1339241565 |
|
|
Oct 12 02:12:19 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
11643804 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.3819225904 |
|
|
Oct 12 02:12:11 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
932685106 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.275270805 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
50056935 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.2919457066 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
100455367 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.2589543009 |
|
|
Oct 12 02:11:42 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
1541037933 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.60630372 |
|
|
Oct 12 02:12:07 PM UTC 24 |
Oct 12 02:12:22 PM UTC 24 |
587373486 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.3096498228 |
|
|
Oct 12 02:12:19 PM UTC 24 |
Oct 12 02:12:23 PM UTC 24 |
44299987 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.2410932265 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:23 PM UTC 24 |
525438074 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.2730071986 |
|
|
Oct 12 02:12:22 PM UTC 24 |
Oct 12 02:12:24 PM UTC 24 |
157652433 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.253815793 |
|
|
Oct 12 02:12:12 PM UTC 24 |
Oct 12 02:12:25 PM UTC 24 |
229056633 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.2383352866 |
|
|
Oct 12 02:12:23 PM UTC 24 |
Oct 12 02:12:26 PM UTC 24 |
14544033 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.2378463129 |
|
|
Oct 12 02:12:20 PM UTC 24 |
Oct 12 02:12:26 PM UTC 24 |
253742029 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.1886081437 |
|
|
Oct 12 02:12:24 PM UTC 24 |
Oct 12 02:12:26 PM UTC 24 |
41643877 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.4045498529 |
|
|
Oct 12 02:12:24 PM UTC 24 |
Oct 12 02:12:26 PM UTC 24 |
20508648 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.2436691542 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:26 PM UTC 24 |
1083685643 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1279495864 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:28 PM UTC 24 |
52643531 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.13594775 |
|
|
Oct 12 02:10:33 PM UTC 24 |
Oct 12 02:12:28 PM UTC 24 |
15310029800 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.3448835548 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:29 PM UTC 24 |
598431664 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.1542981684 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:29 PM UTC 24 |
217608199 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.1088425744 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:29 PM UTC 24 |
2184150202 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3325877687 |
|
|
Oct 12 02:12:12 PM UTC 24 |
Oct 12 02:12:30 PM UTC 24 |
2743156525 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.1575741002 |
|
|
Oct 12 02:12:11 PM UTC 24 |
Oct 12 02:12:30 PM UTC 24 |
403205456 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.2021907999 |
|
|
Oct 12 02:12:28 PM UTC 24 |
Oct 12 02:12:31 PM UTC 24 |
34605017 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.300345860 |
|
|
Oct 12 02:12:22 PM UTC 24 |
Oct 12 02:12:31 PM UTC 24 |
1204546380 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.21567617 |
|
|
Oct 12 02:12:29 PM UTC 24 |
Oct 12 02:12:31 PM UTC 24 |
31293620 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.2408776555 |
|
|
Oct 12 02:11:28 PM UTC 24 |
Oct 12 02:12:32 PM UTC 24 |
3333119099 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2357941014 |
|
|
Oct 12 02:12:29 PM UTC 24 |
Oct 12 02:12:33 PM UTC 24 |
162782314 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.3296241691 |
|
|
Oct 12 02:12:22 PM UTC 24 |
Oct 12 02:12:33 PM UTC 24 |
1227835859 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.639743356 |
|
|
Oct 12 02:12:10 PM UTC 24 |
Oct 12 02:12:33 PM UTC 24 |
455342893 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.1416947470 |
|
|
Oct 12 02:12:44 PM UTC 24 |
Oct 12 02:12:57 PM UTC 24 |
1256880661 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.93209332 |
|
|
Oct 12 02:12:17 PM UTC 24 |
Oct 12 02:12:34 PM UTC 24 |
1118868718 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2489197459 |
|
|
Oct 12 02:12:57 PM UTC 24 |
Oct 12 02:12:59 PM UTC 24 |
62677503 ps |