| T588 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_errors.2274122320 |
|
|
Oct 12 02:12:20 PM UTC 24 |
Oct 12 02:12:34 PM UTC 24 |
319510971 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2768379753 |
|
|
Oct 12 02:11:53 PM UTC 24 |
Oct 12 02:12:34 PM UTC 24 |
230482881 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.1794921316 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:34 PM UTC 24 |
331065755 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.1235103194 |
|
|
Oct 12 02:10:15 PM UTC 24 |
Oct 12 02:12:35 PM UTC 24 |
21845673860 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.3113261716 |
|
|
Oct 12 02:12:23 PM UTC 24 |
Oct 12 02:12:36 PM UTC 24 |
457141686 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.441797201 |
|
|
Oct 12 02:12:34 PM UTC 24 |
Oct 12 02:12:36 PM UTC 24 |
35420794 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2277672977 |
|
|
Oct 12 02:12:03 PM UTC 24 |
Oct 12 02:12:36 PM UTC 24 |
527097881 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_errors.1768564812 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:37 PM UTC 24 |
373293207 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.2095159842 |
|
|
Oct 12 02:12:30 PM UTC 24 |
Oct 12 02:12:37 PM UTC 24 |
350806864 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.2533346947 |
|
|
Oct 12 02:12:35 PM UTC 24 |
Oct 12 02:12:37 PM UTC 24 |
49331170 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.3877111118 |
|
|
Oct 12 02:12:23 PM UTC 24 |
Oct 12 02:12:39 PM UTC 24 |
402139560 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.1330995405 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:40 PM UTC 24 |
670194060 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.580317104 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:40 PM UTC 24 |
261979912 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.4203556123 |
|
|
Oct 12 02:11:57 PM UTC 24 |
Oct 12 02:12:40 PM UTC 24 |
889465019 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.267443117 |
|
|
Oct 12 02:12:35 PM UTC 24 |
Oct 12 02:12:40 PM UTC 24 |
229093572 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.1459751621 |
|
|
Oct 12 02:12:35 PM UTC 24 |
Oct 12 02:12:40 PM UTC 24 |
253519885 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.170341027 |
|
|
Oct 12 02:12:36 PM UTC 24 |
Oct 12 02:12:41 PM UTC 24 |
386486423 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.1668704701 |
|
|
Oct 12 02:12:34 PM UTC 24 |
Oct 12 02:12:42 PM UTC 24 |
262920374 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.2006498804 |
|
|
Oct 12 02:12:26 PM UTC 24 |
Oct 12 02:12:42 PM UTC 24 |
1723124375 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.635966983 |
|
|
Oct 12 02:12:15 PM UTC 24 |
Oct 12 02:12:42 PM UTC 24 |
798720119 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.507583697 |
|
|
Oct 12 02:12:32 PM UTC 24 |
Oct 12 02:12:43 PM UTC 24 |
1313371629 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.3209913558 |
|
|
Oct 12 02:12:37 PM UTC 24 |
Oct 12 02:12:43 PM UTC 24 |
1486667191 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.3062757527 |
|
|
Oct 12 02:10:52 PM UTC 24 |
Oct 12 02:12:43 PM UTC 24 |
3072454633 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.2186186271 |
|
|
Oct 12 02:12:41 PM UTC 24 |
Oct 12 02:12:44 PM UTC 24 |
24828413 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.4063329326 |
|
|
Oct 12 02:12:41 PM UTC 24 |
Oct 12 02:12:44 PM UTC 24 |
17867645 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.1592445033 |
|
|
Oct 12 02:12:41 PM UTC 24 |
Oct 12 02:12:44 PM UTC 24 |
26467551 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.1557500472 |
|
|
Oct 12 02:12:32 PM UTC 24 |
Oct 12 02:12:44 PM UTC 24 |
2658257299 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.484213123 |
|
|
Oct 12 02:12:30 PM UTC 24 |
Oct 12 02:12:45 PM UTC 24 |
271067562 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.3388240973 |
|
|
Oct 12 02:12:43 PM UTC 24 |
Oct 12 02:12:46 PM UTC 24 |
174283642 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.1474919857 |
|
|
Oct 12 02:12:45 PM UTC 24 |
Oct 12 02:12:47 PM UTC 24 |
263023373 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_errors.3403681032 |
|
|
Oct 12 02:12:32 PM UTC 24 |
Oct 12 02:12:47 PM UTC 24 |
351710839 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.2516695573 |
|
|
Oct 12 02:12:27 PM UTC 24 |
Oct 12 02:12:47 PM UTC 24 |
663458081 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_errors.2491103354 |
|
|
Oct 12 02:12:37 PM UTC 24 |
Oct 12 02:12:48 PM UTC 24 |
1001033355 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.2578041616 |
|
|
Oct 12 02:12:46 PM UTC 24 |
Oct 12 02:12:49 PM UTC 24 |
199200215 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.2087077932 |
|
|
Oct 12 02:12:37 PM UTC 24 |
Oct 12 02:12:49 PM UTC 24 |
696345250 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.175934315 |
|
|
Oct 12 02:11:23 PM UTC 24 |
Oct 12 02:12:49 PM UTC 24 |
12771358880 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.611793546 |
|
|
Oct 12 02:12:32 PM UTC 24 |
Oct 12 02:12:49 PM UTC 24 |
401021301 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.503840926 |
|
|
Oct 12 02:12:46 PM UTC 24 |
Oct 12 02:12:49 PM UTC 24 |
53893856 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.553928183 |
|
|
Oct 12 02:12:37 PM UTC 24 |
Oct 12 02:12:51 PM UTC 24 |
1487557206 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.1042921944 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:12:51 PM UTC 24 |
2071621929 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.1517101581 |
|
|
Oct 12 02:12:38 PM UTC 24 |
Oct 12 02:12:51 PM UTC 24 |
247396419 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.2494639174 |
|
|
Oct 12 02:12:32 PM UTC 24 |
Oct 12 02:12:51 PM UTC 24 |
2174440543 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.3970372269 |
|
|
Oct 12 02:12:44 PM UTC 24 |
Oct 12 02:12:52 PM UTC 24 |
1681678801 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.2684587805 |
|
|
Oct 12 02:12:48 PM UTC 24 |
Oct 12 02:12:52 PM UTC 24 |
200565017 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.4286250998 |
|
|
Oct 12 02:12:20 PM UTC 24 |
Oct 12 02:12:52 PM UTC 24 |
895431566 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1501020313 |
|
|
Oct 12 02:12:41 PM UTC 24 |
Oct 12 02:12:53 PM UTC 24 |
53947041 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3239471144 |
|
|
Oct 12 02:12:37 PM UTC 24 |
Oct 12 02:12:53 PM UTC 24 |
922489709 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.2986839053 |
|
|
Oct 12 02:12:53 PM UTC 24 |
Oct 12 02:12:56 PM UTC 24 |
39539842 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.994485192 |
|
|
Oct 12 02:12:53 PM UTC 24 |
Oct 12 02:12:58 PM UTC 24 |
251231009 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.3025863890 |
|
|
Oct 12 02:12:43 PM UTC 24 |
Oct 12 02:12:54 PM UTC 24 |
1133488289 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.1216907310 |
|
|
Oct 12 02:12:52 PM UTC 24 |
Oct 12 02:12:54 PM UTC 24 |
20221178 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.730401019 |
|
|
Oct 12 02:12:01 PM UTC 24 |
Oct 12 02:12:55 PM UTC 24 |
2888140003 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.4106762936 |
|
|
Oct 12 02:12:44 PM UTC 24 |
Oct 12 02:12:55 PM UTC 24 |
889615774 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.23199599 |
|
|
Oct 12 02:12:53 PM UTC 24 |
Oct 12 02:12:55 PM UTC 24 |
38534923 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.245964266 |
|
|
Oct 12 02:12:52 PM UTC 24 |
Oct 12 02:12:56 PM UTC 24 |
136678043 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.1958285123 |
|
|
Oct 12 02:12:34 PM UTC 24 |
Oct 12 02:12:56 PM UTC 24 |
2412496367 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.3886707551 |
|
|
Oct 12 02:12:48 PM UTC 24 |
Oct 12 02:12:58 PM UTC 24 |
139359973 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.3424614719 |
|
|
Oct 12 02:12:30 PM UTC 24 |
Oct 12 02:13:00 PM UTC 24 |
182606049 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.2828309328 |
|
|
Oct 12 02:12:08 PM UTC 24 |
Oct 12 02:13:28 PM UTC 24 |
14843009037 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1210389225 |
|
|
Oct 12 02:12:58 PM UTC 24 |
Oct 12 02:13:01 PM UTC 24 |
13662845 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.2181561652 |
|
|
Oct 12 02:12:44 PM UTC 24 |
Oct 12 02:13:01 PM UTC 24 |
575873698 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_errors.3337437930 |
|
|
Oct 12 02:12:48 PM UTC 24 |
Oct 12 02:13:02 PM UTC 24 |
412430042 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.2279042297 |
|
|
Oct 12 02:13:20 PM UTC 24 |
Oct 12 02:13:29 PM UTC 24 |
100268007 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.1839768079 |
|
|
Oct 12 02:12:25 PM UTC 24 |
Oct 12 02:13:02 PM UTC 24 |
556660275 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.3549195287 |
|
|
Oct 12 02:12:58 PM UTC 24 |
Oct 12 02:13:02 PM UTC 24 |
72026339 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.1870805396 |
|
|
Oct 12 02:12:55 PM UTC 24 |
Oct 12 02:13:03 PM UTC 24 |
235270636 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.32715805 |
|
|
Oct 12 02:12:50 PM UTC 24 |
Oct 12 02:13:03 PM UTC 24 |
505772318 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all_with_rand_reset.2967373424 |
|
|
Oct 12 02:09:38 PM UTC 24 |
Oct 12 02:13:03 PM UTC 24 |
81463051501 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.1866495620 |
|
|
Oct 12 02:11:46 PM UTC 24 |
Oct 12 02:13:03 PM UTC 24 |
10973603498 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_errors.4063485438 |
|
|
Oct 12 02:12:43 PM UTC 24 |
Oct 12 02:13:04 PM UTC 24 |
2079238570 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.1565437044 |
|
|
Oct 12 02:11:18 PM UTC 24 |
Oct 12 02:13:05 PM UTC 24 |
11994061182 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3830998978 |
|
|
Oct 12 02:12:59 PM UTC 24 |
Oct 12 02:13:05 PM UTC 24 |
169800793 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.2314969220 |
|
|
Oct 12 02:11:36 PM UTC 24 |
Oct 12 02:13:05 PM UTC 24 |
9264256127 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.4095052264 |
|
|
Oct 12 02:12:54 PM UTC 24 |
Oct 12 02:13:05 PM UTC 24 |
749455461 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.4232397789 |
|
|
Oct 12 02:12:19 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
32196388663 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3671674657 |
|
|
Oct 12 02:12:55 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
364636750 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_errors.1018691755 |
|
|
Oct 12 02:12:53 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
1450168998 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.3812554854 |
|
|
Oct 12 02:13:03 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
34781787 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all_with_rand_reset.1884973614 |
|
|
Oct 12 02:09:46 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
18051900458 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.353950203 |
|
|
Oct 12 02:11:52 PM UTC 24 |
Oct 12 02:13:06 PM UTC 24 |
7942378546 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.2509575266 |
|
|
Oct 12 02:12:50 PM UTC 24 |
Oct 12 02:13:07 PM UTC 24 |
661388319 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.2259863737 |
|
|
Oct 12 02:12:50 PM UTC 24 |
Oct 12 02:13:07 PM UTC 24 |
360620745 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.1129959486 |
|
|
Oct 12 02:12:50 PM UTC 24 |
Oct 12 02:13:08 PM UTC 24 |
2276752752 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.2451040429 |
|
|
Oct 12 02:12:35 PM UTC 24 |
Oct 12 02:13:08 PM UTC 24 |
754481222 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.4241186556 |
|
|
Oct 12 02:13:05 PM UTC 24 |
Oct 12 02:13:08 PM UTC 24 |
19717823 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_errors.3249645777 |
|
|
Oct 12 02:13:00 PM UTC 24 |
Oct 12 02:13:09 PM UTC 24 |
183362204 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.1207519808 |
|
|
Oct 12 02:13:02 PM UTC 24 |
Oct 12 02:13:09 PM UTC 24 |
2083980488 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.2841837288 |
|
|
Oct 12 02:13:05 PM UTC 24 |
Oct 12 02:13:09 PM UTC 24 |
136862384 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.2022920882 |
|
|
Oct 12 02:12:59 PM UTC 24 |
Oct 12 02:13:09 PM UTC 24 |
49651579 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.1675624878 |
|
|
Oct 12 02:13:05 PM UTC 24 |
Oct 12 02:13:10 PM UTC 24 |
51297268 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.2502156218 |
|
|
Oct 12 02:12:55 PM UTC 24 |
Oct 12 02:13:10 PM UTC 24 |
1722476977 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1889502173 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:11 PM UTC 24 |
124378092 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.783588427 |
|
|
Oct 12 02:12:41 PM UTC 24 |
Oct 12 02:13:11 PM UTC 24 |
1263410841 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.4049625917 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:11 PM UTC 24 |
36373837 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.4141088917 |
|
|
Oct 12 02:13:02 PM UTC 24 |
Oct 12 02:13:13 PM UTC 24 |
928714424 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.2464137705 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:13 PM UTC 24 |
1021263256 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.1461554895 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:14 PM UTC 24 |
214503477 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.1862260747 |
|
|
Oct 12 02:13:02 PM UTC 24 |
Oct 12 02:13:14 PM UTC 24 |
334584072 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.3200923062 |
|
|
Oct 12 02:13:05 PM UTC 24 |
Oct 12 02:13:14 PM UTC 24 |
82288879 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.2891045469 |
|
|
Oct 12 02:13:12 PM UTC 24 |
Oct 12 02:13:14 PM UTC 24 |
23898364 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.886640636 |
|
|
Oct 12 02:13:03 PM UTC 24 |
Oct 12 02:13:14 PM UTC 24 |
373699797 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.3108758765 |
|
|
Oct 12 02:13:14 PM UTC 24 |
Oct 12 02:13:17 PM UTC 24 |
11912060 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.2381024264 |
|
|
Oct 12 02:13:02 PM UTC 24 |
Oct 12 02:13:17 PM UTC 24 |
1219322552 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.2937913679 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:17 PM UTC 24 |
753702915 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.2781239194 |
|
|
Oct 12 02:13:12 PM UTC 24 |
Oct 12 02:13:17 PM UTC 24 |
60512984 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_errors.128743031 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:17 PM UTC 24 |
1163987139 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.3610187690 |
|
|
Oct 12 02:13:10 PM UTC 24 |
Oct 12 02:13:18 PM UTC 24 |
206929248 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.2726128087 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:18 PM UTC 24 |
348184837 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.514516580 |
|
|
Oct 12 02:12:50 PM UTC 24 |
Oct 12 02:13:18 PM UTC 24 |
4164071155 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3054180977 |
|
|
Oct 12 02:13:16 PM UTC 24 |
Oct 12 02:13:29 PM UTC 24 |
263289181 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_errors.183921292 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:19 PM UTC 24 |
959567905 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.3008265071 |
|
|
Oct 12 02:12:56 PM UTC 24 |
Oct 12 02:13:20 PM UTC 24 |
3713509123 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.1283127604 |
|
|
Oct 12 02:13:15 PM UTC 24 |
Oct 12 02:13:20 PM UTC 24 |
209062440 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.1759896676 |
|
|
Oct 12 02:13:10 PM UTC 24 |
Oct 12 02:13:21 PM UTC 24 |
264574895 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.2579847457 |
|
|
Oct 12 02:13:10 PM UTC 24 |
Oct 12 02:13:21 PM UTC 24 |
1165922967 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3720453438 |
|
|
Oct 12 02:13:18 PM UTC 24 |
Oct 12 02:13:21 PM UTC 24 |
24170610 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.989371055 |
|
|
Oct 12 02:13:16 PM UTC 24 |
Oct 12 02:13:21 PM UTC 24 |
218037800 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.261597201 |
|
|
Oct 12 02:13:10 PM UTC 24 |
Oct 12 02:13:22 PM UTC 24 |
797190517 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.1337386399 |
|
|
Oct 12 02:13:18 PM UTC 24 |
Oct 12 02:13:30 PM UTC 24 |
403782460 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.2539964314 |
|
|
Oct 12 02:13:20 PM UTC 24 |
Oct 12 02:13:23 PM UTC 24 |
33469494 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.1788427071 |
|
|
Oct 12 02:13:20 PM UTC 24 |
Oct 12 02:13:23 PM UTC 24 |
112434549 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.3478816259 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:23 PM UTC 24 |
1013381180 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1457426997 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:23 PM UTC 24 |
134711039 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.3243996102 |
|
|
Oct 12 02:13:27 PM UTC 24 |
Oct 12 02:13:31 PM UTC 24 |
89333426 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.1578036196 |
|
|
Oct 12 02:13:10 PM UTC 24 |
Oct 12 02:13:23 PM UTC 24 |
5089320973 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.442580569 |
|
|
Oct 12 02:13:14 PM UTC 24 |
Oct 12 02:13:24 PM UTC 24 |
267307491 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.920560854 |
|
|
Oct 12 02:13:07 PM UTC 24 |
Oct 12 02:13:24 PM UTC 24 |
1303066891 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3247377395 |
|
|
Oct 12 02:12:53 PM UTC 24 |
Oct 12 02:13:25 PM UTC 24 |
518574422 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.2266253015 |
|
|
Oct 12 02:12:47 PM UTC 24 |
Oct 12 02:13:25 PM UTC 24 |
225908247 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.638122571 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:26 PM UTC 24 |
239931163 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.2012916921 |
|
|
Oct 12 02:13:21 PM UTC 24 |
Oct 12 02:13:26 PM UTC 24 |
67635442 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.2824118125 |
|
|
Oct 12 02:12:27 PM UTC 24 |
Oct 12 02:13:26 PM UTC 24 |
2072109705 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.3107291472 |
|
|
Oct 12 02:13:24 PM UTC 24 |
Oct 12 02:13:27 PM UTC 24 |
32605682 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.2773280859 |
|
|
Oct 12 02:13:24 PM UTC 24 |
Oct 12 02:13:27 PM UTC 24 |
11271535 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.4213834368 |
|
|
Oct 12 02:13:24 PM UTC 24 |
Oct 12 02:13:28 PM UTC 24 |
30814567 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.254955515 |
|
|
Oct 12 02:12:58 PM UTC 24 |
Oct 12 02:13:31 PM UTC 24 |
333779883 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.1456924821 |
|
|
Oct 12 02:13:16 PM UTC 24 |
Oct 12 02:13:32 PM UTC 24 |
487341113 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.821336993 |
|
|
Oct 12 02:13:26 PM UTC 24 |
Oct 12 02:13:32 PM UTC 24 |
106654056 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.1549974201 |
|
|
Oct 12 02:13:18 PM UTC 24 |
Oct 12 02:13:32 PM UTC 24 |
4272120901 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.334413668 |
|
|
Oct 12 02:13:30 PM UTC 24 |
Oct 12 02:13:32 PM UTC 24 |
18629558 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.3649917347 |
|
|
Oct 12 02:13:30 PM UTC 24 |
Oct 12 02:13:33 PM UTC 24 |
23337127 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.618721777 |
|
|
Oct 12 02:13:26 PM UTC 24 |
Oct 12 02:13:33 PM UTC 24 |
171097721 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.1285135822 |
|
|
Oct 12 02:13:18 PM UTC 24 |
Oct 12 02:13:34 PM UTC 24 |
984143723 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.3957599191 |
|
|
Oct 12 02:13:05 PM UTC 24 |
Oct 12 02:13:34 PM UTC 24 |
965366719 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_errors.2875825883 |
|
|
Oct 12 02:13:21 PM UTC 24 |
Oct 12 02:13:34 PM UTC 24 |
1066786834 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.2690080032 |
|
|
Oct 12 02:13:23 PM UTC 24 |
Oct 12 02:13:34 PM UTC 24 |
4325770844 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.1487151698 |
|
|
Oct 12 02:13:30 PM UTC 24 |
Oct 12 02:13:35 PM UTC 24 |
32539128 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.2845594711 |
|
|
Oct 12 02:13:32 PM UTC 24 |
Oct 12 02:13:35 PM UTC 24 |
206843198 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.3302350254 |
|
|
Oct 12 02:13:21 PM UTC 24 |
Oct 12 02:13:35 PM UTC 24 |
1285989163 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.1942590763 |
|
|
Oct 12 02:13:35 PM UTC 24 |
Oct 12 02:13:37 PM UTC 24 |
45240300 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.3386871499 |
|
|
Oct 12 02:13:24 PM UTC 24 |
Oct 12 02:13:37 PM UTC 24 |
459665693 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.1877316054 |
|
|
Oct 12 02:13:36 PM UTC 24 |
Oct 12 02:13:38 PM UTC 24 |
14860189 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.1353623882 |
|
|
Oct 12 02:13:30 PM UTC 24 |
Oct 12 02:13:39 PM UTC 24 |
76695962 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.3784425425 |
|
|
Oct 12 02:13:27 PM UTC 24 |
Oct 12 02:13:40 PM UTC 24 |
851664214 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.1099088867 |
|
|
Oct 12 02:13:36 PM UTC 24 |
Oct 12 02:13:40 PM UTC 24 |
44798888 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.1527812812 |
|
|
Oct 12 02:13:36 PM UTC 24 |
Oct 12 02:13:40 PM UTC 24 |
91134293 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.793266824 |
|
|
Oct 12 02:13:23 PM UTC 24 |
Oct 12 02:13:42 PM UTC 24 |
2367352340 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.3126394503 |
|
|
Oct 12 02:13:36 PM UTC 24 |
Oct 12 02:13:43 PM UTC 24 |
76602011 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.940562333 |
|
|
Oct 12 02:13:33 PM UTC 24 |
Oct 12 02:13:43 PM UTC 24 |
250279160 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.3428134120 |
|
|
Oct 12 02:13:33 PM UTC 24 |
Oct 12 02:13:43 PM UTC 24 |
1750890741 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.3555753191 |
|
|
Oct 12 02:13:14 PM UTC 24 |
Oct 12 02:13:44 PM UTC 24 |
1121115508 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.2156234399 |
|
|
Oct 12 02:12:23 PM UTC 24 |
Oct 12 02:13:44 PM UTC 24 |
1984915674 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.3727416518 |
|
|
Oct 12 02:13:33 PM UTC 24 |
Oct 12 02:13:44 PM UTC 24 |
427310660 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2306958894 |
|
|
Oct 12 02:13:23 PM UTC 24 |
Oct 12 02:13:45 PM UTC 24 |
2647569206 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.2089239175 |
|
|
Oct 12 02:13:33 PM UTC 24 |
Oct 12 02:13:45 PM UTC 24 |
1293678969 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.2241730747 |
|
|
Oct 12 02:13:27 PM UTC 24 |
Oct 12 02:13:46 PM UTC 24 |
1034108434 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.2023249589 |
|
|
Oct 12 02:13:27 PM UTC 24 |
Oct 12 02:13:46 PM UTC 24 |
553771943 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_errors.754757014 |
|
|
Oct 12 02:13:32 PM UTC 24 |
Oct 12 02:13:47 PM UTC 24 |
853641278 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.4037718771 |
|
|
Oct 12 02:13:44 PM UTC 24 |
Oct 12 02:13:47 PM UTC 24 |
71014867 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.3668467070 |
|
|
Oct 12 02:13:44 PM UTC 24 |
Oct 12 02:13:47 PM UTC 24 |
170852869 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_errors.3671980522 |
|
|
Oct 12 02:13:26 PM UTC 24 |
Oct 12 02:13:47 PM UTC 24 |
1058171750 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.888554656 |
|
|
Oct 12 02:13:44 PM UTC 24 |
Oct 12 02:13:49 PM UTC 24 |
134256065 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.3060901590 |
|
|
Oct 12 02:13:38 PM UTC 24 |
Oct 12 02:13:50 PM UTC 24 |
2249106982 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.1883082530 |
|
|
Oct 12 02:13:46 PM UTC 24 |
Oct 12 02:13:50 PM UTC 24 |
113492343 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.1329981802 |
|
|
Oct 12 02:13:39 PM UTC 24 |
Oct 12 02:13:50 PM UTC 24 |
3655377689 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.4098556260 |
|
|
Oct 12 02:13:41 PM UTC 24 |
Oct 12 02:13:50 PM UTC 24 |
296904256 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.359472846 |
|
|
Oct 12 02:13:49 PM UTC 24 |
Oct 12 02:13:52 PM UTC 24 |
17823277 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.219295702 |
|
|
Oct 12 02:13:23 PM UTC 24 |
Oct 12 02:13:52 PM UTC 24 |
14320723918 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.30164770 |
|
|
Oct 12 02:09:46 PM UTC 24 |
Oct 12 02:13:52 PM UTC 24 |
50711022842 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3352315285 |
|
|
Oct 12 02:13:24 PM UTC 24 |
Oct 12 02:13:52 PM UTC 24 |
887525889 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.926491076 |
|
|
Oct 12 02:13:54 PM UTC 24 |
Oct 12 02:14:07 PM UTC 24 |
630499031 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2483660329 |
|
|
Oct 12 02:13:51 PM UTC 24 |
Oct 12 02:13:53 PM UTC 24 |
14441390 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.3556169181 |
|
|
Oct 12 02:13:50 PM UTC 24 |
Oct 12 02:13:53 PM UTC 24 |
72564937 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.3025278198 |
|
|
Oct 12 02:12:19 PM UTC 24 |
Oct 12 02:13:53 PM UTC 24 |
8325282409 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.3175638343 |
|
|
Oct 12 02:13:09 PM UTC 24 |
Oct 12 02:13:53 PM UTC 24 |
342975361 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_errors.283676282 |
|
|
Oct 12 02:13:37 PM UTC 24 |
Oct 12 02:13:54 PM UTC 24 |
1201907782 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.3973231608 |
|
|
Oct 12 02:13:46 PM UTC 24 |
Oct 12 02:13:54 PM UTC 24 |
1147075599 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_stress_all.26378535 |
|
|
Oct 12 02:13:03 PM UTC 24 |
Oct 12 02:13:54 PM UTC 24 |
8056285960 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.4057236267 |
|
|
Oct 12 02:13:20 PM UTC 24 |
Oct 12 02:13:54 PM UTC 24 |
284128041 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.15316875 |
|
|
Oct 12 02:13:41 PM UTC 24 |
Oct 12 02:13:55 PM UTC 24 |
969256900 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.1818543856 |
|
|
Oct 12 02:13:52 PM UTC 24 |
Oct 12 02:13:56 PM UTC 24 |
56339146 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.2443501039 |
|
|
Oct 12 02:13:33 PM UTC 24 |
Oct 12 02:13:56 PM UTC 24 |
412366568 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.2993237133 |
|
|
Oct 12 02:13:48 PM UTC 24 |
Oct 12 02:13:57 PM UTC 24 |
286636053 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.634078014 |
|
|
Oct 12 02:13:46 PM UTC 24 |
Oct 12 02:13:57 PM UTC 24 |
140672868 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.1258834719 |
|
|
Oct 12 02:13:41 PM UTC 24 |
Oct 12 02:13:58 PM UTC 24 |
462369969 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.45713908 |
|
|
Oct 12 02:13:54 PM UTC 24 |
Oct 12 02:13:58 PM UTC 24 |
97467974 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.4092503070 |
|
|
Oct 12 02:13:56 PM UTC 24 |
Oct 12 02:13:58 PM UTC 24 |
57275403 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.2547911559 |
|
|
Oct 12 02:13:56 PM UTC 24 |
Oct 12 02:13:58 PM UTC 24 |
14627646 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.2349805277 |
|
|
Oct 12 02:13:48 PM UTC 24 |
Oct 12 02:13:59 PM UTC 24 |
276980947 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.1118266093 |
|
|
Oct 12 02:13:56 PM UTC 24 |
Oct 12 02:13:59 PM UTC 24 |
106524871 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.953827457 |
|
|
Oct 12 02:13:56 PM UTC 24 |
Oct 12 02:14:07 PM UTC 24 |
574234990 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.3438473894 |
|
|
Oct 12 02:13:57 PM UTC 24 |
Oct 12 02:14:02 PM UTC 24 |
133683795 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.3128375166 |
|
|
Oct 12 02:13:48 PM UTC 24 |
Oct 12 02:14:02 PM UTC 24 |
803082186 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.3622636334 |
|
|
Oct 12 02:13:51 PM UTC 24 |
Oct 12 02:14:03 PM UTC 24 |
234698438 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.1226887737 |
|
|
Oct 12 02:14:00 PM UTC 24 |
Oct 12 02:14:03 PM UTC 24 |
40459029 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3461871578 |
|
|
Oct 12 02:13:54 PM UTC 24 |
Oct 12 02:14:03 PM UTC 24 |
479443945 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.443893060 |
|
|
Oct 12 02:13:30 PM UTC 24 |
Oct 12 02:14:04 PM UTC 24 |
206537916 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1213280076 |
|
|
Oct 12 02:13:48 PM UTC 24 |
Oct 12 02:14:04 PM UTC 24 |
1014596597 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.1278074491 |
|
|
Oct 12 02:14:00 PM UTC 24 |
Oct 12 02:14:04 PM UTC 24 |
74845722 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.2923686259 |
|
|
Oct 12 02:13:58 PM UTC 24 |
Oct 12 02:14:05 PM UTC 24 |
1227935988 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.3494162752 |
|
|
Oct 12 02:14:03 PM UTC 24 |
Oct 12 02:14:05 PM UTC 24 |
32149735 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_errors.220376276 |
|
|
Oct 12 02:13:53 PM UTC 24 |
Oct 12 02:14:05 PM UTC 24 |
571411652 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_errors.578171200 |
|
|
Oct 12 02:13:46 PM UTC 24 |
Oct 12 02:14:05 PM UTC 24 |
478893071 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.2676727405 |
|
|
Oct 12 02:12:08 PM UTC 24 |
Oct 12 02:14:06 PM UTC 24 |
3756498120 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.1860787098 |
|
|
Oct 12 02:14:04 PM UTC 24 |
Oct 12 02:14:07 PM UTC 24 |
16538825 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.3988952880 |
|
|
Oct 12 02:13:54 PM UTC 24 |
Oct 12 02:14:07 PM UTC 24 |
5492889381 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.756008807 |
|
|
Oct 12 02:14:07 PM UTC 24 |
Oct 12 02:14:09 PM UTC 24 |
53269203 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.3368888791 |
|
|
Oct 12 02:13:54 PM UTC 24 |
Oct 12 02:14:09 PM UTC 24 |
2894544744 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.4042320798 |
|
|
Oct 12 02:14:03 PM UTC 24 |
Oct 12 02:14:10 PM UTC 24 |
292790781 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.1011295631 |
|
|
Oct 12 02:14:05 PM UTC 24 |
Oct 12 02:14:10 PM UTC 24 |
689256878 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.1567234099 |
|
|
Oct 12 02:14:07 PM UTC 24 |
Oct 12 02:14:11 PM UTC 24 |
99830326 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.2791432850 |
|
|
Oct 12 02:14:08 PM UTC 24 |
Oct 12 02:14:11 PM UTC 24 |
52765798 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.1136633814 |
|
|
Oct 12 02:13:58 PM UTC 24 |
Oct 12 02:14:11 PM UTC 24 |
1024343570 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.2665481516 |
|
|
Oct 12 02:13:59 PM UTC 24 |
Oct 12 02:14:11 PM UTC 24 |
418668474 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.3599056171 |
|
|
Oct 12 02:13:59 PM UTC 24 |
Oct 12 02:14:13 PM UTC 24 |
424301433 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.3054404490 |
|
|
Oct 12 02:14:09 PM UTC 24 |
Oct 12 02:14:13 PM UTC 24 |
374447732 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_errors.353366868 |
|
|
Oct 12 02:13:58 PM UTC 24 |
Oct 12 02:14:14 PM UTC 24 |
379054071 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.2761064112 |
|
|
Oct 12 02:14:05 PM UTC 24 |
Oct 12 02:14:15 PM UTC 24 |
5050037157 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_jtag_access.3774404205 |
|
|
Oct 12 02:14:11 PM UTC 24 |
Oct 12 02:14:16 PM UTC 24 |
233834260 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.3148205158 |
|
|
Oct 12 02:14:14 PM UTC 24 |
Oct 12 02:14:16 PM UTC 24 |
91996054 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.3285792953 |
|
|
Oct 12 02:13:36 PM UTC 24 |
Oct 12 02:14:16 PM UTC 24 |
705798850 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.285377821 |
|
|
Oct 12 02:14:04 PM UTC 24 |
Oct 12 02:14:17 PM UTC 24 |
599365587 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.1637174596 |
|
|
Oct 12 02:13:45 PM UTC 24 |
Oct 12 02:14:17 PM UTC 24 |
937143186 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.2075847815 |
|
|
Oct 12 02:14:15 PM UTC 24 |
Oct 12 02:14:17 PM UTC 24 |
46796105 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.3677313255 |
|
|
Oct 12 02:14:14 PM UTC 24 |
Oct 12 02:14:18 PM UTC 24 |
101765869 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.2541351248 |
|
|
Oct 12 02:12:44 PM UTC 24 |
Oct 12 02:14:18 PM UTC 24 |
13082964482 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_errors.1916812025 |
|
|
Oct 12 02:14:04 PM UTC 24 |
Oct 12 02:14:18 PM UTC 24 |
713519009 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.1629239091 |
|
|
Oct 12 02:13:59 PM UTC 24 |
Oct 12 02:14:18 PM UTC 24 |
1748678040 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.660754061 |
|
|
Oct 12 02:14:05 PM UTC 24 |
Oct 12 02:14:19 PM UTC 24 |
519572480 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_stress_all.2068063919 |
|
|
Oct 12 02:13:59 PM UTC 24 |
Oct 12 02:15:13 PM UTC 24 |
3115703437 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.2402595373 |
|
|
Oct 12 02:13:56 PM UTC 24 |
Oct 12 02:14:20 PM UTC 24 |
492753157 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.3671338590 |
|
|
Oct 12 02:13:51 PM UTC 24 |
Oct 12 02:14:20 PM UTC 24 |
5072479897 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.2567536693 |
|
|
Oct 12 02:12:39 PM UTC 24 |
Oct 12 02:14:21 PM UTC 24 |
7241912099 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.283833852 |
|
|
Oct 12 02:14:05 PM UTC 24 |
Oct 12 02:14:22 PM UTC 24 |
319730146 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.3795932030 |
|
|
Oct 12 02:14:20 PM UTC 24 |
Oct 12 02:14:23 PM UTC 24 |
16992524 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.2146582652 |
|
|
Oct 12 02:14:09 PM UTC 24 |
Oct 12 02:14:23 PM UTC 24 |
218179867 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/48.lc_ctrl_volatile_unlock_smoke.4140836134 |
|
|
Oct 12 02:14:21 PM UTC 24 |
Oct 12 02:14:24 PM UTC 24 |
18900784 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_stress_all_with_rand_reset.12546903 |
|
|
Oct 12 02:13:03 PM UTC 24 |
Oct 12 02:15:10 PM UTC 24 |
6146701712 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_errors.3915027396 |
|
|
Oct 12 02:14:10 PM UTC 24 |
Oct 12 02:14:24 PM UTC 24 |
698215149 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_11/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.731841632 |
|
|
Oct 12 02:14:10 PM UTC 24 |
Oct 12 02:14:24 PM UTC 24 |
2886142759 ps |