| T562 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.1754008661 |
|
|
Aug 23 09:54:27 AM UTC 24 |
Aug 23 09:54:30 AM UTC 24 |
264124562 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.2480607769 |
|
|
Aug 23 09:54:25 AM UTC 24 |
Aug 23 09:54:33 AM UTC 24 |
218021841 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.282507236 |
|
|
Aug 23 09:54:23 AM UTC 24 |
Aug 23 09:54:33 AM UTC 24 |
142427291 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.2566178586 |
|
|
Aug 23 09:54:26 AM UTC 24 |
Aug 23 09:54:34 AM UTC 24 |
1138767034 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.1603763641 |
|
|
Aug 23 09:54:34 AM UTC 24 |
Aug 23 09:54:36 AM UTC 24 |
41853753 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3003944700 |
|
|
Aug 23 09:54:36 AM UTC 24 |
Aug 23 09:54:38 AM UTC 24 |
44839591 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.327745917 |
|
|
Aug 23 09:54:35 AM UTC 24 |
Aug 23 09:54:39 AM UTC 24 |
46530197 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.1438152322 |
|
|
Aug 23 09:54:29 AM UTC 24 |
Aug 23 09:54:40 AM UTC 24 |
787518719 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.3713852781 |
|
|
Aug 23 09:54:27 AM UTC 24 |
Aug 23 09:54:40 AM UTC 24 |
407899928 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.3988332036 |
|
|
Aug 23 09:53:09 AM UTC 24 |
Aug 23 09:54:40 AM UTC 24 |
6391227258 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.2857387739 |
|
|
Aug 23 09:54:27 AM UTC 24 |
Aug 23 09:54:43 AM UTC 24 |
496724244 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.83934393 |
|
|
Aug 23 09:55:14 AM UTC 24 |
Aug 23 09:55:45 AM UTC 24 |
731503353 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.738601761 |
|
|
Aug 23 09:54:41 AM UTC 24 |
Aug 23 09:54:45 AM UTC 24 |
86843309 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1093398343 |
|
|
Aug 23 09:54:42 AM UTC 24 |
Aug 23 09:54:46 AM UTC 24 |
340816391 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.1091041207 |
|
|
Aug 23 09:54:22 AM UTC 24 |
Aug 23 09:54:51 AM UTC 24 |
294045401 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.2446186547 |
|
|
Aug 23 09:54:43 AM UTC 24 |
Aug 23 09:54:52 AM UTC 24 |
646741229 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.1351953012 |
|
|
Aug 23 09:54:42 AM UTC 24 |
Aug 23 09:54:53 AM UTC 24 |
1565118645 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.1398534966 |
|
|
Aug 23 09:54:46 AM UTC 24 |
Aug 23 09:54:54 AM UTC 24 |
1786284397 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.1339360551 |
|
|
Aug 23 09:54:54 AM UTC 24 |
Aug 23 09:54:55 AM UTC 24 |
16031468 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.1070995205 |
|
|
Aug 23 09:54:42 AM UTC 24 |
Aug 23 09:54:56 AM UTC 24 |
1226776704 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1646369295 |
|
|
Aug 23 09:54:56 AM UTC 24 |
Aug 23 09:54:57 AM UTC 24 |
21857466 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.2338519059 |
|
|
Aug 23 09:54:47 AM UTC 24 |
Aug 23 09:54:58 AM UTC 24 |
289224121 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.1434613185 |
|
|
Aug 23 09:54:56 AM UTC 24 |
Aug 23 09:55:00 AM UTC 24 |
141843715 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.2054122338 |
|
|
Aug 23 09:54:39 AM UTC 24 |
Aug 23 09:55:01 AM UTC 24 |
244654246 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.1341175019 |
|
|
Aug 23 09:54:46 AM UTC 24 |
Aug 23 09:55:01 AM UTC 24 |
1458159709 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.3855878719 |
|
|
Aug 23 09:54:59 AM UTC 24 |
Aug 23 09:55:02 AM UTC 24 |
38180700 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1612802317 |
|
|
Aug 23 09:54:58 AM UTC 24 |
Aug 23 09:55:07 AM UTC 24 |
302647863 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.3042250982 |
|
|
Aug 23 09:55:02 AM UTC 24 |
Aug 23 09:55:11 AM UTC 24 |
1081933446 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.1914327203 |
|
|
Aug 23 09:55:02 AM UTC 24 |
Aug 23 09:55:13 AM UTC 24 |
736541004 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.3916038094 |
|
|
Aug 23 09:54:32 AM UTC 24 |
Aug 23 09:55:13 AM UTC 24 |
1228035910 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.771268564 |
|
|
Aug 23 09:55:02 AM UTC 24 |
Aug 23 09:55:14 AM UTC 24 |
944099799 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.882908529 |
|
|
Aug 23 09:55:03 AM UTC 24 |
Aug 23 09:55:16 AM UTC 24 |
1312850284 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all.104810409 |
|
|
Aug 23 09:53:58 AM UTC 24 |
Aug 23 09:55:16 AM UTC 24 |
5335270756 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.2758900331 |
|
|
Aug 23 09:55:14 AM UTC 24 |
Aug 23 09:55:16 AM UTC 24 |
129828251 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.2405956761 |
|
|
Aug 23 09:55:07 AM UTC 24 |
Aug 23 09:55:17 AM UTC 24 |
3736585017 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.4254749208 |
|
|
Aug 23 09:55:17 AM UTC 24 |
Aug 23 09:55:18 AM UTC 24 |
48537199 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.771332585 |
|
|
Aug 23 09:54:57 AM UTC 24 |
Aug 23 09:55:18 AM UTC 24 |
452244188 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.4171306121 |
|
|
Aug 23 09:55:15 AM UTC 24 |
Aug 23 09:55:19 AM UTC 24 |
49131587 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all.2641474279 |
|
|
Aug 23 09:52:28 AM UTC 24 |
Aug 23 09:55:20 AM UTC 24 |
35976647331 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.53902768 |
|
|
Aug 23 09:55:18 AM UTC 24 |
Aug 23 09:55:20 AM UTC 24 |
44544418 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.1135983935 |
|
|
Aug 23 09:55:21 AM UTC 24 |
Aug 23 09:55:23 AM UTC 24 |
82880229 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.2903330924 |
|
|
Aug 23 09:55:08 AM UTC 24 |
Aug 23 09:55:23 AM UTC 24 |
1482687635 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.1819543826 |
|
|
Aug 23 09:55:17 AM UTC 24 |
Aug 23 09:55:24 AM UTC 24 |
79617669 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.2885999189 |
|
|
Aug 23 09:55:27 AM UTC 24 |
Aug 23 09:55:28 AM UTC 24 |
23965152 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.3761622674 |
|
|
Aug 23 09:55:22 AM UTC 24 |
Aug 23 09:55:30 AM UTC 24 |
496882722 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.3078470716 |
|
|
Aug 23 09:55:19 AM UTC 24 |
Aug 23 09:55:30 AM UTC 24 |
322336544 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.2117113053 |
|
|
Aug 23 09:55:29 AM UTC 24 |
Aug 23 09:55:32 AM UTC 24 |
206306718 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.2129397725 |
|
|
Aug 23 09:55:31 AM UTC 24 |
Aug 23 09:55:33 AM UTC 24 |
16512549 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.297337621 |
|
|
Aug 23 09:55:19 AM UTC 24 |
Aug 23 09:55:35 AM UTC 24 |
346804371 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3905757520 |
|
|
Aug 23 09:55:22 AM UTC 24 |
Aug 23 09:55:36 AM UTC 24 |
1466983547 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.320442514 |
|
|
Aug 23 09:55:23 AM UTC 24 |
Aug 23 09:55:37 AM UTC 24 |
733327802 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.2651184419 |
|
|
Aug 23 09:54:14 AM UTC 24 |
Aug 23 09:55:38 AM UTC 24 |
24534250584 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.2086585247 |
|
|
Aug 23 09:52:42 AM UTC 24 |
Aug 23 09:55:39 AM UTC 24 |
28188819479 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.1330911707 |
|
|
Aug 23 09:55:34 AM UTC 24 |
Aug 23 09:55:39 AM UTC 24 |
148166644 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.2744269930 |
|
|
Aug 23 09:55:32 AM UTC 24 |
Aug 23 09:55:40 AM UTC 24 |
90700849 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.38790755 |
|
|
Aug 23 09:55:17 AM UTC 24 |
Aug 23 09:55:40 AM UTC 24 |
4110180157 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.464005515 |
|
|
Aug 23 09:55:38 AM UTC 24 |
Aug 23 09:55:45 AM UTC 24 |
829871929 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.669065830 |
|
|
Aug 23 09:55:37 AM UTC 24 |
Aug 23 09:55:47 AM UTC 24 |
3529087049 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.3805009057 |
|
|
Aug 23 09:55:39 AM UTC 24 |
Aug 23 09:55:48 AM UTC 24 |
441952847 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.4076097513 |
|
|
Aug 23 09:55:46 AM UTC 24 |
Aug 23 09:55:48 AM UTC 24 |
24319761 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.3770067864 |
|
|
Aug 23 09:55:46 AM UTC 24 |
Aug 23 09:55:48 AM UTC 24 |
59538058 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.2852510000 |
|
|
Aug 23 09:55:46 AM UTC 24 |
Aug 23 09:55:49 AM UTC 24 |
94615147 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.3938802836 |
|
|
Aug 23 09:55:41 AM UTC 24 |
Aug 23 09:55:50 AM UTC 24 |
643485476 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.20308276 |
|
|
Aug 23 09:55:49 AM UTC 24 |
Aug 23 09:55:52 AM UTC 24 |
171572786 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.546631924 |
|
|
Aug 23 09:55:24 AM UTC 24 |
Aug 23 09:55:52 AM UTC 24 |
1253749203 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.725925402 |
|
|
Aug 23 09:55:49 AM UTC 24 |
Aug 23 09:55:52 AM UTC 24 |
53710436 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.2988919776 |
|
|
Aug 23 09:57:06 AM UTC 24 |
Aug 23 09:57:22 AM UTC 24 |
742082256 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.713271320 |
|
|
Aug 23 09:55:50 AM UTC 24 |
Aug 23 09:55:57 AM UTC 24 |
1254672611 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.125849489 |
|
|
Aug 23 09:52:58 AM UTC 24 |
Aug 23 09:55:58 AM UTC 24 |
5917635409 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.2180924074 |
|
|
Aug 23 09:55:41 AM UTC 24 |
Aug 23 09:55:59 AM UTC 24 |
1931806194 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.1735298129 |
|
|
Aug 23 09:55:31 AM UTC 24 |
Aug 23 09:56:00 AM UTC 24 |
1301603531 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.3612947822 |
|
|
Aug 23 09:55:58 AM UTC 24 |
Aug 23 09:56:00 AM UTC 24 |
203625313 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.200258562 |
|
|
Aug 23 09:55:49 AM UTC 24 |
Aug 23 09:56:00 AM UTC 24 |
483897655 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.3682998912 |
|
|
Aug 23 09:55:54 AM UTC 24 |
Aug 23 09:56:01 AM UTC 24 |
207573570 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.1382370629 |
|
|
Aug 23 09:56:01 AM UTC 24 |
Aug 23 09:56:03 AM UTC 24 |
10786670 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.2886068810 |
|
|
Aug 23 09:55:59 AM UTC 24 |
Aug 23 09:56:04 AM UTC 24 |
56584919 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.114627199 |
|
|
Aug 23 09:55:51 AM UTC 24 |
Aug 23 09:56:04 AM UTC 24 |
482941307 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.500378140 |
|
|
Aug 23 09:56:01 AM UTC 24 |
Aug 23 09:56:04 AM UTC 24 |
248981397 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.3316980401 |
|
|
Aug 23 09:56:01 AM UTC 24 |
Aug 23 09:56:05 AM UTC 24 |
83596623 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.3543833897 |
|
|
Aug 23 09:53:23 AM UTC 24 |
Aug 23 09:56:05 AM UTC 24 |
68537659899 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3874746364 |
|
|
Aug 23 09:56:05 AM UTC 24 |
Aug 23 09:56:08 AM UTC 24 |
465948395 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.3461321009 |
|
|
Aug 23 09:55:54 AM UTC 24 |
Aug 23 09:56:08 AM UTC 24 |
2641141258 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.1076091360 |
|
|
Aug 23 09:56:03 AM UTC 24 |
Aug 23 09:56:09 AM UTC 24 |
166693081 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.3646623140 |
|
|
Aug 23 09:55:54 AM UTC 24 |
Aug 23 09:56:10 AM UTC 24 |
3278438224 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2791384275 |
|
|
Aug 23 09:56:09 AM UTC 24 |
Aug 23 09:56:11 AM UTC 24 |
38513631 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.2683257593 |
|
|
Aug 23 09:55:47 AM UTC 24 |
Aug 23 09:56:13 AM UTC 24 |
267270384 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.128259861 |
|
|
Aug 23 09:56:11 AM UTC 24 |
Aug 23 09:56:13 AM UTC 24 |
34550888 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.4117538757 |
|
|
Aug 23 09:56:12 AM UTC 24 |
Aug 23 09:56:14 AM UTC 24 |
16237002 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.2165676539 |
|
|
Aug 23 09:56:02 AM UTC 24 |
Aug 23 09:56:14 AM UTC 24 |
5648217796 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.352642957 |
|
|
Aug 23 09:56:06 AM UTC 24 |
Aug 23 09:56:15 AM UTC 24 |
315259772 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.3236727826 |
|
|
Aug 23 09:56:14 AM UTC 24 |
Aug 23 09:56:18 AM UTC 24 |
253570108 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.2074399358 |
|
|
Aug 23 09:56:06 AM UTC 24 |
Aug 23 09:56:19 AM UTC 24 |
371364700 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3393543711 |
|
|
Aug 23 09:56:01 AM UTC 24 |
Aug 23 09:56:20 AM UTC 24 |
772224606 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.109982414 |
|
|
Aug 23 09:56:14 AM UTC 24 |
Aug 23 09:56:20 AM UTC 24 |
121659315 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.1434265060 |
|
|
Aug 23 09:56:06 AM UTC 24 |
Aug 23 09:56:21 AM UTC 24 |
1080421953 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.4077088216 |
|
|
Aug 23 09:56:16 AM UTC 24 |
Aug 23 09:56:24 AM UTC 24 |
1826115855 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.389771617 |
|
|
Aug 23 09:56:16 AM UTC 24 |
Aug 23 09:56:25 AM UTC 24 |
1785307381 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.4185921345 |
|
|
Aug 23 09:56:25 AM UTC 24 |
Aug 23 09:56:27 AM UTC 24 |
88051550 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.3948762579 |
|
|
Aug 23 09:56:14 AM UTC 24 |
Aug 23 09:56:27 AM UTC 24 |
684327498 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all.2516847213 |
|
|
Aug 23 09:55:12 AM UTC 24 |
Aug 23 09:56:29 AM UTC 24 |
30988849366 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.1336873957 |
|
|
Aug 23 09:56:27 AM UTC 24 |
Aug 23 09:56:29 AM UTC 24 |
46152654 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.3263480174 |
|
|
Aug 23 09:56:19 AM UTC 24 |
Aug 23 09:56:29 AM UTC 24 |
963111236 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.3768699753 |
|
|
Aug 23 09:56:26 AM UTC 24 |
Aug 23 09:56:29 AM UTC 24 |
205849055 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.3382643460 |
|
|
Aug 23 09:56:20 AM UTC 24 |
Aug 23 09:56:30 AM UTC 24 |
354758301 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.1778478912 |
|
|
Aug 23 09:56:19 AM UTC 24 |
Aug 23 09:56:32 AM UTC 24 |
497427991 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.3709301505 |
|
|
Aug 23 09:56:30 AM UTC 24 |
Aug 23 09:56:33 AM UTC 24 |
115723637 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.999237698 |
|
|
Aug 23 09:56:12 AM UTC 24 |
Aug 23 09:56:34 AM UTC 24 |
1419457349 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.787701591 |
|
|
Aug 23 09:56:31 AM UTC 24 |
Aug 23 09:56:34 AM UTC 24 |
296809392 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.1198090503 |
|
|
Aug 23 09:56:30 AM UTC 24 |
Aug 23 09:56:38 AM UTC 24 |
361855549 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.2596264302 |
|
|
Aug 23 09:56:38 AM UTC 24 |
Aug 23 09:56:40 AM UTC 24 |
67364232 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.2909899563 |
|
|
Aug 23 09:56:30 AM UTC 24 |
Aug 23 09:56:41 AM UTC 24 |
1046818043 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.774213185 |
|
|
Aug 23 09:56:30 AM UTC 24 |
Aug 23 09:56:41 AM UTC 24 |
1340435020 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.1767022443 |
|
|
Aug 23 09:56:33 AM UTC 24 |
Aug 23 09:56:42 AM UTC 24 |
1032467333 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.1888458454 |
|
|
Aug 23 09:56:34 AM UTC 24 |
Aug 23 09:56:43 AM UTC 24 |
1002494378 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.680414097 |
|
|
Aug 23 09:56:42 AM UTC 24 |
Aug 23 09:56:43 AM UTC 24 |
77297301 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.709576221 |
|
|
Aug 23 09:56:41 AM UTC 24 |
Aug 23 09:56:44 AM UTC 24 |
170255666 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.2446487935 |
|
|
Aug 23 09:56:27 AM UTC 24 |
Aug 23 09:56:46 AM UTC 24 |
200599460 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.437300918 |
|
|
Aug 23 09:56:35 AM UTC 24 |
Aug 23 09:56:48 AM UTC 24 |
2860948933 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.213096033 |
|
|
Aug 23 09:56:44 AM UTC 24 |
Aug 23 09:56:48 AM UTC 24 |
276772040 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.3765548812 |
|
|
Aug 23 09:56:43 AM UTC 24 |
Aug 23 09:56:50 AM UTC 24 |
79323308 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.2611146189 |
|
|
Aug 23 09:56:47 AM UTC 24 |
Aug 23 09:56:50 AM UTC 24 |
340439465 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.1610324067 |
|
|
Aug 23 09:56:44 AM UTC 24 |
Aug 23 09:56:53 AM UTC 24 |
703477852 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.3933072354 |
|
|
Aug 23 09:56:46 AM UTC 24 |
Aug 23 09:56:55 AM UTC 24 |
489141552 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.3320855239 |
|
|
Aug 23 09:56:48 AM UTC 24 |
Aug 23 09:56:56 AM UTC 24 |
338050440 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.2161875359 |
|
|
Aug 23 09:56:56 AM UTC 24 |
Aug 23 09:56:58 AM UTC 24 |
40422739 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.2572672975 |
|
|
Aug 23 09:56:49 AM UTC 24 |
Aug 23 09:56:58 AM UTC 24 |
2163066720 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.3495150648 |
|
|
Aug 23 09:56:58 AM UTC 24 |
Aug 23 09:57:00 AM UTC 24 |
34754024 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.3107750242 |
|
|
Aug 23 09:56:57 AM UTC 24 |
Aug 23 09:57:00 AM UTC 24 |
71557523 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.228812548 |
|
|
Aug 23 09:57:00 AM UTC 24 |
Aug 23 09:57:05 AM UTC 24 |
74694168 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.1699013952 |
|
|
Aug 23 09:56:51 AM UTC 24 |
Aug 23 09:57:05 AM UTC 24 |
1826354236 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.3709113067 |
|
|
Aug 23 09:57:02 AM UTC 24 |
Aug 23 09:57:06 AM UTC 24 |
226630993 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.1346949307 |
|
|
Aug 23 09:56:42 AM UTC 24 |
Aug 23 09:57:09 AM UTC 24 |
628107416 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.2370369248 |
|
|
Aug 23 09:57:07 AM UTC 24 |
Aug 23 09:57:10 AM UTC 24 |
99741008 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.1200031340 |
|
|
Aug 23 09:55:41 AM UTC 24 |
Aug 23 09:57:16 AM UTC 24 |
20880570902 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.463682166 |
|
|
Aug 23 09:57:07 AM UTC 24 |
Aug 23 09:57:17 AM UTC 24 |
442786094 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.1708971201 |
|
|
Aug 23 09:57:12 AM UTC 24 |
Aug 23 09:57:20 AM UTC 24 |
436559484 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.2126067693 |
|
|
Aug 23 09:57:12 AM UTC 24 |
Aug 23 09:57:21 AM UTC 24 |
1083855282 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.3369775166 |
|
|
Aug 23 09:56:59 AM UTC 24 |
Aug 23 09:57:23 AM UTC 24 |
209305463 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.865537614 |
|
|
Aug 23 09:54:15 AM UTC 24 |
Aug 23 09:57:23 AM UTC 24 |
6754557788 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.1695110036 |
|
|
Aug 23 09:57:21 AM UTC 24 |
Aug 23 09:57:23 AM UTC 24 |
35118910 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all_with_rand_reset.1565468963 |
|
|
Aug 23 09:56:35 AM UTC 24 |
Aug 23 09:57:24 AM UTC 24 |
1529285232 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.1493768911 |
|
|
Aug 23 09:57:23 AM UTC 24 |
Aug 23 09:57:25 AM UTC 24 |
15665317 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.4100075227 |
|
|
Aug 23 09:57:23 AM UTC 24 |
Aug 23 09:57:26 AM UTC 24 |
34145264 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all.1770688282 |
|
|
Aug 23 09:56:51 AM UTC 24 |
Aug 23 09:57:27 AM UTC 24 |
2941478973 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all.547774990 |
|
|
Aug 23 09:56:35 AM UTC 24 |
Aug 23 09:57:27 AM UTC 24 |
9251565286 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.105793653 |
|
|
Aug 23 09:57:24 AM UTC 24 |
Aug 23 09:57:27 AM UTC 24 |
290591186 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.2706451469 |
|
|
Aug 23 09:57:10 AM UTC 24 |
Aug 23 09:57:28 AM UTC 24 |
2669872277 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.3752164555 |
|
|
Aug 23 09:54:52 AM UTC 24 |
Aug 23 09:57:30 AM UTC 24 |
29623978638 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2710187860 |
|
|
Aug 23 09:57:27 AM UTC 24 |
Aug 23 09:57:31 AM UTC 24 |
157434543 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.3864675963 |
|
|
Aug 23 09:57:24 AM UTC 24 |
Aug 23 09:57:33 AM UTC 24 |
84268276 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.1467622259 |
|
|
Aug 23 09:57:32 AM UTC 24 |
Aug 23 09:57:34 AM UTC 24 |
41453706 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.484107329 |
|
|
Aug 23 09:57:25 AM UTC 24 |
Aug 23 09:57:35 AM UTC 24 |
1137389858 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.906936956 |
|
|
Aug 23 09:58:38 AM UTC 24 |
Aug 23 09:58:39 AM UTC 24 |
55534650 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.2352932232 |
|
|
Aug 23 09:50:52 AM UTC 24 |
Aug 23 09:57:36 AM UTC 24 |
14330968594 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.1096569923 |
|
|
Aug 23 09:57:34 AM UTC 24 |
Aug 23 09:57:36 AM UTC 24 |
22111364 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.947528280 |
|
|
Aug 23 09:57:35 AM UTC 24 |
Aug 23 09:57:37 AM UTC 24 |
36264532 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all.1540252405 |
|
|
Aug 23 09:56:06 AM UTC 24 |
Aug 23 09:57:39 AM UTC 24 |
33266709595 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.1390201913 |
|
|
Aug 23 09:57:28 AM UTC 24 |
Aug 23 09:57:40 AM UTC 24 |
293002526 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.2050190121 |
|
|
Aug 23 09:58:33 AM UTC 24 |
Aug 23 09:58:41 AM UTC 24 |
315150341 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.3843036297 |
|
|
Aug 23 09:57:37 AM UTC 24 |
Aug 23 09:57:41 AM UTC 24 |
96052423 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.117925328 |
|
|
Aug 23 09:57:28 AM UTC 24 |
Aug 23 09:57:42 AM UTC 24 |
418161488 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.614496992 |
|
|
Aug 23 09:57:28 AM UTC 24 |
Aug 23 09:57:43 AM UTC 24 |
699200349 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.431672847 |
|
|
Aug 23 09:57:40 AM UTC 24 |
Aug 23 09:57:44 AM UTC 24 |
1023807528 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.3265588662 |
|
|
Aug 23 09:57:37 AM UTC 24 |
Aug 23 09:57:45 AM UTC 24 |
257694378 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.1483485454 |
|
|
Aug 23 09:57:38 AM UTC 24 |
Aug 23 09:57:45 AM UTC 24 |
229000219 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.2541267972 |
|
|
Aug 23 09:57:25 AM UTC 24 |
Aug 23 09:57:46 AM UTC 24 |
5878522766 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.1659304751 |
|
|
Aug 23 09:57:45 AM UTC 24 |
Aug 23 09:57:47 AM UTC 24 |
75752615 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.216358343 |
|
|
Aug 23 09:57:37 AM UTC 24 |
Aug 23 09:57:48 AM UTC 24 |
5334866649 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.1952596088 |
|
|
Aug 23 09:57:46 AM UTC 24 |
Aug 23 09:57:48 AM UTC 24 |
21665196 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.493372786 |
|
|
Aug 23 09:57:46 AM UTC 24 |
Aug 23 09:57:49 AM UTC 24 |
79195054 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.1449659387 |
|
|
Aug 23 09:57:41 AM UTC 24 |
Aug 23 09:57:52 AM UTC 24 |
1430972375 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.704244516 |
|
|
Aug 23 09:57:49 AM UTC 24 |
Aug 23 09:57:52 AM UTC 24 |
21134482 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.2508344588 |
|
|
Aug 23 09:57:43 AM UTC 24 |
Aug 23 09:57:53 AM UTC 24 |
410829586 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.3995919296 |
|
|
Aug 23 09:57:43 AM UTC 24 |
Aug 23 09:57:54 AM UTC 24 |
1266158566 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.1216945854 |
|
|
Aug 23 09:57:48 AM UTC 24 |
Aug 23 09:57:56 AM UTC 24 |
65169404 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.1858394714 |
|
|
Aug 23 09:57:24 AM UTC 24 |
Aug 23 09:57:57 AM UTC 24 |
1433240243 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.1526170344 |
|
|
Aug 23 09:57:49 AM UTC 24 |
Aug 23 09:57:57 AM UTC 24 |
1179466426 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.1637099817 |
|
|
Aug 23 09:57:53 AM UTC 24 |
Aug 23 09:57:57 AM UTC 24 |
130364014 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.249072762 |
|
|
Aug 23 09:57:58 AM UTC 24 |
Aug 23 09:58:00 AM UTC 24 |
35416115 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.2708690253 |
|
|
Aug 23 09:57:54 AM UTC 24 |
Aug 23 09:58:02 AM UTC 24 |
847316379 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.3341002528 |
|
|
Aug 23 09:57:53 AM UTC 24 |
Aug 23 09:58:02 AM UTC 24 |
651044197 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3402074433 |
|
|
Aug 23 09:57:35 AM UTC 24 |
Aug 23 09:58:02 AM UTC 24 |
2090182293 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.2915935046 |
|
|
Aug 23 09:57:49 AM UTC 24 |
Aug 23 09:58:02 AM UTC 24 |
705494894 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.267554260 |
|
|
Aug 23 09:58:01 AM UTC 24 |
Aug 23 09:58:03 AM UTC 24 |
26160044 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.2766794616 |
|
|
Aug 23 09:57:48 AM UTC 24 |
Aug 23 09:58:04 AM UTC 24 |
1109196829 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.2258675820 |
|
|
Aug 23 09:57:58 AM UTC 24 |
Aug 23 09:58:04 AM UTC 24 |
514353704 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.3443492571 |
|
|
Aug 23 09:58:04 AM UTC 24 |
Aug 23 09:58:07 AM UTC 24 |
28278856 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.3477406793 |
|
|
Aug 23 09:57:55 AM UTC 24 |
Aug 23 09:58:09 AM UTC 24 |
779618872 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all.1548151828 |
|
|
Aug 23 09:57:28 AM UTC 24 |
Aug 23 09:58:09 AM UTC 24 |
1715461761 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.3987702122 |
|
|
Aug 23 09:58:04 AM UTC 24 |
Aug 23 09:58:11 AM UTC 24 |
232528993 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.1561109810 |
|
|
Aug 23 09:58:13 AM UTC 24 |
Aug 23 09:58:15 AM UTC 24 |
20741167 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.4145211346 |
|
|
Aug 23 09:58:04 AM UTC 24 |
Aug 23 09:58:15 AM UTC 24 |
4574381400 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.2310744579 |
|
|
Aug 23 09:58:04 AM UTC 24 |
Aug 23 09:58:15 AM UTC 24 |
346046362 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.3470107011 |
|
|
Aug 23 09:58:05 AM UTC 24 |
Aug 23 09:58:15 AM UTC 24 |
4469858392 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.1585416524 |
|
|
Aug 23 09:58:06 AM UTC 24 |
Aug 23 09:58:17 AM UTC 24 |
321574257 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.4180447605 |
|
|
Aug 23 09:58:16 AM UTC 24 |
Aug 23 09:58:18 AM UTC 24 |
145478475 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.4015422877 |
|
|
Aug 23 09:58:16 AM UTC 24 |
Aug 23 09:58:20 AM UTC 24 |
181696166 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.2407173691 |
|
|
Aug 23 09:58:16 AM UTC 24 |
Aug 23 09:58:20 AM UTC 24 |
400055985 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.1861167649 |
|
|
Aug 23 09:58:18 AM UTC 24 |
Aug 23 09:58:21 AM UTC 24 |
121506403 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.3036640889 |
|
|
Aug 23 09:58:08 AM UTC 24 |
Aug 23 09:58:21 AM UTC 24 |
2404591203 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all.3793088883 |
|
|
Aug 23 09:57:43 AM UTC 24 |
Aug 23 09:58:23 AM UTC 24 |
1070399236 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all_with_rand_reset.734388823 |
|
|
Aug 23 09:56:54 AM UTC 24 |
Aug 23 09:58:25 AM UTC 24 |
8759878945 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.758571739 |
|
|
Aug 23 09:58:09 AM UTC 24 |
Aug 23 09:58:28 AM UTC 24 |
776753316 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.1929139925 |
|
|
Aug 23 09:58:02 AM UTC 24 |
Aug 23 09:58:29 AM UTC 24 |
647396039 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.2259898957 |
|
|
Aug 23 09:58:21 AM UTC 24 |
Aug 23 09:58:31 AM UTC 24 |
832660149 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.500870813 |
|
|
Aug 23 09:58:21 AM UTC 24 |
Aug 23 09:58:31 AM UTC 24 |
1552128018 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all_with_rand_reset.1330405520 |
|
|
Aug 23 09:57:31 AM UTC 24 |
Aug 23 09:58:31 AM UTC 24 |
6588416594 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.1535867738 |
|
|
Aug 23 09:58:29 AM UTC 24 |
Aug 23 09:58:31 AM UTC 24 |
62181464 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1544807711 |
|
|
Aug 23 09:58:23 AM UTC 24 |
Aug 23 09:58:32 AM UTC 24 |
543587694 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.3042458395 |
|
|
Aug 23 09:58:21 AM UTC 24 |
Aug 23 09:58:33 AM UTC 24 |
3968652606 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.627880342 |
|
|
Aug 23 09:58:24 AM UTC 24 |
Aug 23 09:58:34 AM UTC 24 |
224202868 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.3641514265 |
|
|
Aug 23 09:58:31 AM UTC 24 |
Aug 23 09:58:34 AM UTC 24 |
192368395 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.346472422 |
|
|
Aug 23 09:58:19 AM UTC 24 |
Aug 23 09:58:35 AM UTC 24 |
422409158 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2553372357 |
|
|
Aug 23 09:58:33 AM UTC 24 |
Aug 23 09:58:35 AM UTC 24 |
46758130 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.3290017365 |
|
|
Aug 23 09:58:41 AM UTC 24 |
Aug 23 09:58:43 AM UTC 24 |
15883905 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.2486296574 |
|
|
Aug 23 09:58:16 AM UTC 24 |
Aug 23 09:58:36 AM UTC 24 |
680675822 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.52457668 |
|
|
Aug 23 09:58:33 AM UTC 24 |
Aug 23 09:58:37 AM UTC 24 |
529652553 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.822129588 |
|
|
Aug 23 09:58:42 AM UTC 24 |
Aug 23 09:58:44 AM UTC 24 |
14073289 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.2226754568 |
|
|
Aug 23 09:58:34 AM UTC 24 |
Aug 23 09:58:44 AM UTC 24 |
966564066 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.409896109 |
|
|
Aug 23 09:58:36 AM UTC 24 |
Aug 23 09:58:44 AM UTC 24 |
2999864791 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3145950137 |
|
|
Aug 23 09:58:36 AM UTC 24 |
Aug 23 09:58:46 AM UTC 24 |
3128745776 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.1257307015 |
|
|
Aug 23 09:58:36 AM UTC 24 |
Aug 23 09:58:46 AM UTC 24 |
409446565 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.2305507 |
|
|
Aug 23 09:58:33 AM UTC 24 |
Aug 23 09:58:49 AM UTC 24 |
2512136266 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.3258835762 |
|
|
Aug 23 09:58:46 AM UTC 24 |
Aug 23 09:58:50 AM UTC 24 |
99586246 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.164260102 |
|
|
Aug 23 09:58:36 AM UTC 24 |
Aug 23 09:58:52 AM UTC 24 |
813857694 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.1553573252 |
|
|
Aug 23 09:58:47 AM UTC 24 |
Aug 23 09:58:52 AM UTC 24 |
166477309 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.3975254026 |
|
|
Aug 23 09:58:44 AM UTC 24 |
Aug 23 09:58:53 AM UTC 24 |
300677107 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.3044120137 |
|
|
Aug 23 09:58:33 AM UTC 24 |
Aug 23 09:58:54 AM UTC 24 |
207464290 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_stress_all.2900540478 |
|
|
Aug 23 09:58:38 AM UTC 24 |
Aug 23 09:58:55 AM UTC 24 |
1778036172 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.1642740267 |
|
|
Aug 23 09:58:54 AM UTC 24 |
Aug 23 09:58:57 AM UTC 24 |
19639957 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.3344705359 |
|
|
Aug 23 09:58:47 AM UTC 24 |
Aug 23 09:58:57 AM UTC 24 |
267193199 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.2774952756 |
|
|
Aug 23 09:58:55 AM UTC 24 |
Aug 23 09:58:58 AM UTC 24 |
135750954 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.3961621811 |
|
|
Aug 23 09:58:57 AM UTC 24 |
Aug 23 09:58:59 AM UTC 24 |
23215541 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.1900662115 |
|
|
Aug 23 09:58:46 AM UTC 24 |
Aug 23 09:58:59 AM UTC 24 |
2323723249 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.1661095080 |
|
|
Aug 23 09:58:50 AM UTC 24 |
Aug 23 09:59:01 AM UTC 24 |
323071661 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.1013983618 |
|
|
Aug 23 09:58:51 AM UTC 24 |
Aug 23 09:59:01 AM UTC 24 |
354908525 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.213946803 |
|
|
Aug 23 09:58:59 AM UTC 24 |
Aug 23 09:59:02 AM UTC 24 |
31809077 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.3142364033 |
|
|
Aug 23 09:58:50 AM UTC 24 |
Aug 23 09:59:02 AM UTC 24 |
5319791140 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.2225190267 |
|
|
Aug 23 09:58:58 AM UTC 24 |
Aug 23 09:59:03 AM UTC 24 |
80764061 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.2322372991 |
|
|
Aug 23 09:59:02 AM UTC 24 |
Aug 23 09:59:05 AM UTC 24 |
79430913 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.4260180668 |
|
|
Aug 23 09:57:44 AM UTC 24 |
Aug 23 09:59:05 AM UTC 24 |
3709077761 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/49.lc_ctrl_jtag_access.3376171114 |
|
|
Aug 23 09:59:53 AM UTC 24 |
Aug 23 10:00:03 AM UTC 24 |
1260881576 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.2214247231 |
|
|
Aug 23 09:58:59 AM UTC 24 |
Aug 23 09:59:07 AM UTC 24 |
927556279 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.3424826808 |
|
|
Aug 23 09:58:44 AM UTC 24 |
Aug 23 09:59:07 AM UTC 24 |
1070526478 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.980935631 |
|
|
Aug 23 09:59:06 AM UTC 24 |
Aug 23 09:59:08 AM UTC 24 |
20263161 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.1289391801 |
|
|
Aug 23 09:59:01 AM UTC 24 |
Aug 23 09:59:08 AM UTC 24 |
458428027 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.3808997603 |
|
|
Aug 23 09:59:07 AM UTC 24 |
Aug 23 09:59:09 AM UTC 24 |
50690071 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.1742313260 |
|
|
Aug 23 09:59:07 AM UTC 24 |
Aug 23 09:59:09 AM UTC 24 |
20412032 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.3807208752 |
|
|
Aug 23 09:59:04 AM UTC 24 |
Aug 23 09:59:11 AM UTC 24 |
624003508 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.4040760144 |
|
|
Aug 23 09:59:02 AM UTC 24 |
Aug 23 09:59:12 AM UTC 24 |
2257060555 ps |