| T192 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.3299690805 |
|
|
Aug 27 08:02:16 PM UTC 24 |
Aug 27 08:02:27 PM UTC 24 |
1418804294 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.899810490 |
|
|
Aug 27 08:02:22 PM UTC 24 |
Aug 27 08:02:28 PM UTC 24 |
461876323 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_errors.1837483389 |
|
|
Aug 27 08:02:16 PM UTC 24 |
Aug 27 08:02:29 PM UTC 24 |
212084617 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.2328053466 |
|
|
Aug 27 08:02:17 PM UTC 24 |
Aug 27 08:02:30 PM UTC 24 |
443992678 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.2508155439 |
|
|
Aug 27 08:02:26 PM UTC 24 |
Aug 27 08:02:30 PM UTC 24 |
49813473 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.1339598332 |
|
|
Aug 27 08:02:16 PM UTC 24 |
Aug 27 08:02:30 PM UTC 24 |
318859624 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.1733703692 |
|
|
Aug 27 08:02:17 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
1168960701 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.62992990 |
|
|
Aug 27 08:01:56 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
1330081627 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.1678588489 |
|
|
Aug 27 08:02:18 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
1033156495 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_state_failure.3272256784 |
|
|
Aug 27 08:01:29 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
1944166156 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.3933286554 |
|
|
Aug 27 08:02:27 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
263268841 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.1069498716 |
|
|
Aug 27 08:02:09 PM UTC 24 |
Aug 27 08:02:31 PM UTC 24 |
1601446588 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3658214544 |
|
|
Aug 27 08:02:25 PM UTC 24 |
Aug 27 08:02:32 PM UTC 24 |
215543447 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.313084548 |
|
|
Aug 27 08:02:31 PM UTC 24 |
Aug 27 08:02:33 PM UTC 24 |
24305971 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/1.lc_ctrl_stress_all_with_rand_reset.410934979 |
|
|
Aug 27 08:00:25 PM UTC 24 |
Aug 27 08:02:33 PM UTC 24 |
2872143513 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.3768601034 |
|
|
Aug 27 08:02:05 PM UTC 24 |
Aug 27 08:02:34 PM UTC 24 |
3149968454 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3544516293 |
|
|
Aug 27 08:02:18 PM UTC 24 |
Aug 27 08:02:35 PM UTC 24 |
333821794 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.2960549380 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:35 PM UTC 24 |
42079094 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.168888929 |
|
|
Aug 27 08:02:28 PM UTC 24 |
Aug 27 08:02:36 PM UTC 24 |
385725688 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.956533485 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:36 PM UTC 24 |
94719344 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1859294304 |
|
|
Aug 27 08:02:24 PM UTC 24 |
Aug 27 08:02:36 PM UTC 24 |
4324691921 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.2984864354 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:37 PM UTC 24 |
160423105 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3652852314 |
|
|
Aug 27 08:02:09 PM UTC 24 |
Aug 27 08:02:38 PM UTC 24 |
982615211 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2548755640 |
|
|
Aug 27 08:02:22 PM UTC 24 |
Aug 27 08:02:38 PM UTC 24 |
81506618 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.1586795812 |
|
|
Aug 27 08:02:24 PM UTC 24 |
Aug 27 08:02:40 PM UTC 24 |
698932966 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all.3290262698 |
|
|
Aug 27 08:00:18 PM UTC 24 |
Aug 27 08:02:40 PM UTC 24 |
6608625682 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.2278960420 |
|
|
Aug 27 08:02:00 PM UTC 24 |
Aug 27 08:02:43 PM UTC 24 |
2768426334 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.2631067326 |
|
|
Aug 27 08:02:16 PM UTC 24 |
Aug 27 08:02:43 PM UTC 24 |
1246207548 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1168831296 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:43 PM UTC 24 |
643379206 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.46314709 |
|
|
Aug 27 08:02:14 PM UTC 24 |
Aug 27 08:02:43 PM UTC 24 |
291376442 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.4250414961 |
|
|
Aug 27 08:02:41 PM UTC 24 |
Aug 27 08:02:44 PM UTC 24 |
11347521 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.485964742 |
|
|
Aug 27 08:02:41 PM UTC 24 |
Aug 27 08:02:44 PM UTC 24 |
52728112 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2993395352 |
|
|
Aug 27 08:02:30 PM UTC 24 |
Aug 27 08:02:44 PM UTC 24 |
1039614537 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3559869950 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:44 PM UTC 24 |
595819049 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.606288559 |
|
|
Aug 27 08:02:34 PM UTC 24 |
Aug 27 08:02:45 PM UTC 24 |
327420221 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.128770272 |
|
|
Aug 27 08:02:17 PM UTC 24 |
Aug 27 08:02:45 PM UTC 24 |
17314818412 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.2038094552 |
|
|
Aug 27 08:02:37 PM UTC 24 |
Aug 27 08:02:46 PM UTC 24 |
670442687 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.1636695817 |
|
|
Aug 27 08:02:43 PM UTC 24 |
Aug 27 08:02:46 PM UTC 24 |
14516976 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.2089325223 |
|
|
Aug 27 08:02:37 PM UTC 24 |
Aug 27 08:02:47 PM UTC 24 |
565137451 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.1204274655 |
|
|
Aug 27 08:01:00 PM UTC 24 |
Aug 27 08:02:47 PM UTC 24 |
9979436259 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.756284258 |
|
|
Aug 27 08:02:22 PM UTC 24 |
Aug 27 08:02:47 PM UTC 24 |
4222707282 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.2990547743 |
|
|
Aug 27 08:01:58 PM UTC 24 |
Aug 27 08:02:47 PM UTC 24 |
3981806095 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3802309377 |
|
|
Aug 27 08:02:37 PM UTC 24 |
Aug 27 08:02:47 PM UTC 24 |
2568746423 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.3090190920 |
|
|
Aug 27 08:02:36 PM UTC 24 |
Aug 27 08:02:49 PM UTC 24 |
1551802968 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.1554714454 |
|
|
Aug 27 08:02:08 PM UTC 24 |
Aug 27 08:02:49 PM UTC 24 |
2029854087 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.3890944290 |
|
|
Aug 27 08:02:28 PM UTC 24 |
Aug 27 08:02:49 PM UTC 24 |
2245806376 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.2891860847 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:02:50 PM UTC 24 |
115023639 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.77861565 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:02:50 PM UTC 24 |
1122054653 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.50131321 |
|
|
Aug 27 08:01:39 PM UTC 24 |
Aug 27 08:02:50 PM UTC 24 |
20841002639 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.2239845876 |
|
|
Aug 27 08:02:46 PM UTC 24 |
Aug 27 08:02:52 PM UTC 24 |
69425000 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.1034804594 |
|
|
Aug 27 08:01:49 PM UTC 24 |
Aug 27 08:02:52 PM UTC 24 |
4156416326 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.118494796 |
|
|
Aug 27 08:02:50 PM UTC 24 |
Aug 27 08:02:52 PM UTC 24 |
51325447 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.3123296013 |
|
|
Aug 27 08:02:50 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
23678812 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.3624015817 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
598814336 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.2843891622 |
|
|
Aug 27 08:02:50 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
17861233 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.3198100658 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
381004773 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.183437766 |
|
|
Aug 27 08:02:26 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
1241831200 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.3700896775 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:02:53 PM UTC 24 |
3462810790 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/5.lc_ctrl_jtag_errors.1305265054 |
|
|
Aug 27 08:01:10 PM UTC 24 |
Aug 27 08:02:55 PM UTC 24 |
16536427447 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.937381681 |
|
|
Aug 27 08:02:37 PM UTC 24 |
Aug 27 08:02:55 PM UTC 24 |
562096658 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.3248016528 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:02:56 PM UTC 24 |
460915210 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.4266869898 |
|
|
Aug 27 08:02:48 PM UTC 24 |
Aug 27 08:02:56 PM UTC 24 |
991131190 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.2868896133 |
|
|
Aug 27 08:02:55 PM UTC 24 |
Aug 27 08:03:00 PM UTC 24 |
854416682 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.1236480853 |
|
|
Aug 27 08:02:52 PM UTC 24 |
Aug 27 08:02:56 PM UTC 24 |
203419552 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.1580621800 |
|
|
Aug 27 08:02:08 PM UTC 24 |
Aug 27 08:02:57 PM UTC 24 |
3808974257 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.466604739 |
|
|
Aug 27 08:02:53 PM UTC 24 |
Aug 27 08:02:58 PM UTC 24 |
111416156 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.2827075534 |
|
|
Aug 27 08:02:57 PM UTC 24 |
Aug 27 08:03:00 PM UTC 24 |
117240847 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.3178027442 |
|
|
Aug 27 08:02:48 PM UTC 24 |
Aug 27 08:03:01 PM UTC 24 |
1275675231 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.2251160777 |
|
|
Aug 27 08:02:59 PM UTC 24 |
Aug 27 08:03:01 PM UTC 24 |
46804666 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.4178699759 |
|
|
Aug 27 08:02:55 PM UTC 24 |
Aug 27 08:03:01 PM UTC 24 |
391296119 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.227752667 |
|
|
Aug 27 08:02:36 PM UTC 24 |
Aug 27 08:03:01 PM UTC 24 |
841703332 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1592196967 |
|
|
Aug 27 08:02:53 PM UTC 24 |
Aug 27 08:03:03 PM UTC 24 |
208594581 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.442867968 |
|
|
Aug 27 08:02:52 PM UTC 24 |
Aug 27 08:03:03 PM UTC 24 |
174487882 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.1701579345 |
|
|
Aug 27 08:02:46 PM UTC 24 |
Aug 27 08:03:03 PM UTC 24 |
1163915665 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.1378541814 |
|
|
Aug 27 08:01:33 PM UTC 24 |
Aug 27 08:03:03 PM UTC 24 |
11826425737 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.2359563308 |
|
|
Aug 27 08:02:59 PM UTC 24 |
Aug 27 08:03:04 PM UTC 24 |
54331128 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.1578237512 |
|
|
Aug 27 08:02:33 PM UTC 24 |
Aug 27 08:03:04 PM UTC 24 |
885675021 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.258451930 |
|
|
Aug 27 08:02:48 PM UTC 24 |
Aug 27 08:03:04 PM UTC 24 |
544985037 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.2329754876 |
|
|
Aug 27 08:02:16 PM UTC 24 |
Aug 27 08:03:04 PM UTC 24 |
1158162878 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.1624429246 |
|
|
Aug 27 08:02:31 PM UTC 24 |
Aug 27 08:03:04 PM UTC 24 |
944149570 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.3804754292 |
|
|
Aug 27 08:02:55 PM UTC 24 |
Aug 27 08:03:05 PM UTC 24 |
744361660 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.3336353215 |
|
|
Aug 27 08:02:53 PM UTC 24 |
Aug 27 08:03:05 PM UTC 24 |
270190454 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.3998335656 |
|
|
Aug 27 08:03:02 PM UTC 24 |
Aug 27 08:03:05 PM UTC 24 |
41768243 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.636754373 |
|
|
Aug 27 08:02:27 PM UTC 24 |
Aug 27 08:03:07 PM UTC 24 |
9875764918 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.2927448914 |
|
|
Aug 27 08:03:01 PM UTC 24 |
Aug 27 08:03:08 PM UTC 24 |
296231923 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.844279946 |
|
|
Aug 27 08:02:56 PM UTC 24 |
Aug 27 08:03:09 PM UTC 24 |
278151210 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.2718937374 |
|
|
Aug 27 08:03:07 PM UTC 24 |
Aug 27 08:03:09 PM UTC 24 |
13758987 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.1950246338 |
|
|
Aug 27 08:02:56 PM UTC 24 |
Aug 27 08:03:09 PM UTC 24 |
739450053 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2585723213 |
|
|
Aug 27 08:03:07 PM UTC 24 |
Aug 27 08:03:10 PM UTC 24 |
180107697 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.2552694332 |
|
|
Aug 27 08:01:54 PM UTC 24 |
Aug 27 08:03:10 PM UTC 24 |
7922043244 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2472269847 |
|
|
Aug 27 08:03:07 PM UTC 24 |
Aug 27 08:03:10 PM UTC 24 |
49320527 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.3518239974 |
|
|
Aug 27 08:03:04 PM UTC 24 |
Aug 27 08:03:10 PM UTC 24 |
184840810 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.3165553207 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:03:11 PM UTC 24 |
841652003 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.3775534796 |
|
|
Aug 27 08:03:02 PM UTC 24 |
Aug 27 08:03:11 PM UTC 24 |
185927045 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.2907100656 |
|
|
Aug 27 08:03:02 PM UTC 24 |
Aug 27 08:03:12 PM UTC 24 |
1147544062 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.2515524641 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:03:12 PM UTC 24 |
212477449 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.4082621969 |
|
|
Aug 27 08:03:10 PM UTC 24 |
Aug 27 08:03:14 PM UTC 24 |
84185773 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.3268618962 |
|
|
Aug 27 08:03:30 PM UTC 24 |
Aug 27 08:03:44 PM UTC 24 |
431839896 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.1309418581 |
|
|
Aug 27 08:03:02 PM UTC 24 |
Aug 27 08:03:15 PM UTC 24 |
1467945705 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.377008898 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:03:15 PM UTC 24 |
1144434523 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.2026205057 |
|
|
Aug 27 08:02:46 PM UTC 24 |
Aug 27 08:03:17 PM UTC 24 |
1131984036 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.1881169541 |
|
|
Aug 27 08:03:04 PM UTC 24 |
Aug 27 08:03:17 PM UTC 24 |
1059208021 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.3590514905 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:03:17 PM UTC 24 |
992611575 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.1045675323 |
|
|
Aug 27 08:03:11 PM UTC 24 |
Aug 27 08:03:18 PM UTC 24 |
1579108225 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.4080303316 |
|
|
Aug 27 08:02:53 PM UTC 24 |
Aug 27 08:03:44 PM UTC 24 |
2161485487 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.358120275 |
|
|
Aug 27 08:03:16 PM UTC 24 |
Aug 27 08:03:18 PM UTC 24 |
94280288 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.372707663 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:03:19 PM UTC 24 |
388620460 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1134482747 |
|
|
Aug 27 08:03:18 PM UTC 24 |
Aug 27 08:03:20 PM UTC 24 |
13882624 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.1937150898 |
|
|
Aug 27 08:03:09 PM UTC 24 |
Aug 27 08:03:20 PM UTC 24 |
198920020 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.1221408048 |
|
|
Aug 27 08:03:18 PM UTC 24 |
Aug 27 08:03:21 PM UTC 24 |
17751460 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.1684597383 |
|
|
Aug 27 08:02:36 PM UTC 24 |
Aug 27 08:03:22 PM UTC 24 |
22594951573 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.1525037615 |
|
|
Aug 27 08:03:10 PM UTC 24 |
Aug 27 08:03:23 PM UTC 24 |
1262040795 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.3416470107 |
|
|
Aug 27 08:02:55 PM UTC 24 |
Aug 27 08:03:23 PM UTC 24 |
5921616446 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.268479233 |
|
|
Aug 27 08:03:19 PM UTC 24 |
Aug 27 08:03:24 PM UTC 24 |
283068271 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.3812222592 |
|
|
Aug 27 08:03:11 PM UTC 24 |
Aug 27 08:03:24 PM UTC 24 |
1057980297 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.2618910329 |
|
|
Aug 27 08:02:52 PM UTC 24 |
Aug 27 08:03:25 PM UTC 24 |
681152446 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.1625223188 |
|
|
Aug 27 08:03:11 PM UTC 24 |
Aug 27 08:03:25 PM UTC 24 |
1870752296 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.2366421813 |
|
|
Aug 27 08:02:46 PM UTC 24 |
Aug 27 08:03:26 PM UTC 24 |
24984728678 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1892599118 |
|
|
Aug 27 08:02:54 PM UTC 24 |
Aug 27 08:03:26 PM UTC 24 |
840029130 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.1218331369 |
|
|
Aug 27 08:03:19 PM UTC 24 |
Aug 27 08:03:27 PM UTC 24 |
195839778 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.2436297333 |
|
|
Aug 27 08:02:26 PM UTC 24 |
Aug 27 08:03:28 PM UTC 24 |
1761044230 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.1837572286 |
|
|
Aug 27 08:03:13 PM UTC 24 |
Aug 27 08:03:29 PM UTC 24 |
2309574357 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.735251607 |
|
|
Aug 27 08:03:20 PM UTC 24 |
Aug 27 08:03:29 PM UTC 24 |
515997389 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1568114404 |
|
|
Aug 27 08:02:34 PM UTC 24 |
Aug 27 08:03:29 PM UTC 24 |
1115479008 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.3200482556 |
|
|
Aug 27 08:03:27 PM UTC 24 |
Aug 27 08:03:29 PM UTC 24 |
18180217 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.733716574 |
|
|
Aug 27 08:03:14 PM UTC 24 |
Aug 27 08:03:30 PM UTC 24 |
821016776 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.2833830415 |
|
|
Aug 27 08:03:13 PM UTC 24 |
Aug 27 08:03:30 PM UTC 24 |
335801304 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.3307259386 |
|
|
Aug 27 08:02:40 PM UTC 24 |
Aug 27 08:03:31 PM UTC 24 |
1792207217 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.3567688344 |
|
|
Aug 27 08:03:29 PM UTC 24 |
Aug 27 08:03:31 PM UTC 24 |
28028920 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.4174099393 |
|
|
Aug 27 08:03:28 PM UTC 24 |
Aug 27 08:03:32 PM UTC 24 |
166036946 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.2784612591 |
|
|
Aug 27 08:03:20 PM UTC 24 |
Aug 27 08:03:34 PM UTC 24 |
327405021 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.1710567306 |
|
|
Aug 27 08:03:01 PM UTC 24 |
Aug 27 08:03:35 PM UTC 24 |
975941027 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.3661669447 |
|
|
Aug 27 08:03:25 PM UTC 24 |
Aug 27 08:03:35 PM UTC 24 |
181740265 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.715748596 |
|
|
Aug 27 08:03:25 PM UTC 24 |
Aug 27 08:03:35 PM UTC 24 |
952517555 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.2346759863 |
|
|
Aug 27 08:03:30 PM UTC 24 |
Aug 27 08:03:36 PM UTC 24 |
239886985 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.4246050035 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:03:37 PM UTC 24 |
1598918194 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.509223369 |
|
|
Aug 27 08:03:36 PM UTC 24 |
Aug 27 08:03:38 PM UTC 24 |
81492459 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.2702605226 |
|
|
Aug 27 08:03:15 PM UTC 24 |
Aug 27 08:03:39 PM UTC 24 |
2804587706 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.996566916 |
|
|
Aug 27 08:03:37 PM UTC 24 |
Aug 27 08:03:39 PM UTC 24 |
19397420 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.363990956 |
|
|
Aug 27 08:03:24 PM UTC 24 |
Aug 27 08:03:40 PM UTC 24 |
559281388 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.1665764210 |
|
|
Aug 27 08:03:36 PM UTC 24 |
Aug 27 08:03:40 PM UTC 24 |
114613783 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.499198207 |
|
|
Aug 27 08:03:23 PM UTC 24 |
Aug 27 08:03:41 PM UTC 24 |
2457650041 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.736942333 |
|
|
Aug 27 08:03:09 PM UTC 24 |
Aug 27 08:03:41 PM UTC 24 |
1213905263 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.1046308389 |
|
|
Aug 27 08:03:11 PM UTC 24 |
Aug 27 08:03:42 PM UTC 24 |
1377148241 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.211279382 |
|
|
Aug 27 08:03:19 PM UTC 24 |
Aug 27 08:03:43 PM UTC 24 |
1376495266 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.3256295176 |
|
|
Aug 27 08:02:48 PM UTC 24 |
Aug 27 08:03:44 PM UTC 24 |
11133571671 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.3961393340 |
|
|
Aug 27 08:04:04 PM UTC 24 |
Aug 27 08:04:21 PM UTC 24 |
5349705988 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.4231994717 |
|
|
Aug 27 08:03:25 PM UTC 24 |
Aug 27 08:03:44 PM UTC 24 |
456408086 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1798280963 |
|
|
Aug 27 08:03:31 PM UTC 24 |
Aug 27 08:03:45 PM UTC 24 |
1731822800 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.678577330 |
|
|
Aug 27 08:03:39 PM UTC 24 |
Aug 27 08:03:45 PM UTC 24 |
88020572 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.3571097238 |
|
|
Aug 27 08:03:33 PM UTC 24 |
Aug 27 08:03:46 PM UTC 24 |
518301881 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.2651100692 |
|
|
Aug 27 08:03:32 PM UTC 24 |
Aug 27 08:03:48 PM UTC 24 |
1490705336 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.3193743010 |
|
|
Aug 27 08:03:41 PM UTC 24 |
Aug 27 08:03:48 PM UTC 24 |
1295937416 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.4158115724 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:03:48 PM UTC 24 |
19386429 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.2099696641 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:03:48 PM UTC 24 |
47145183 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.2559177656 |
|
|
Aug 27 08:03:32 PM UTC 24 |
Aug 27 08:03:49 PM UTC 24 |
345326620 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.3256388726 |
|
|
Aug 27 08:03:30 PM UTC 24 |
Aug 27 08:03:49 PM UTC 24 |
1307357860 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.2282763512 |
|
|
Aug 27 08:03:39 PM UTC 24 |
Aug 27 08:03:49 PM UTC 24 |
80479071 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1315754854 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:03:50 PM UTC 24 |
133559503 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1275430622 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:03:50 PM UTC 24 |
27088351 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.1300411620 |
|
|
Aug 27 08:03:40 PM UTC 24 |
Aug 27 08:03:51 PM UTC 24 |
1586499627 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.34713509 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:03:51 PM UTC 24 |
80292325 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.594995070 |
|
|
Aug 27 08:03:50 PM UTC 24 |
Aug 27 08:03:52 PM UTC 24 |
140690977 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.3982452503 |
|
|
Aug 27 08:03:21 PM UTC 24 |
Aug 27 08:03:53 PM UTC 24 |
16688358890 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.3641193291 |
|
|
Aug 27 08:03:32 PM UTC 24 |
Aug 27 08:03:53 PM UTC 24 |
2576684474 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.288579777 |
|
|
Aug 27 08:03:43 PM UTC 24 |
Aug 27 08:03:53 PM UTC 24 |
580611899 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.1995234010 |
|
|
Aug 27 08:03:52 PM UTC 24 |
Aug 27 08:03:54 PM UTC 24 |
15164908 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.572321664 |
|
|
Aug 27 08:01:45 PM UTC 24 |
Aug 27 08:03:55 PM UTC 24 |
3021246580 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.3072425381 |
|
|
Aug 27 08:03:42 PM UTC 24 |
Aug 27 08:03:55 PM UTC 24 |
203638168 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.2624489146 |
|
|
Aug 27 08:03:51 PM UTC 24 |
Aug 27 08:03:55 PM UTC 24 |
113229880 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.3512637703 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:17 PM UTC 24 |
1079435765 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.1639619641 |
|
|
Aug 27 08:01:24 PM UTC 24 |
Aug 27 08:03:56 PM UTC 24 |
4259618678 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.298769727 |
|
|
Aug 27 08:03:43 PM UTC 24 |
Aug 27 08:03:57 PM UTC 24 |
1634041037 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.2161544333 |
|
|
Aug 27 08:03:39 PM UTC 24 |
Aug 27 08:03:57 PM UTC 24 |
377894231 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.3790830962 |
|
|
Aug 27 08:03:03 PM UTC 24 |
Aug 27 08:03:57 PM UTC 24 |
15045667604 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.1482269080 |
|
|
Aug 27 08:03:54 PM UTC 24 |
Aug 27 08:03:57 PM UTC 24 |
23552519 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.2708520999 |
|
|
Aug 27 08:03:54 PM UTC 24 |
Aug 27 08:03:58 PM UTC 24 |
259616694 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.990026934 |
|
|
Aug 27 08:03:47 PM UTC 24 |
Aug 27 08:03:58 PM UTC 24 |
1095183749 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.2416150455 |
|
|
Aug 27 08:03:19 PM UTC 24 |
Aug 27 08:03:58 PM UTC 24 |
415906827 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1567985813 |
|
|
Aug 27 08:03:49 PM UTC 24 |
Aug 27 08:03:59 PM UTC 24 |
936430599 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.3703255645 |
|
|
Aug 27 08:03:49 PM UTC 24 |
Aug 27 08:03:59 PM UTC 24 |
836661562 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.2371949108 |
|
|
Aug 27 08:03:24 PM UTC 24 |
Aug 27 08:04:00 PM UTC 24 |
1869737729 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.3666403637 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:00 PM UTC 24 |
15351266 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1461229369 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:00 PM UTC 24 |
38273289 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.804996618 |
|
|
Aug 27 08:03:50 PM UTC 24 |
Aug 27 08:04:01 PM UTC 24 |
393960180 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.595488603 |
|
|
Aug 27 08:03:30 PM UTC 24 |
Aug 27 08:04:01 PM UTC 24 |
242123535 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.2500796878 |
|
|
Aug 27 08:03:53 PM UTC 24 |
Aug 27 08:04:01 PM UTC 24 |
90870578 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.2154908600 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:02 PM UTC 24 |
43499635 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.2187318245 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:03 PM UTC 24 |
178690977 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.3058539461 |
|
|
Aug 27 08:04:00 PM UTC 24 |
Aug 27 08:04:03 PM UTC 24 |
50425495 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.2044907193 |
|
|
Aug 27 08:04:13 PM UTC 24 |
Aug 27 08:04:18 PM UTC 24 |
57030034 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.3003799318 |
|
|
Aug 27 08:03:49 PM UTC 24 |
Aug 27 08:04:03 PM UTC 24 |
1103100184 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.300243866 |
|
|
Aug 27 08:03:55 PM UTC 24 |
Aug 27 08:04:04 PM UTC 24 |
180282830 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.197101096 |
|
|
Aug 27 08:03:56 PM UTC 24 |
Aug 27 08:04:04 PM UTC 24 |
763369786 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.517504688 |
|
|
Aug 27 08:04:03 PM UTC 24 |
Aug 27 08:04:05 PM UTC 24 |
21191283 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/1.lc_ctrl_stress_all.2161412287 |
|
|
Aug 27 08:00:25 PM UTC 24 |
Aug 27 08:04:05 PM UTC 24 |
8779562228 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.1538790777 |
|
|
Aug 27 08:03:54 PM UTC 24 |
Aug 27 08:04:05 PM UTC 24 |
1044737913 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.967176034 |
|
|
Aug 27 08:03:49 PM UTC 24 |
Aug 27 08:04:05 PM UTC 24 |
1434542648 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.2837594067 |
|
|
Aug 27 08:02:31 PM UTC 24 |
Aug 27 08:04:06 PM UTC 24 |
11119417377 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.3567713752 |
|
|
Aug 27 08:04:03 PM UTC 24 |
Aug 27 08:04:06 PM UTC 24 |
23659366 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.1051230778 |
|
|
Aug 27 08:03:56 PM UTC 24 |
Aug 27 08:04:07 PM UTC 24 |
590972333 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.2709757524 |
|
|
Aug 27 08:02:45 PM UTC 24 |
Aug 27 08:04:07 PM UTC 24 |
2235576944 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.434645263 |
|
|
Aug 27 08:04:00 PM UTC 24 |
Aug 27 08:04:07 PM UTC 24 |
354062264 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3408906721 |
|
|
Aug 27 08:04:04 PM UTC 24 |
Aug 27 08:04:07 PM UTC 24 |
17462528 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2278706324 |
|
|
Aug 27 08:04:05 PM UTC 24 |
Aug 27 08:04:18 PM UTC 24 |
1182006987 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.2049068134 |
|
|
Aug 27 08:04:04 PM UTC 24 |
Aug 27 08:04:08 PM UTC 24 |
19408139 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.1577304209 |
|
|
Aug 27 08:03:54 PM UTC 24 |
Aug 27 08:04:08 PM UTC 24 |
1597705593 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.2152134043 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:08 PM UTC 24 |
50225169 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.1105198728 |
|
|
Aug 27 08:02:57 PM UTC 24 |
Aug 27 08:04:09 PM UTC 24 |
6410909244 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.4014480954 |
|
|
Aug 27 08:03:38 PM UTC 24 |
Aug 27 08:04:10 PM UTC 24 |
236062469 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all.779994609 |
|
|
Aug 27 08:01:12 PM UTC 24 |
Aug 27 08:04:10 PM UTC 24 |
24138749513 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.185105821 |
|
|
Aug 27 08:04:05 PM UTC 24 |
Aug 27 08:04:11 PM UTC 24 |
392022783 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2538207479 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:11 PM UTC 24 |
37672942 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.2500149922 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:11 PM UTC 24 |
22356385 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.2168758920 |
|
|
Aug 27 08:04:00 PM UTC 24 |
Aug 27 08:04:12 PM UTC 24 |
1029534329 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.2267073556 |
|
|
Aug 27 08:03:11 PM UTC 24 |
Aug 27 08:04:12 PM UTC 24 |
4754852290 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.3516115399 |
|
|
Aug 27 08:04:01 PM UTC 24 |
Aug 27 08:04:12 PM UTC 24 |
1857116031 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.259084875 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:12 PM UTC 24 |
325145232 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.3286315425 |
|
|
Aug 27 08:04:01 PM UTC 24 |
Aug 27 08:04:13 PM UTC 24 |
1498986992 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.1283864883 |
|
|
Aug 27 08:04:12 PM UTC 24 |
Aug 27 08:04:14 PM UTC 24 |
40190118 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2340312328 |
|
|
Aug 27 08:04:01 PM UTC 24 |
Aug 27 08:04:14 PM UTC 24 |
871821498 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.3883032407 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:16 PM UTC 24 |
87839366 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.2758965927 |
|
|
Aug 27 08:04:04 PM UTC 24 |
Aug 27 08:04:16 PM UTC 24 |
168515084 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1993609414 |
|
|
Aug 27 08:04:13 PM UTC 24 |
Aug 27 08:04:16 PM UTC 24 |
41219623 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.2466364739 |
|
|
Aug 27 08:04:13 PM UTC 24 |
Aug 27 08:04:17 PM UTC 24 |
62213034 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.1512443046 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:19 PM UTC 24 |
1522129134 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.4092213187 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:20 PM UTC 24 |
92609769 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.1560997270 |
|
|
Aug 27 08:04:18 PM UTC 24 |
Aug 27 08:04:21 PM UTC 24 |
20473218 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3658140040 |
|
|
Aug 27 08:04:20 PM UTC 24 |
Aug 27 08:04:22 PM UTC 24 |
11957371 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.504600080 |
|
|
Aug 27 08:04:10 PM UTC 24 |
Aug 27 08:04:22 PM UTC 24 |
3995046608 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3426361580 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:23 PM UTC 24 |
1986194732 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.713146500 |
|
|
Aug 27 08:04:13 PM UTC 24 |
Aug 27 08:04:25 PM UTC 24 |
130334632 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.780507768 |
|
|
Aug 27 08:04:10 PM UTC 24 |
Aug 27 08:04:25 PM UTC 24 |
2314221179 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.949757267 |
|
|
Aug 27 08:04:10 PM UTC 24 |
Aug 27 08:04:26 PM UTC 24 |
551577179 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.1133884875 |
|
|
Aug 27 08:04:20 PM UTC 24 |
Aug 27 08:04:26 PM UTC 24 |
221743522 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1169246079 |
|
|
Aug 27 08:04:22 PM UTC 24 |
Aug 27 08:04:26 PM UTC 24 |
50458997 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3442373012 |
|
|
Aug 27 08:04:23 PM UTC 24 |
Aug 27 08:04:27 PM UTC 24 |
48915406 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.471694933 |
|
|
Aug 27 08:04:17 PM UTC 24 |
Aug 27 08:04:27 PM UTC 24 |
1301814051 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.1968068754 |
|
|
Aug 27 08:04:17 PM UTC 24 |
Aug 27 08:04:27 PM UTC 24 |
685779789 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.3217970667 |
|
|
Aug 27 08:04:12 PM UTC 24 |
Aug 27 08:04:28 PM UTC 24 |
4521642596 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.3396414591 |
|
|
Aug 27 08:04:27 PM UTC 24 |
Aug 27 08:04:30 PM UTC 24 |
51612392 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.530543119 |
|
|
Aug 27 08:03:58 PM UTC 24 |
Aug 27 08:04:30 PM UTC 24 |
665738493 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.84374405 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:04:30 PM UTC 24 |
277348636 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.3559723335 |
|
|
Aug 27 08:04:10 PM UTC 24 |
Aug 27 08:04:30 PM UTC 24 |
981634023 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.80933213 |
|
|
Aug 27 08:04:14 PM UTC 24 |
Aug 27 08:04:31 PM UTC 24 |
726349190 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.2324457237 |
|
|
Aug 27 08:04:10 PM UTC 24 |
Aug 27 08:04:31 PM UTC 24 |
1757000357 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.2657941742 |
|
|
Aug 27 08:04:16 PM UTC 24 |
Aug 27 08:04:31 PM UTC 24 |
800454846 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1312002303 |
|
|
Aug 27 08:04:28 PM UTC 24 |
Aug 27 08:04:31 PM UTC 24 |
26009643 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2399723939 |
|
|
Aug 27 08:04:27 PM UTC 24 |
Aug 27 08:04:31 PM UTC 24 |
222359773 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.509622930 |
|
|
Aug 27 08:04:21 PM UTC 24 |
Aug 27 08:04:32 PM UTC 24 |
84013226 ps |