| T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.61433585 |
|
|
Aug 27 08:03:52 PM UTC 24 |
Aug 27 08:04:32 PM UTC 24 |
635202932 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.2475237101 |
|
|
Aug 27 08:04:17 PM UTC 24 |
Aug 27 08:04:34 PM UTC 24 |
576455617 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.2346715686 |
|
|
Aug 27 08:04:23 PM UTC 24 |
Aug 27 08:04:35 PM UTC 24 |
628055241 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all_with_rand_reset.4292591466 |
|
|
Aug 27 08:03:36 PM UTC 24 |
Aug 27 08:04:35 PM UTC 24 |
1984745243 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.4241288863 |
|
|
Aug 27 08:04:04 PM UTC 24 |
Aug 27 08:04:35 PM UTC 24 |
758307354 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.1658571675 |
|
|
Aug 27 08:04:33 PM UTC 24 |
Aug 27 08:04:35 PM UTC 24 |
108957579 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.3938679051 |
|
|
Aug 27 08:04:25 PM UTC 24 |
Aug 27 08:04:36 PM UTC 24 |
353822307 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.2884160859 |
|
|
Aug 27 08:04:18 PM UTC 24 |
Aug 27 08:04:36 PM UTC 24 |
2278671437 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.2652561358 |
|
|
Aug 27 08:04:22 PM UTC 24 |
Aug 27 08:04:36 PM UTC 24 |
257193387 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.481103597 |
|
|
Aug 27 08:04:34 PM UTC 24 |
Aug 27 08:04:36 PM UTC 24 |
88872289 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.349897712 |
|
|
Aug 27 08:04:33 PM UTC 24 |
Aug 27 08:04:37 PM UTC 24 |
179433438 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.2993544195 |
|
|
Aug 27 08:04:31 PM UTC 24 |
Aug 27 08:04:37 PM UTC 24 |
699566719 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.325486517 |
|
|
Aug 27 08:04:35 PM UTC 24 |
Aug 27 08:04:40 PM UTC 24 |
90260125 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.3449283065 |
|
|
Aug 27 08:04:24 PM UTC 24 |
Aug 27 08:04:40 PM UTC 24 |
1754909986 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.199825951 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:41 PM UTC 24 |
25738776 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.1605308743 |
|
|
Aug 27 08:04:31 PM UTC 24 |
Aug 27 08:04:41 PM UTC 24 |
428014103 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.1463192739 |
|
|
Aug 27 08:04:31 PM UTC 24 |
Aug 27 08:04:41 PM UTC 24 |
940377891 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.2511451234 |
|
|
Aug 27 08:04:32 PM UTC 24 |
Aug 27 08:04:43 PM UTC 24 |
1743000795 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.1971462880 |
|
|
Aug 27 08:04:27 PM UTC 24 |
Aug 27 08:04:43 PM UTC 24 |
659699443 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.2276185760 |
|
|
Aug 27 08:03:50 PM UTC 24 |
Aug 27 08:04:43 PM UTC 24 |
7822947850 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.3032006429 |
|
|
Aug 27 08:04:41 PM UTC 24 |
Aug 27 08:04:43 PM UTC 24 |
16480103 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.1791932184 |
|
|
Aug 27 08:03:44 PM UTC 24 |
Aug 27 08:04:43 PM UTC 24 |
7902665541 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.483180349 |
|
|
Aug 27 08:04:32 PM UTC 24 |
Aug 27 08:04:44 PM UTC 24 |
910430970 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.1113130980 |
|
|
Aug 27 08:04:42 PM UTC 24 |
Aug 27 08:04:44 PM UTC 24 |
18813486 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.3054283116 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:45 PM UTC 24 |
3101758702 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.2873590155 |
|
|
Aug 27 08:04:32 PM UTC 24 |
Aug 27 08:04:45 PM UTC 24 |
1291365647 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.3218684875 |
|
|
Aug 27 08:04:28 PM UTC 24 |
Aug 27 08:04:46 PM UTC 24 |
72613494 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.2984741678 |
|
|
Aug 27 08:04:42 PM UTC 24 |
Aug 27 08:04:46 PM UTC 24 |
30116088 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.2900813658 |
|
|
Aug 27 08:03:34 PM UTC 24 |
Aug 27 08:04:47 PM UTC 24 |
2707434017 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1559174364 |
|
|
Aug 27 08:04:42 PM UTC 24 |
Aug 27 08:04:47 PM UTC 24 |
283233222 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.2087292833 |
|
|
Aug 27 08:04:13 PM UTC 24 |
Aug 27 08:04:48 PM UTC 24 |
1269689945 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.1434420500 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:48 PM UTC 24 |
321916634 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.2519204342 |
|
|
Aug 27 08:04:47 PM UTC 24 |
Aug 27 08:04:49 PM UTC 24 |
20240326 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.1747590116 |
|
|
Aug 27 08:04:42 PM UTC 24 |
Aug 27 08:04:49 PM UTC 24 |
431010284 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.1178389203 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:50 PM UTC 24 |
988625341 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.2146181279 |
|
|
Aug 27 08:04:48 PM UTC 24 |
Aug 27 08:04:50 PM UTC 24 |
17968880 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.206230773 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:50 PM UTC 24 |
376895995 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.2803835024 |
|
|
Aug 27 08:04:47 PM UTC 24 |
Aug 27 08:04:51 PM UTC 24 |
235513146 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.3864959427 |
|
|
Aug 27 08:04:44 PM UTC 24 |
Aug 27 08:04:51 PM UTC 24 |
3436871428 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.3736904849 |
|
|
Aug 27 08:04:31 PM UTC 24 |
Aug 27 08:04:52 PM UTC 24 |
4932301280 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.997816157 |
|
|
Aug 27 08:04:48 PM UTC 24 |
Aug 27 08:04:53 PM UTC 24 |
55103509 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.3027333096 |
|
|
Aug 27 08:04:08 PM UTC 24 |
Aug 27 08:04:53 PM UTC 24 |
264840258 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.1511537636 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:54 PM UTC 24 |
4369272029 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.3936085949 |
|
|
Aug 27 08:04:49 PM UTC 24 |
Aug 27 08:04:55 PM UTC 24 |
101786580 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.1018378776 |
|
|
Aug 27 08:04:51 PM UTC 24 |
Aug 27 08:04:55 PM UTC 24 |
1224645474 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.3481644730 |
|
|
Aug 27 08:04:53 PM UTC 24 |
Aug 27 08:04:55 PM UTC 24 |
32719167 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.3513130309 |
|
|
Aug 27 08:04:44 PM UTC 24 |
Aug 27 08:04:56 PM UTC 24 |
3965629143 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3374575876 |
|
|
Aug 27 08:04:37 PM UTC 24 |
Aug 27 08:04:56 PM UTC 24 |
1951428794 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.1268238237 |
|
|
Aug 27 08:04:45 PM UTC 24 |
Aug 27 08:04:56 PM UTC 24 |
1222791542 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.269415499 |
|
|
Aug 27 08:04:44 PM UTC 24 |
Aug 27 08:04:57 PM UTC 24 |
818066106 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.2580587260 |
|
|
Aug 27 08:03:07 PM UTC 24 |
Aug 27 08:04:57 PM UTC 24 |
12558882205 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.1683179973 |
|
|
Aug 27 08:04:55 PM UTC 24 |
Aug 27 08:04:57 PM UTC 24 |
13121151 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.645768026 |
|
|
Aug 27 08:04:35 PM UTC 24 |
Aug 27 08:04:57 PM UTC 24 |
201442219 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.4009000759 |
|
|
Aug 27 08:04:55 PM UTC 24 |
Aug 27 08:04:59 PM UTC 24 |
46108687 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.3979308193 |
|
|
Aug 27 08:04:56 PM UTC 24 |
Aug 27 08:04:59 PM UTC 24 |
167011917 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.1298804548 |
|
|
Aug 27 08:04:20 PM UTC 24 |
Aug 27 08:05:00 PM UTC 24 |
323643856 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.2786538021 |
|
|
Aug 27 08:04:52 PM UTC 24 |
Aug 27 08:05:00 PM UTC 24 |
234402306 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_stress_all.3135071076 |
|
|
Aug 27 08:05:24 PM UTC 24 |
Aug 27 08:05:35 PM UTC 24 |
1054021861 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.951722884 |
|
|
Aug 27 08:04:45 PM UTC 24 |
Aug 27 08:05:01 PM UTC 24 |
270462318 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.2034351292 |
|
|
Aug 27 08:04:52 PM UTC 24 |
Aug 27 08:05:02 PM UTC 24 |
278491472 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.2023814574 |
|
|
Aug 27 08:04:49 PM UTC 24 |
Aug 27 08:05:02 PM UTC 24 |
621300202 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.1308691385 |
|
|
Aug 27 08:05:23 PM UTC 24 |
Aug 27 08:05:35 PM UTC 24 |
513325250 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.1376445343 |
|
|
Aug 27 08:05:00 PM UTC 24 |
Aug 27 08:05:03 PM UTC 24 |
17841922 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_errors.1460548763 |
|
|
Aug 27 08:04:44 PM UTC 24 |
Aug 27 08:05:03 PM UTC 24 |
675460855 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.2500269105 |
|
|
Aug 27 08:05:00 PM UTC 24 |
Aug 27 08:05:03 PM UTC 24 |
47670260 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.3131695889 |
|
|
Aug 27 08:05:00 PM UTC 24 |
Aug 27 08:05:04 PM UTC 24 |
63031869 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.107751941 |
|
|
Aug 27 08:04:51 PM UTC 24 |
Aug 27 08:05:06 PM UTC 24 |
790966144 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.3002300297 |
|
|
Aug 27 08:04:57 PM UTC 24 |
Aug 27 08:05:06 PM UTC 24 |
566193085 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.3259945264 |
|
|
Aug 27 08:04:01 PM UTC 24 |
Aug 27 08:05:06 PM UTC 24 |
2575902566 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.2775444182 |
|
|
Aug 27 08:04:58 PM UTC 24 |
Aug 27 08:05:06 PM UTC 24 |
3777542780 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.4116618289 |
|
|
Aug 27 08:02:03 PM UTC 24 |
Aug 27 08:05:06 PM UTC 24 |
4033211683 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.3829789923 |
|
|
Aug 27 08:05:02 PM UTC 24 |
Aug 27 08:05:07 PM UTC 24 |
50762071 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1758179261 |
|
|
Aug 27 08:04:56 PM UTC 24 |
Aug 27 08:05:07 PM UTC 24 |
439492364 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.1696561750 |
|
|
Aug 27 08:05:02 PM UTC 24 |
Aug 27 08:05:07 PM UTC 24 |
128211807 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.1497003909 |
|
|
Aug 27 08:04:58 PM UTC 24 |
Aug 27 08:05:08 PM UTC 24 |
344900992 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.3832488800 |
|
|
Aug 27 08:05:06 PM UTC 24 |
Aug 27 08:05:08 PM UTC 24 |
37863966 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.640813000 |
|
|
Aug 27 08:03:46 PM UTC 24 |
Aug 27 08:05:10 PM UTC 24 |
16126155040 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.1139373078 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:10 PM UTC 24 |
41944473 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.792657604 |
|
|
Aug 27 08:04:52 PM UTC 24 |
Aug 27 08:05:10 PM UTC 24 |
685630527 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.3166719864 |
|
|
Aug 27 08:04:42 PM UTC 24 |
Aug 27 08:05:11 PM UTC 24 |
2713027118 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.1748200818 |
|
|
Aug 27 08:05:04 PM UTC 24 |
Aug 27 08:05:12 PM UTC 24 |
670389721 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.2373772518 |
|
|
Aug 27 08:04:58 PM UTC 24 |
Aug 27 08:05:12 PM UTC 24 |
1398316311 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.190241067 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:13 PM UTC 24 |
336147699 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.3848833027 |
|
|
Aug 27 08:04:28 PM UTC 24 |
Aug 27 08:05:13 PM UTC 24 |
260844640 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.1448493458 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:13 PM UTC 24 |
243950105 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.1679290938 |
|
|
Aug 27 08:04:58 PM UTC 24 |
Aug 27 08:05:14 PM UTC 24 |
835511554 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.250559746 |
|
|
Aug 27 08:05:04 PM UTC 24 |
Aug 27 08:05:14 PM UTC 24 |
528763089 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.1225887092 |
|
|
Aug 27 08:05:04 PM UTC 24 |
Aug 27 08:05:14 PM UTC 24 |
1053296926 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.4077025424 |
|
|
Aug 27 08:05:03 PM UTC 24 |
Aug 27 08:05:15 PM UTC 24 |
1230574237 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all_with_rand_reset.2850488424 |
|
|
Aug 27 08:04:47 PM UTC 24 |
Aug 27 08:05:15 PM UTC 24 |
781778810 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.3899702441 |
|
|
Aug 27 08:05:14 PM UTC 24 |
Aug 27 08:05:16 PM UTC 24 |
15324640 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.3611161111 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:16 PM UTC 24 |
155578218 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1015443954 |
|
|
Aug 27 08:05:14 PM UTC 24 |
Aug 27 08:05:16 PM UTC 24 |
204762909 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.2843874074 |
|
|
Aug 27 08:03:05 PM UTC 24 |
Aug 27 08:05:18 PM UTC 24 |
13384524929 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.3881627729 |
|
|
Aug 27 08:04:49 PM UTC 24 |
Aug 27 08:05:18 PM UTC 24 |
775358288 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.2659735503 |
|
|
Aug 27 08:05:14 PM UTC 24 |
Aug 27 08:05:18 PM UTC 24 |
53285286 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.4210351574 |
|
|
Aug 27 08:05:09 PM UTC 24 |
Aug 27 08:05:19 PM UTC 24 |
2167332477 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.4165642679 |
|
|
Aug 27 08:05:11 PM UTC 24 |
Aug 27 08:05:19 PM UTC 24 |
399574765 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.1287921845 |
|
|
Aug 27 08:05:04 PM UTC 24 |
Aug 27 08:05:20 PM UTC 24 |
402445747 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.1698044775 |
|
|
Aug 27 08:04:52 PM UTC 24 |
Aug 27 08:05:20 PM UTC 24 |
6733754850 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.1256281055 |
|
|
Aug 27 08:05:01 PM UTC 24 |
Aug 27 08:05:21 PM UTC 24 |
214974568 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.2433509186 |
|
|
Aug 27 08:05:15 PM UTC 24 |
Aug 27 08:05:21 PM UTC 24 |
155706860 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.1215666320 |
|
|
Aug 27 08:04:48 PM UTC 24 |
Aug 27 08:05:21 PM UTC 24 |
775814906 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.2614769613 |
|
|
Aug 27 08:05:19 PM UTC 24 |
Aug 27 08:05:21 PM UTC 24 |
14595587 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.2422631082 |
|
|
Aug 27 08:05:19 PM UTC 24 |
Aug 27 08:05:22 PM UTC 24 |
16796091 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.568275505 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:22 PM UTC 24 |
403801672 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.2531487990 |
|
|
Aug 27 08:05:09 PM UTC 24 |
Aug 27 08:05:22 PM UTC 24 |
270382896 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3867267041 |
|
|
Aug 27 08:03:13 PM UTC 24 |
Aug 27 08:05:22 PM UTC 24 |
9217011793 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.1888353931 |
|
|
Aug 27 08:05:04 PM UTC 24 |
Aug 27 08:05:23 PM UTC 24 |
3333236409 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.4087473640 |
|
|
Aug 27 08:05:19 PM UTC 24 |
Aug 27 08:05:23 PM UTC 24 |
231894107 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.1783892006 |
|
|
Aug 27 08:04:56 PM UTC 24 |
Aug 27 08:05:23 PM UTC 24 |
641467024 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.3102312637 |
|
|
Aug 27 08:03:21 PM UTC 24 |
Aug 27 08:05:24 PM UTC 24 |
3179706961 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.232747005 |
|
|
Aug 27 08:04:18 PM UTC 24 |
Aug 27 08:05:25 PM UTC 24 |
7562292190 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.3039372227 |
|
|
Aug 27 08:05:11 PM UTC 24 |
Aug 27 08:05:26 PM UTC 24 |
995813692 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.2430156387 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:05:26 PM UTC 24 |
1733038139 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.2594767062 |
|
|
Aug 27 08:05:22 PM UTC 24 |
Aug 27 08:05:26 PM UTC 24 |
24133092 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.2336448546 |
|
|
Aug 27 08:05:24 PM UTC 24 |
Aug 27 08:05:27 PM UTC 24 |
28323720 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.1361491819 |
|
|
Aug 27 08:05:24 PM UTC 24 |
Aug 27 08:05:27 PM UTC 24 |
15494236 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.2115264407 |
|
|
Aug 27 08:05:12 PM UTC 24 |
Aug 27 08:05:27 PM UTC 24 |
2200194791 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.3922547357 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:05:28 PM UTC 24 |
331014217 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.2203714606 |
|
|
Aug 27 08:05:24 PM UTC 24 |
Aug 27 08:05:28 PM UTC 24 |
73474729 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.2772193510 |
|
|
Aug 27 08:05:15 PM UTC 24 |
Aug 27 08:05:28 PM UTC 24 |
269650878 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.2115788629 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:05:29 PM UTC 24 |
586343722 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.2628212848 |
|
|
Aug 27 08:05:22 PM UTC 24 |
Aug 27 08:05:29 PM UTC 24 |
371167389 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.1272173197 |
|
|
Aug 27 08:03:56 PM UTC 24 |
Aug 27 08:05:29 PM UTC 24 |
9845329181 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.3175091156 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:05:30 PM UTC 24 |
2379871027 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1603045538 |
|
|
Aug 27 08:05:15 PM UTC 24 |
Aug 27 08:05:31 PM UTC 24 |
79678508 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.1460983262 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:31 PM UTC 24 |
260494683 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.4285400198 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:05:32 PM UTC 24 |
505618816 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.1723252789 |
|
|
Aug 27 08:05:30 PM UTC 24 |
Aug 27 08:05:32 PM UTC 24 |
34047962 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.246270002 |
|
|
Aug 27 08:05:30 PM UTC 24 |
Aug 27 08:05:32 PM UTC 24 |
15150509 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.3372670702 |
|
|
Aug 27 08:05:32 PM UTC 24 |
Aug 27 08:05:36 PM UTC 24 |
126779531 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.1409231075 |
|
|
Aug 27 08:05:21 PM UTC 24 |
Aug 27 08:05:34 PM UTC 24 |
225955039 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.4130093909 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:36 PM UTC 24 |
1488061448 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.1170252465 |
|
|
Aug 27 08:05:23 PM UTC 24 |
Aug 27 08:05:35 PM UTC 24 |
273809242 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.3651332861 |
|
|
Aug 27 08:05:22 PM UTC 24 |
Aug 27 08:05:35 PM UTC 24 |
300713797 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.625045127 |
|
|
Aug 27 08:05:23 PM UTC 24 |
Aug 27 08:05:36 PM UTC 24 |
1794634391 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.4180795166 |
|
|
Aug 27 08:05:25 PM UTC 24 |
Aug 27 08:05:36 PM UTC 24 |
173715933 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all_with_rand_reset.4184386031 |
|
|
Aug 27 08:04:59 PM UTC 24 |
Aug 27 08:05:36 PM UTC 24 |
7101724430 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.74894654 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:38 PM UTC 24 |
529893269 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.2527029791 |
|
|
Aug 27 08:05:28 PM UTC 24 |
Aug 27 08:05:38 PM UTC 24 |
686104125 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.1218394783 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:38 PM UTC 24 |
2404305959 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.458214386 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:38 PM UTC 24 |
1225690207 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.3254438681 |
|
|
Aug 27 08:05:36 PM UTC 24 |
Aug 27 08:05:39 PM UTC 24 |
21121432 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.690817205 |
|
|
Aug 27 08:05:37 PM UTC 24 |
Aug 27 08:05:40 PM UTC 24 |
12788721 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.193214157 |
|
|
Aug 27 08:05:36 PM UTC 24 |
Aug 27 08:05:41 PM UTC 24 |
291225843 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.1279413946 |
|
|
Aug 27 08:05:27 PM UTC 24 |
Aug 27 08:05:41 PM UTC 24 |
358334180 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.1410381609 |
|
|
Aug 27 08:05:31 PM UTC 24 |
Aug 27 08:05:42 PM UTC 24 |
72221782 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.2352197755 |
|
|
Aug 27 08:05:38 PM UTC 24 |
Aug 27 08:05:42 PM UTC 24 |
122587248 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.2415965164 |
|
|
Aug 27 08:05:39 PM UTC 24 |
Aug 27 08:05:44 PM UTC 24 |
139917965 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.3851598833 |
|
|
Aug 27 08:05:41 PM UTC 24 |
Aug 27 08:05:44 PM UTC 24 |
97448824 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.4103339622 |
|
|
Aug 27 08:04:55 PM UTC 24 |
Aug 27 08:05:44 PM UTC 24 |
606537493 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.3133203867 |
|
|
Aug 27 08:05:43 PM UTC 24 |
Aug 27 08:05:45 PM UTC 24 |
46151710 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.1676831533 |
|
|
Aug 27 08:05:33 PM UTC 24 |
Aug 27 08:05:45 PM UTC 24 |
1493544041 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3236282576 |
|
|
Aug 27 08:05:22 PM UTC 24 |
Aug 27 08:05:45 PM UTC 24 |
507251507 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.3263844138 |
|
|
Aug 27 08:05:33 PM UTC 24 |
Aug 27 08:05:45 PM UTC 24 |
1277127074 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.987557743 |
|
|
Aug 27 08:05:30 PM UTC 24 |
Aug 27 08:05:45 PM UTC 24 |
234066662 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.4055389667 |
|
|
Aug 27 08:05:33 PM UTC 24 |
Aug 27 08:05:46 PM UTC 24 |
362322585 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.3911144326 |
|
|
Aug 27 08:05:43 PM UTC 24 |
Aug 27 08:05:47 PM UTC 24 |
319753868 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.444624353 |
|
|
Aug 27 08:05:38 PM UTC 24 |
Aug 27 08:05:47 PM UTC 24 |
415493042 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.3780713888 |
|
|
Aug 27 08:05:33 PM UTC 24 |
Aug 27 08:05:48 PM UTC 24 |
528480256 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.1948607836 |
|
|
Aug 27 08:05:36 PM UTC 24 |
Aug 27 08:05:48 PM UTC 24 |
955041714 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2664421837 |
|
|
Aug 27 08:02:21 PM UTC 24 |
Aug 27 08:05:49 PM UTC 24 |
4666547303 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.330399233 |
|
|
Aug 27 08:05:45 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
71858743 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.4031388055 |
|
|
Aug 27 08:05:08 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
248483494 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.255855204 |
|
|
Aug 27 08:05:45 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
44742484 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.3412661237 |
|
|
Aug 27 08:05:34 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
2237342382 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.1949376184 |
|
|
Aug 27 08:05:15 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
2854073664 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.3384038030 |
|
|
Aug 27 08:05:48 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
90699815 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.2665361135 |
|
|
Aug 27 08:02:57 PM UTC 24 |
Aug 27 08:05:50 PM UTC 24 |
20882742330 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.3863783964 |
|
|
Aug 27 08:05:38 PM UTC 24 |
Aug 27 08:05:51 PM UTC 24 |
971774666 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.1042062203 |
|
|
Aug 27 08:05:39 PM UTC 24 |
Aug 27 08:05:52 PM UTC 24 |
978103137 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.523721968 |
|
|
Aug 27 08:05:39 PM UTC 24 |
Aug 27 08:05:52 PM UTC 24 |
555111439 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.1236775431 |
|
|
Aug 27 08:05:50 PM UTC 24 |
Aug 27 08:05:53 PM UTC 24 |
32001379 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.1341709006 |
|
|
Aug 27 08:04:38 PM UTC 24 |
Aug 27 08:05:53 PM UTC 24 |
10738989787 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.2668133206 |
|
|
Aug 27 08:05:40 PM UTC 24 |
Aug 27 08:05:53 PM UTC 24 |
388450718 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.4066598738 |
|
|
Aug 27 08:05:47 PM UTC 24 |
Aug 27 08:05:55 PM UTC 24 |
268789351 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.3120434251 |
|
|
Aug 27 08:05:50 PM UTC 24 |
Aug 27 08:05:55 PM UTC 24 |
340489732 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.741368575 |
|
|
Aug 27 08:05:24 PM UTC 24 |
Aug 27 08:05:55 PM UTC 24 |
344311376 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.326365572 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:05:55 PM UTC 24 |
246631477 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.266409407 |
|
|
Aug 27 08:05:40 PM UTC 24 |
Aug 27 08:05:56 PM UTC 24 |
456855249 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3121904771 |
|
|
Aug 27 08:05:45 PM UTC 24 |
Aug 27 08:05:57 PM UTC 24 |
317104714 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.3219040726 |
|
|
Aug 27 08:05:54 PM UTC 24 |
Aug 27 08:05:57 PM UTC 24 |
40716347 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.3693688134 |
|
|
Aug 27 08:05:54 PM UTC 24 |
Aug 27 08:05:57 PM UTC 24 |
49497855 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.1970300041 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:05:57 PM UTC 24 |
179760785 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.2564088535 |
|
|
Aug 27 08:05:54 PM UTC 24 |
Aug 27 08:05:57 PM UTC 24 |
85259658 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.823482503 |
|
|
Aug 27 08:05:47 PM UTC 24 |
Aug 27 08:05:58 PM UTC 24 |
804622890 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.1695013386 |
|
|
Aug 27 08:05:47 PM UTC 24 |
Aug 27 08:05:58 PM UTC 24 |
547731605 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.2252345962 |
|
|
Aug 27 08:05:56 PM UTC 24 |
Aug 27 08:06:00 PM UTC 24 |
21531632 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.3255568885 |
|
|
Aug 27 08:04:01 PM UTC 24 |
Aug 27 08:06:01 PM UTC 24 |
9954698700 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.1672766888 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:01 PM UTC 24 |
993683853 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.266864613 |
|
|
Aug 27 08:05:59 PM UTC 24 |
Aug 27 08:06:02 PM UTC 24 |
21356130 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.3934873347 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:02 PM UTC 24 |
433325425 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.2438395075 |
|
|
Aug 27 08:05:47 PM UTC 24 |
Aug 27 08:06:03 PM UTC 24 |
282258769 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.1041450390 |
|
|
Aug 27 08:05:47 PM UTC 24 |
Aug 27 08:06:03 PM UTC 24 |
396515276 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.3998721757 |
|
|
Aug 27 08:05:56 PM UTC 24 |
Aug 27 08:06:03 PM UTC 24 |
93475606 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.765580370 |
|
|
Aug 27 08:06:00 PM UTC 24 |
Aug 27 08:06:04 PM UTC 24 |
154680564 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.1501440198 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:04 PM UTC 24 |
73415151 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.451504856 |
|
|
Aug 27 08:05:58 PM UTC 24 |
Aug 27 08:06:05 PM UTC 24 |
736186615 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.943488685 |
|
|
Aug 27 08:06:03 PM UTC 24 |
Aug 27 08:06:05 PM UTC 24 |
43868281 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.2774942486 |
|
|
Aug 27 08:05:21 PM UTC 24 |
Aug 27 08:06:05 PM UTC 24 |
247881436 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.112673304 |
|
|
Aug 27 08:04:45 PM UTC 24 |
Aug 27 08:06:06 PM UTC 24 |
5928839268 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1584783783 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:06 PM UTC 24 |
2495292046 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3165822148 |
|
|
Aug 27 08:05:30 PM UTC 24 |
Aug 27 08:06:09 PM UTC 24 |
912720619 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.3534137874 |
|
|
Aug 27 08:06:04 PM UTC 24 |
Aug 27 08:06:09 PM UTC 24 |
1095577055 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.4236975820 |
|
|
Aug 27 08:05:43 PM UTC 24 |
Aug 27 08:06:09 PM UTC 24 |
656442412 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.1517967179 |
|
|
Aug 27 08:06:04 PM UTC 24 |
Aug 27 08:06:09 PM UTC 24 |
1806921716 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.3721951549 |
|
|
Aug 27 08:05:58 PM UTC 24 |
Aug 27 08:06:10 PM UTC 24 |
1186255372 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.2631653701 |
|
|
Aug 27 08:06:07 PM UTC 24 |
Aug 27 08:06:10 PM UTC 24 |
24784185 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.3194657216 |
|
|
Aug 27 08:05:58 PM UTC 24 |
Aug 27 08:06:10 PM UTC 24 |
1834236223 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.65532617 |
|
|
Aug 27 08:06:03 PM UTC 24 |
Aug 27 08:06:10 PM UTC 24 |
81313428 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.1377147484 |
|
|
Aug 27 08:06:07 PM UTC 24 |
Aug 27 08:06:10 PM UTC 24 |
173141675 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.806103649 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:11 PM UTC 24 |
4064475462 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.3242334016 |
|
|
Aug 27 08:05:52 PM UTC 24 |
Aug 27 08:06:12 PM UTC 24 |
8593947493 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.2438885935 |
|
|
Aug 27 08:06:10 PM UTC 24 |
Aug 27 08:06:12 PM UTC 24 |
155799978 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.2053658751 |
|
|
Aug 27 08:05:55 PM UTC 24 |
Aug 27 08:06:13 PM UTC 24 |
450317890 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.310181927 |
|
|
Aug 27 08:05:56 PM UTC 24 |
Aug 27 08:06:13 PM UTC 24 |
1013239028 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.2659581830 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:16 PM UTC 24 |
83131936 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.3465547492 |
|
|
Aug 27 08:06:14 PM UTC 24 |
Aug 27 08:06:16 PM UTC 24 |
60858041 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.1840187049 |
|
|
Aug 27 08:05:58 PM UTC 24 |
Aug 27 08:06:17 PM UTC 24 |
1554498190 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.3901058126 |
|
|
Aug 27 08:06:14 PM UTC 24 |
Aug 27 08:06:17 PM UTC 24 |
53622486 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all.1208744474 |
|
|
Aug 27 08:05:18 PM UTC 24 |
Aug 27 08:06:17 PM UTC 24 |
2149624456 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.3653220768 |
|
|
Aug 27 08:06:16 PM UTC 24 |
Aug 27 08:06:18 PM UTC 24 |
19999125 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.4076504338 |
|
|
Aug 27 08:06:05 PM UTC 24 |
Aug 27 08:06:19 PM UTC 24 |
296917116 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.2629904153 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:20 PM UTC 24 |
466583491 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.3294146318 |
|
|
Aug 27 08:06:06 PM UTC 24 |
Aug 27 08:06:20 PM UTC 24 |
316543164 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.2408201023 |
|
|
Aug 27 08:05:58 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
439366959 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.3303784652 |
|
|
Aug 27 08:06:04 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
3045351170 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.388082491 |
|
|
Aug 27 08:05:50 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
775419074 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.1394812510 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
283810920 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.1282934569 |
|
|
Aug 27 08:06:04 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
326589335 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.146425386 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
395558531 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.766871278 |
|
|
Aug 27 08:06:06 PM UTC 24 |
Aug 27 08:06:21 PM UTC 24 |
699688760 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.2173801041 |
|
|
Aug 27 08:06:18 PM UTC 24 |
Aug 27 08:06:22 PM UTC 24 |
65259858 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_stress_all_with_rand_reset.3372650433 |
|
|
Aug 27 08:05:41 PM UTC 24 |
Aug 27 08:06:22 PM UTC 24 |
1068443146 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.1280702719 |
|
|
Aug 27 08:06:10 PM UTC 24 |
Aug 27 08:06:23 PM UTC 24 |
222739458 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.3350337074 |
|
|
Aug 27 08:06:18 PM UTC 24 |
Aug 27 08:06:23 PM UTC 24 |
208106244 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.1374600549 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:23 PM UTC 24 |
472514806 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.863620338 |
|
|
Aug 27 08:06:22 PM UTC 24 |
Aug 27 08:06:24 PM UTC 24 |
22116590 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.1265653965 |
|
|
Aug 27 08:06:22 PM UTC 24 |
Aug 27 08:06:25 PM UTC 24 |
99944229 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.1202525926 |
|
|
Aug 27 08:06:22 PM UTC 24 |
Aug 27 08:06:25 PM UTC 24 |
64984900 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all.1165253465 |
|
|
Aug 27 08:05:29 PM UTC 24 |
Aug 27 08:06:25 PM UTC 24 |
2385396031 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.1637768347 |
|
|
Aug 27 08:06:03 PM UTC 24 |
Aug 27 08:06:26 PM UTC 24 |
272851991 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.1387177200 |
|
|
Aug 27 08:06:23 PM UTC 24 |
Aug 27 08:06:27 PM UTC 24 |
115885600 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.3197661528 |
|
|
Aug 27 08:06:13 PM UTC 24 |
Aug 27 08:06:27 PM UTC 24 |
718995930 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.3979013939 |
|
|
Aug 27 08:06:11 PM UTC 24 |
Aug 27 08:06:28 PM UTC 24 |
1658398912 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/49.lc_ctrl_state_failure.3909302093 |
|
|
Aug 27 08:06:36 PM UTC 24 |
Aug 27 08:07:12 PM UTC 24 |
2814092170 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.1649989332 |
|
|
Aug 27 08:05:37 PM UTC 24 |
Aug 27 08:06:28 PM UTC 24 |
1527748125 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.1003357718 |
|
|
Aug 27 08:06:27 PM UTC 24 |
Aug 27 08:06:30 PM UTC 24 |
24170674 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_errors.3589850642 |
|
|
Aug 27 08:06:18 PM UTC 24 |
Aug 27 08:06:30 PM UTC 24 |
1511144840 ps |