| T363 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.521244866 |
|
|
Sep 04 04:54:00 PM UTC 24 |
Sep 04 04:54:16 PM UTC 24 |
1153413285 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_mux.1756081554 |
|
|
Sep 04 04:54:01 PM UTC 24 |
Sep 04 04:54:16 PM UTC 24 |
434977985 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.312531442 |
|
|
Sep 04 04:52:30 PM UTC 24 |
Sep 04 04:54:20 PM UTC 24 |
10741999672 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.208925191 |
|
|
Sep 04 04:54:08 PM UTC 24 |
Sep 04 04:54:21 PM UTC 24 |
91873486 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.746408922 |
|
|
Sep 04 04:54:15 PM UTC 24 |
Sep 04 04:54:21 PM UTC 24 |
1322628946 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.3217562591 |
|
|
Sep 04 04:54:17 PM UTC 24 |
Sep 04 04:54:24 PM UTC 24 |
1675652376 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.2403310845 |
|
|
Sep 04 04:54:11 PM UTC 24 |
Sep 04 04:54:26 PM UTC 24 |
241841059 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3496558106 |
|
|
Sep 04 04:53:56 PM UTC 24 |
Sep 04 04:54:26 PM UTC 24 |
5575035929 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_errors.4056100451 |
|
|
Sep 04 04:54:09 PM UTC 24 |
Sep 04 04:54:27 PM UTC 24 |
1026928813 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.2895826234 |
|
|
Sep 04 04:54:15 PM UTC 24 |
Sep 04 04:54:28 PM UTC 24 |
1420025311 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.2916003732 |
|
|
Sep 04 04:54:26 PM UTC 24 |
Sep 04 04:54:29 PM UTC 24 |
42243218 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.328217686 |
|
|
Sep 04 04:54:22 PM UTC 24 |
Sep 04 04:54:29 PM UTC 24 |
442986803 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.892055629 |
|
|
Sep 04 04:54:28 PM UTC 24 |
Sep 04 04:54:30 PM UTC 24 |
40601679 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.312133010 |
|
|
Sep 04 04:54:28 PM UTC 24 |
Sep 04 04:54:31 PM UTC 24 |
27009133 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.1371810774 |
|
|
Sep 04 04:53:22 PM UTC 24 |
Sep 04 04:54:32 PM UTC 24 |
2224871334 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.150673465 |
|
|
Sep 04 04:54:02 PM UTC 24 |
Sep 04 04:54:33 PM UTC 24 |
2792507437 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3626985722 |
|
|
Sep 04 04:54:30 PM UTC 24 |
Sep 04 04:54:37 PM UTC 24 |
455015732 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3978930062 |
|
|
Sep 04 04:54:31 PM UTC 24 |
Sep 04 04:54:38 PM UTC 24 |
227897718 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.681617079 |
|
|
Sep 04 04:53:38 PM UTC 24 |
Sep 04 04:54:39 PM UTC 24 |
7648131715 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.4121591613 |
|
|
Sep 04 04:54:29 PM UTC 24 |
Sep 04 04:54:39 PM UTC 24 |
1323289829 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.679356219 |
|
|
Sep 04 04:53:35 PM UTC 24 |
Sep 04 04:54:40 PM UTC 24 |
5243334853 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.476088145 |
|
|
Sep 04 04:54:21 PM UTC 24 |
Sep 04 04:54:41 PM UTC 24 |
388279972 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3465058319 |
|
|
Sep 04 04:54:22 PM UTC 24 |
Sep 04 04:54:42 PM UTC 24 |
1461953011 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.3814611260 |
|
|
Sep 04 04:54:07 PM UTC 24 |
Sep 04 04:54:42 PM UTC 24 |
331486475 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.2967722013 |
|
|
Sep 04 04:54:30 PM UTC 24 |
Sep 04 04:54:44 PM UTC 24 |
1853089390 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.922523252 |
|
|
Sep 04 04:54:43 PM UTC 24 |
Sep 04 04:54:45 PM UTC 24 |
33991458 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.857452690 |
|
|
Sep 04 04:54:33 PM UTC 24 |
Sep 04 04:54:46 PM UTC 24 |
581493477 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.2930760166 |
|
|
Sep 04 04:54:45 PM UTC 24 |
Sep 04 04:54:47 PM UTC 24 |
32690122 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.265581393 |
|
|
Sep 04 04:54:34 PM UTC 24 |
Sep 04 04:54:47 PM UTC 24 |
466321883 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1365998677 |
|
|
Sep 04 04:54:31 PM UTC 24 |
Sep 04 04:54:48 PM UTC 24 |
651175140 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.2945605057 |
|
|
Sep 04 04:54:43 PM UTC 24 |
Sep 04 04:54:49 PM UTC 24 |
413798580 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.3671087055 |
|
|
Sep 04 04:53:19 PM UTC 24 |
Sep 04 04:54:51 PM UTC 24 |
15928024019 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.1921000502 |
|
|
Sep 04 04:54:47 PM UTC 24 |
Sep 04 04:54:52 PM UTC 24 |
103879630 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.4022613903 |
|
|
Sep 04 04:54:39 PM UTC 24 |
Sep 04 04:54:52 PM UTC 24 |
4449628723 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2734524188 |
|
|
Sep 04 04:54:41 PM UTC 24 |
Sep 04 04:54:53 PM UTC 24 |
891908732 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.2471108429 |
|
|
Sep 04 04:54:48 PM UTC 24 |
Sep 04 04:54:53 PM UTC 24 |
121010199 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.2219129940 |
|
|
Sep 04 04:54:39 PM UTC 24 |
Sep 04 04:54:54 PM UTC 24 |
217585705 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1611657079 |
|
|
Sep 04 04:54:47 PM UTC 24 |
Sep 04 04:54:57 PM UTC 24 |
199357380 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.1998558785 |
|
|
Sep 04 04:54:48 PM UTC 24 |
Sep 04 04:55:00 PM UTC 24 |
1715514327 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.764061998 |
|
|
Sep 04 04:54:29 PM UTC 24 |
Sep 04 04:55:02 PM UTC 24 |
558328729 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.3580679899 |
|
|
Sep 04 04:54:38 PM UTC 24 |
Sep 04 04:55:03 PM UTC 24 |
19525441041 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.574558338 |
|
|
Sep 04 04:54:15 PM UTC 24 |
Sep 04 04:55:23 PM UTC 24 |
8292353163 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.3670066197 |
|
|
Sep 04 04:54:41 PM UTC 24 |
Sep 04 04:55:04 PM UTC 24 |
3747971439 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.2248295858 |
|
|
Sep 04 04:54:53 PM UTC 24 |
Sep 04 04:55:04 PM UTC 24 |
1449295736 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.4013392011 |
|
|
Sep 04 04:55:03 PM UTC 24 |
Sep 04 04:55:05 PM UTC 24 |
21435411 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.3010682165 |
|
|
Sep 04 04:55:04 PM UTC 24 |
Sep 04 04:55:07 PM UTC 24 |
31693267 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.1409451862 |
|
|
Sep 04 04:55:03 PM UTC 24 |
Sep 04 04:55:07 PM UTC 24 |
94436084 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.1839923199 |
|
|
Sep 04 04:53:28 PM UTC 24 |
Sep 04 04:55:07 PM UTC 24 |
6847187700 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3571710796 |
|
|
Sep 04 04:54:48 PM UTC 24 |
Sep 04 04:55:07 PM UTC 24 |
518406859 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.1685382434 |
|
|
Sep 04 04:53:50 PM UTC 24 |
Sep 04 04:55:10 PM UTC 24 |
2856865854 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3290793729 |
|
|
Sep 04 04:55:07 PM UTC 24 |
Sep 04 04:55:11 PM UTC 24 |
119348911 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.3962135435 |
|
|
Sep 04 04:54:16 PM UTC 24 |
Sep 04 04:55:11 PM UTC 24 |
3067984560 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.534155027 |
|
|
Sep 04 04:54:55 PM UTC 24 |
Sep 04 04:55:12 PM UTC 24 |
635816952 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.2558836560 |
|
|
Sep 04 04:54:54 PM UTC 24 |
Sep 04 04:55:12 PM UTC 24 |
2025609216 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.1156097211 |
|
|
Sep 04 04:54:53 PM UTC 24 |
Sep 04 04:55:15 PM UTC 24 |
694984857 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.2736179482 |
|
|
Sep 04 04:55:08 PM UTC 24 |
Sep 04 04:55:16 PM UTC 24 |
1044027667 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.879531731 |
|
|
Sep 04 04:55:06 PM UTC 24 |
Sep 04 04:55:16 PM UTC 24 |
72614533 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.481641747 |
|
|
Sep 04 04:55:08 PM UTC 24 |
Sep 04 04:55:17 PM UTC 24 |
422283757 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.2226505261 |
|
|
Sep 04 04:54:54 PM UTC 24 |
Sep 04 04:55:18 PM UTC 24 |
378985639 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.2007148368 |
|
|
Sep 04 04:55:11 PM UTC 24 |
Sep 04 04:55:18 PM UTC 24 |
343508663 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.3574442393 |
|
|
Sep 04 04:54:54 PM UTC 24 |
Sep 04 04:55:19 PM UTC 24 |
2049893935 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.1029153234 |
|
|
Sep 04 04:53:43 PM UTC 24 |
Sep 04 04:55:19 PM UTC 24 |
9382050305 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.3873614939 |
|
|
Sep 04 04:54:46 PM UTC 24 |
Sep 04 04:55:21 PM UTC 24 |
225818610 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.499285693 |
|
|
Sep 04 04:54:32 PM UTC 24 |
Sep 04 04:55:21 PM UTC 24 |
1440287662 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.3374747653 |
|
|
Sep 04 04:55:20 PM UTC 24 |
Sep 04 04:55:22 PM UTC 24 |
14311636 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.1105289924 |
|
|
Sep 04 04:55:20 PM UTC 24 |
Sep 04 04:55:22 PM UTC 24 |
40251179 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.3484337006 |
|
|
Sep 04 04:55:20 PM UTC 24 |
Sep 04 04:55:23 PM UTC 24 |
46240549 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.103694449 |
|
|
Sep 04 04:55:08 PM UTC 24 |
Sep 04 04:55:24 PM UTC 24 |
738383931 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.1162276144 |
|
|
Sep 04 04:55:22 PM UTC 24 |
Sep 04 04:55:26 PM UTC 24 |
88366079 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.2737609028 |
|
|
Sep 04 04:55:11 PM UTC 24 |
Sep 04 04:55:27 PM UTC 24 |
850264567 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.1998987028 |
|
|
Sep 04 04:55:22 PM UTC 24 |
Sep 04 04:55:28 PM UTC 24 |
79113636 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.2843140286 |
|
|
Sep 04 04:55:13 PM UTC 24 |
Sep 04 04:55:29 PM UTC 24 |
326611584 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.124662667 |
|
|
Sep 04 04:54:53 PM UTC 24 |
Sep 04 04:55:30 PM UTC 24 |
6267088933 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.1947818822 |
|
|
Sep 04 04:55:25 PM UTC 24 |
Sep 04 04:55:31 PM UTC 24 |
202740658 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.1005352725 |
|
|
Sep 04 04:55:17 PM UTC 24 |
Sep 04 04:55:31 PM UTC 24 |
662277228 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.658378012 |
|
|
Sep 04 04:53:11 PM UTC 24 |
Sep 04 04:55:31 PM UTC 24 |
3224829374 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1882297935 |
|
|
Sep 04 04:55:23 PM UTC 24 |
Sep 04 04:55:33 PM UTC 24 |
435739985 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.2225125234 |
|
|
Sep 04 04:56:05 PM UTC 24 |
Sep 04 04:56:24 PM UTC 24 |
7663727832 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.3617260675 |
|
|
Sep 04 04:55:16 PM UTC 24 |
Sep 04 04:55:35 PM UTC 24 |
780086426 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.993930267 |
|
|
Sep 04 04:54:50 PM UTC 24 |
Sep 04 04:55:35 PM UTC 24 |
8015258744 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.3975624052 |
|
|
Sep 04 04:55:33 PM UTC 24 |
Sep 04 04:55:36 PM UTC 24 |
84114750 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.2791652762 |
|
|
Sep 04 04:55:23 PM UTC 24 |
Sep 04 04:55:36 PM UTC 24 |
706398163 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.3294793699 |
|
|
Sep 04 04:55:27 PM UTC 24 |
Sep 04 04:55:37 PM UTC 24 |
5045179268 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.222927687 |
|
|
Sep 04 04:55:29 PM UTC 24 |
Sep 04 04:55:37 PM UTC 24 |
459772846 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.2058515548 |
|
|
Sep 04 04:55:04 PM UTC 24 |
Sep 04 04:55:38 PM UTC 24 |
545561583 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.4075316573 |
|
|
Sep 04 04:55:36 PM UTC 24 |
Sep 04 04:55:38 PM UTC 24 |
13634342 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.3384347427 |
|
|
Sep 04 04:55:13 PM UTC 24 |
Sep 04 04:55:39 PM UTC 24 |
1646556125 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.2327944571 |
|
|
Sep 04 04:55:34 PM UTC 24 |
Sep 04 04:55:41 PM UTC 24 |
189945023 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.4023490232 |
|
|
Sep 04 04:55:37 PM UTC 24 |
Sep 04 04:55:42 PM UTC 24 |
68074629 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.3988202933 |
|
|
Sep 04 04:55:25 PM UTC 24 |
Sep 04 04:55:42 PM UTC 24 |
1148719497 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.3194192512 |
|
|
Sep 04 04:55:30 PM UTC 24 |
Sep 04 04:55:43 PM UTC 24 |
533102949 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.400549613 |
|
|
Sep 04 04:55:30 PM UTC 24 |
Sep 04 04:55:43 PM UTC 24 |
882871763 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.4231424658 |
|
|
Sep 04 04:51:13 PM UTC 24 |
Sep 04 04:55:43 PM UTC 24 |
7981320623 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.3955787740 |
|
|
Sep 04 04:55:39 PM UTC 24 |
Sep 04 04:55:44 PM UTC 24 |
3187466283 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.3391894773 |
|
|
Sep 04 04:55:39 PM UTC 24 |
Sep 04 04:55:45 PM UTC 24 |
187684842 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.1710099112 |
|
|
Sep 04 04:53:28 PM UTC 24 |
Sep 04 04:55:46 PM UTC 24 |
8720267354 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.445338312 |
|
|
Sep 04 04:55:45 PM UTC 24 |
Sep 04 04:55:48 PM UTC 24 |
67532294 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.1607499299 |
|
|
Sep 04 04:55:13 PM UTC 24 |
Sep 04 04:55:48 PM UTC 24 |
7225754327 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.3106637429 |
|
|
Sep 04 04:52:52 PM UTC 24 |
Sep 04 04:55:49 PM UTC 24 |
4546690505 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.717068071 |
|
|
Sep 04 04:55:47 PM UTC 24 |
Sep 04 04:55:49 PM UTC 24 |
36202463 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.2120958305 |
|
|
Sep 04 04:55:22 PM UTC 24 |
Sep 04 04:55:50 PM UTC 24 |
371594796 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.603614999 |
|
|
Sep 04 04:55:36 PM UTC 24 |
Sep 04 04:55:50 PM UTC 24 |
343791224 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.1633572054 |
|
|
Sep 04 04:56:07 PM UTC 24 |
Sep 04 04:56:22 PM UTC 24 |
1051073174 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.2916904894 |
|
|
Sep 04 04:55:32 PM UTC 24 |
Sep 04 04:55:50 PM UTC 24 |
2516806098 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.3310891814 |
|
|
Sep 04 04:55:37 PM UTC 24 |
Sep 04 04:55:52 PM UTC 24 |
514448247 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2378645662 |
|
|
Sep 04 04:55:46 PM UTC 24 |
Sep 04 04:55:53 PM UTC 24 |
395618958 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.3323060139 |
|
|
Sep 04 04:55:49 PM UTC 24 |
Sep 04 04:55:53 PM UTC 24 |
286400791 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.4169682451 |
|
|
Sep 04 04:55:43 PM UTC 24 |
Sep 04 04:55:54 PM UTC 24 |
1051523882 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.1219072701 |
|
|
Sep 04 04:55:37 PM UTC 24 |
Sep 04 04:55:55 PM UTC 24 |
2025083724 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.4136630258 |
|
|
Sep 04 04:55:49 PM UTC 24 |
Sep 04 04:55:55 PM UTC 24 |
198957061 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.3248288510 |
|
|
Sep 04 04:55:42 PM UTC 24 |
Sep 04 04:55:55 PM UTC 24 |
4382326284 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.269183405 |
|
|
Sep 04 04:55:17 PM UTC 24 |
Sep 04 04:55:56 PM UTC 24 |
14198042929 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.1911054333 |
|
|
Sep 04 04:55:43 PM UTC 24 |
Sep 04 04:55:58 PM UTC 24 |
2518971658 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.1946357499 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:55:59 PM UTC 24 |
275329643 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.1183755210 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:55:59 PM UTC 24 |
270133450 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.1837879310 |
|
|
Sep 04 04:55:56 PM UTC 24 |
Sep 04 04:55:59 PM UTC 24 |
69238578 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.2395413517 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:56:00 PM UTC 24 |
313778222 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.4068749277 |
|
|
Sep 04 04:55:59 PM UTC 24 |
Sep 04 04:56:01 PM UTC 24 |
13265395 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.2077089054 |
|
|
Sep 04 04:55:36 PM UTC 24 |
Sep 04 04:56:01 PM UTC 24 |
495618500 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.2605743080 |
|
|
Sep 04 04:55:58 PM UTC 24 |
Sep 04 04:56:02 PM UTC 24 |
93455794 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.4106131365 |
|
|
Sep 04 04:55:54 PM UTC 24 |
Sep 04 04:56:04 PM UTC 24 |
242454441 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3410887779 |
|
|
Sep 04 04:55:08 PM UTC 24 |
Sep 04 04:56:04 PM UTC 24 |
3704757630 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.307075905 |
|
|
Sep 04 04:53:11 PM UTC 24 |
Sep 04 04:56:05 PM UTC 24 |
4219676275 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.1702664767 |
|
|
Sep 04 04:56:00 PM UTC 24 |
Sep 04 04:56:05 PM UTC 24 |
64131278 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.186373601 |
|
|
Sep 04 04:55:54 PM UTC 24 |
Sep 04 04:56:06 PM UTC 24 |
1297229414 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1054183920 |
|
|
Sep 04 04:55:43 PM UTC 24 |
Sep 04 04:56:06 PM UTC 24 |
577721659 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.3965378207 |
|
|
Sep 04 04:56:03 PM UTC 24 |
Sep 04 04:56:06 PM UTC 24 |
89942845 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.244417571 |
|
|
Sep 04 04:55:55 PM UTC 24 |
Sep 04 04:56:07 PM UTC 24 |
994941317 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.3495177266 |
|
|
Sep 04 04:55:28 PM UTC 24 |
Sep 04 04:56:08 PM UTC 24 |
2753710112 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.3325891583 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:56:09 PM UTC 24 |
348133182 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.3659202975 |
|
|
Sep 04 04:56:00 PM UTC 24 |
Sep 04 04:56:10 PM UTC 24 |
424796138 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.1991744574 |
|
|
Sep 04 04:56:03 PM UTC 24 |
Sep 04 04:56:10 PM UTC 24 |
177530581 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.3498062147 |
|
|
Sep 04 04:55:39 PM UTC 24 |
Sep 04 04:56:11 PM UTC 24 |
3874964676 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/2.lc_ctrl_stress_all.2914644410 |
|
|
Sep 04 04:50:39 PM UTC 24 |
Sep 04 04:56:11 PM UTC 24 |
42094093258 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.2332920594 |
|
|
Sep 04 04:56:09 PM UTC 24 |
Sep 04 04:56:12 PM UTC 24 |
24478079 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.3758480261 |
|
|
Sep 04 04:56:11 PM UTC 24 |
Sep 04 04:56:13 PM UTC 24 |
22889871 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.1049200865 |
|
|
Sep 04 04:55:49 PM UTC 24 |
Sep 04 04:56:13 PM UTC 24 |
225779480 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.1384926425 |
|
|
Sep 04 04:56:07 PM UTC 24 |
Sep 04 04:56:14 PM UTC 24 |
521124172 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.2384980869 |
|
|
Sep 04 04:56:12 PM UTC 24 |
Sep 04 04:56:15 PM UTC 24 |
14396338 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.520535551 |
|
|
Sep 04 04:56:01 PM UTC 24 |
Sep 04 04:56:15 PM UTC 24 |
625312801 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.3330453018 |
|
|
Sep 04 04:56:12 PM UTC 24 |
Sep 04 04:56:18 PM UTC 24 |
127108137 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.1528199515 |
|
|
Sep 04 04:55:25 PM UTC 24 |
Sep 04 04:56:19 PM UTC 24 |
1393646709 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.3858733147 |
|
|
Sep 04 04:56:08 PM UTC 24 |
Sep 04 04:56:20 PM UTC 24 |
259245799 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.369326083 |
|
|
Sep 04 04:56:12 PM UTC 24 |
Sep 04 04:56:20 PM UTC 24 |
72624277 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.1236996591 |
|
|
Sep 04 04:56:05 PM UTC 24 |
Sep 04 04:56:20 PM UTC 24 |
630076006 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.2810304421 |
|
|
Sep 04 04:55:54 PM UTC 24 |
Sep 04 04:56:21 PM UTC 24 |
948291452 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.2506159724 |
|
|
Sep 04 04:56:22 PM UTC 24 |
Sep 04 04:56:26 PM UTC 24 |
50518236 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.342333623 |
|
|
Sep 04 04:56:22 PM UTC 24 |
Sep 04 04:56:24 PM UTC 24 |
52432049 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1270206712 |
|
|
Sep 04 04:56:22 PM UTC 24 |
Sep 04 04:56:24 PM UTC 24 |
49568640 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.1529796084 |
|
|
Sep 04 04:54:58 PM UTC 24 |
Sep 04 04:56:24 PM UTC 24 |
3765292162 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.3596944538 |
|
|
Sep 04 04:56:16 PM UTC 24 |
Sep 04 04:56:25 PM UTC 24 |
1240729888 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.515485356 |
|
|
Sep 04 04:56:16 PM UTC 24 |
Sep 04 04:56:27 PM UTC 24 |
314822840 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.2814359781 |
|
|
Sep 04 04:56:15 PM UTC 24 |
Sep 04 04:56:27 PM UTC 24 |
1166525217 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.2380723077 |
|
|
Sep 04 04:56:07 PM UTC 24 |
Sep 04 04:56:28 PM UTC 24 |
1317287103 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1148941919 |
|
|
Sep 04 04:56:18 PM UTC 24 |
Sep 04 04:56:30 PM UTC 24 |
980237973 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.3016871306 |
|
|
Sep 04 04:56:00 PM UTC 24 |
Sep 04 04:56:31 PM UTC 24 |
244072526 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.2793747000 |
|
|
Sep 04 04:56:03 PM UTC 24 |
Sep 04 04:56:31 PM UTC 24 |
3771620658 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.3669245388 |
|
|
Sep 04 04:56:16 PM UTC 24 |
Sep 04 04:56:31 PM UTC 24 |
2697434163 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1115374192 |
|
|
Sep 04 04:56:15 PM UTC 24 |
Sep 04 04:56:32 PM UTC 24 |
292796206 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.757768583 |
|
|
Sep 04 04:56:30 PM UTC 24 |
Sep 04 04:56:32 PM UTC 24 |
33481225 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.3240084734 |
|
|
Sep 04 04:56:26 PM UTC 24 |
Sep 04 04:56:33 PM UTC 24 |
97134865 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.74649311 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:56:34 PM UTC 24 |
3771721130 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.2163080814 |
|
|
Sep 04 04:56:32 PM UTC 24 |
Sep 04 04:56:34 PM UTC 24 |
13816614 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.1431767549 |
|
|
Sep 04 04:56:26 PM UTC 24 |
Sep 04 04:56:36 PM UTC 24 |
178768066 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.3425187284 |
|
|
Sep 04 04:56:26 PM UTC 24 |
Sep 04 04:56:37 PM UTC 24 |
111562658 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.4054682009 |
|
|
Sep 04 04:56:33 PM UTC 24 |
Sep 04 04:56:39 PM UTC 24 |
1023379735 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.1674264391 |
|
|
Sep 04 04:55:40 PM UTC 24 |
Sep 04 04:56:41 PM UTC 24 |
10506169887 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.3953548582 |
|
|
Sep 04 04:55:33 PM UTC 24 |
Sep 04 04:56:41 PM UTC 24 |
2967355669 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.2599612600 |
|
|
Sep 04 04:56:26 PM UTC 24 |
Sep 04 04:56:42 PM UTC 24 |
952641275 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1235986658 |
|
|
Sep 04 04:56:35 PM UTC 24 |
Sep 04 04:56:42 PM UTC 24 |
676973410 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.3270198776 |
|
|
Sep 04 04:56:28 PM UTC 24 |
Sep 04 04:56:42 PM UTC 24 |
598389996 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.3838794785 |
|
|
Sep 04 04:56:32 PM UTC 24 |
Sep 04 04:56:43 PM UTC 24 |
104870920 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.3004651604 |
|
|
Sep 04 04:56:26 PM UTC 24 |
Sep 04 04:56:44 PM UTC 24 |
1333179311 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.1443862487 |
|
|
Sep 04 04:56:33 PM UTC 24 |
Sep 04 04:56:44 PM UTC 24 |
329483105 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3848966166 |
|
|
Sep 04 04:56:42 PM UTC 24 |
Sep 04 04:56:44 PM UTC 24 |
65347279 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.2938719643 |
|
|
Sep 04 04:56:42 PM UTC 24 |
Sep 04 04:56:45 PM UTC 24 |
86611218 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3374197677 |
|
|
Sep 04 04:56:44 PM UTC 24 |
Sep 04 04:56:46 PM UTC 24 |
26215640 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.2311099240 |
|
|
Sep 04 04:56:28 PM UTC 24 |
Sep 04 04:56:46 PM UTC 24 |
976208230 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.922137218 |
|
|
Sep 04 04:56:35 PM UTC 24 |
Sep 04 04:56:47 PM UTC 24 |
3446236886 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3917918632 |
|
|
Sep 04 04:56:44 PM UTC 24 |
Sep 04 04:56:48 PM UTC 24 |
46950692 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.3387306887 |
|
|
Sep 04 04:56:38 PM UTC 24 |
Sep 04 04:56:48 PM UTC 24 |
301257096 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.2414328186 |
|
|
Sep 04 04:56:07 PM UTC 24 |
Sep 04 04:56:49 PM UTC 24 |
24655775516 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3426649404 |
|
|
Sep 04 04:56:12 PM UTC 24 |
Sep 04 04:56:49 PM UTC 24 |
309660996 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.2148713798 |
|
|
Sep 04 04:56:44 PM UTC 24 |
Sep 04 04:56:49 PM UTC 24 |
81736504 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.152460226 |
|
|
Sep 04 04:56:33 PM UTC 24 |
Sep 04 04:56:50 PM UTC 24 |
372823824 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.1159285756 |
|
|
Sep 04 04:56:50 PM UTC 24 |
Sep 04 04:56:52 PM UTC 24 |
39730801 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.1025579680 |
|
|
Sep 04 04:56:37 PM UTC 24 |
Sep 04 04:56:52 PM UTC 24 |
875819167 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.584631594 |
|
|
Sep 04 04:56:50 PM UTC 24 |
Sep 04 04:56:53 PM UTC 24 |
24862918 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.4047181983 |
|
|
Sep 04 04:56:45 PM UTC 24 |
Sep 04 04:56:53 PM UTC 24 |
226048181 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.3521946988 |
|
|
Sep 04 04:56:47 PM UTC 24 |
Sep 04 04:56:54 PM UTC 24 |
879572911 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.348591601 |
|
|
Sep 04 04:56:28 PM UTC 24 |
Sep 04 04:56:55 PM UTC 24 |
638874460 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.1821411718 |
|
|
Sep 04 04:56:50 PM UTC 24 |
Sep 04 04:56:56 PM UTC 24 |
818293154 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.121070126 |
|
|
Sep 04 04:56:39 PM UTC 24 |
Sep 04 04:56:56 PM UTC 24 |
1684699282 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.1647110483 |
|
|
Sep 04 04:56:51 PM UTC 24 |
Sep 04 04:56:56 PM UTC 24 |
77304307 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.1819108221 |
|
|
Sep 04 04:56:50 PM UTC 24 |
Sep 04 04:56:57 PM UTC 24 |
88282753 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.1460252119 |
|
|
Sep 04 04:56:45 PM UTC 24 |
Sep 04 04:56:58 PM UTC 24 |
743549244 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.2957888816 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:57:17 PM UTC 24 |
16339472 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.2716181920 |
|
|
Sep 04 04:56:45 PM UTC 24 |
Sep 04 04:56:58 PM UTC 24 |
1263007460 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.155252120 |
|
|
Sep 04 04:56:23 PM UTC 24 |
Sep 04 04:56:59 PM UTC 24 |
219564222 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1076606139 |
|
|
Sep 04 04:56:58 PM UTC 24 |
Sep 04 04:57:00 PM UTC 24 |
37873047 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.3750360463 |
|
|
Sep 04 04:56:58 PM UTC 24 |
Sep 04 04:57:01 PM UTC 24 |
27621705 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.3754124858 |
|
|
Sep 04 04:56:45 PM UTC 24 |
Sep 04 04:57:01 PM UTC 24 |
3333341503 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.2400209051 |
|
|
Sep 04 04:56:59 PM UTC 24 |
Sep 04 04:57:02 PM UTC 24 |
21383746 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.528881312 |
|
|
Sep 04 04:56:55 PM UTC 24 |
Sep 04 04:57:02 PM UTC 24 |
173611114 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.4038851778 |
|
|
Sep 04 04:57:03 PM UTC 24 |
Sep 04 04:57:17 PM UTC 24 |
643266733 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.427296932 |
|
|
Sep 04 04:56:32 PM UTC 24 |
Sep 04 04:57:04 PM UTC 24 |
716569553 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.1350592533 |
|
|
Sep 04 04:57:00 PM UTC 24 |
Sep 04 04:57:04 PM UTC 24 |
20535852 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.1139634554 |
|
|
Sep 04 04:56:54 PM UTC 24 |
Sep 04 04:57:04 PM UTC 24 |
578044652 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.1850048782 |
|
|
Sep 04 04:56:54 PM UTC 24 |
Sep 04 04:57:04 PM UTC 24 |
292517627 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.884741606 |
|
|
Sep 04 04:57:02 PM UTC 24 |
Sep 04 04:57:06 PM UTC 24 |
492613161 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.790493019 |
|
|
Sep 04 04:56:47 PM UTC 24 |
Sep 04 04:57:06 PM UTC 24 |
604535287 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.2290748734 |
|
|
Sep 04 04:56:59 PM UTC 24 |
Sep 04 04:57:07 PM UTC 24 |
155087859 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.3880843211 |
|
|
Sep 04 04:57:05 PM UTC 24 |
Sep 04 04:57:08 PM UTC 24 |
19050233 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3297659439 |
|
|
Sep 04 04:57:06 PM UTC 24 |
Sep 04 04:57:09 PM UTC 24 |
12711538 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1320092403 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:57:17 PM UTC 24 |
30452653 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.1646062141 |
|
|
Sep 04 04:55:51 PM UTC 24 |
Sep 04 04:57:10 PM UTC 24 |
30084542787 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.4102901965 |
|
|
Sep 04 04:56:56 PM UTC 24 |
Sep 04 04:57:11 PM UTC 24 |
4685380363 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.4236950723 |
|
|
Sep 04 04:55:53 PM UTC 24 |
Sep 04 04:57:12 PM UTC 24 |
5101732476 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.535943326 |
|
|
Sep 04 04:57:08 PM UTC 24 |
Sep 04 04:57:13 PM UTC 24 |
235439856 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.3606028158 |
|
|
Sep 04 04:55:39 PM UTC 24 |
Sep 04 04:57:13 PM UTC 24 |
2239940992 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.2908513219 |
|
|
Sep 04 04:57:02 PM UTC 24 |
Sep 04 04:57:13 PM UTC 24 |
556054550 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.1727414862 |
|
|
Sep 04 04:56:50 PM UTC 24 |
Sep 04 04:57:13 PM UTC 24 |
295602787 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.897080178 |
|
|
Sep 04 04:57:05 PM UTC 24 |
Sep 04 04:57:13 PM UTC 24 |
744197584 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2644839608 |
|
|
Sep 04 04:56:54 PM UTC 24 |
Sep 04 04:57:14 PM UTC 24 |
894097593 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.3301120650 |
|
|
Sep 04 04:56:44 PM UTC 24 |
Sep 04 04:57:14 PM UTC 24 |
286239940 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.1876627011 |
|
|
Sep 04 04:57:02 PM UTC 24 |
Sep 04 04:57:15 PM UTC 24 |
373253565 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.3088142819 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:57:20 PM UTC 24 |
92816266 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.3129241082 |
|
|
Sep 04 04:57:08 PM UTC 24 |
Sep 04 04:57:18 PM UTC 24 |
224973808 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.154863869 |
|
|
Sep 04 04:57:09 PM UTC 24 |
Sep 04 04:57:20 PM UTC 24 |
3083528017 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all.3244698353 |
|
|
Sep 04 04:52:14 PM UTC 24 |
Sep 04 04:57:20 PM UTC 24 |
11096445658 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.430095197 |
|
|
Sep 04 04:57:17 PM UTC 24 |
Sep 04 04:57:20 PM UTC 24 |
29152798 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.2494865079 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:57:21 PM UTC 24 |
308004987 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.3553822353 |
|
|
Sep 04 04:57:11 PM UTC 24 |
Sep 04 04:57:21 PM UTC 24 |
675935044 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.958124664 |
|
|
Sep 04 04:57:03 PM UTC 24 |
Sep 04 04:57:22 PM UTC 24 |
936584994 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.4114692924 |
|
|
Sep 04 04:56:29 PM UTC 24 |
Sep 04 04:57:22 PM UTC 24 |
7430129813 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.1952591628 |
|
|
Sep 04 04:57:06 PM UTC 24 |
Sep 04 04:57:23 PM UTC 24 |
183665208 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.643628524 |
|
|
Sep 04 04:56:54 PM UTC 24 |
Sep 04 04:57:23 PM UTC 24 |
2518178127 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.941068520 |
|
|
Sep 04 04:57:09 PM UTC 24 |
Sep 04 04:57:23 PM UTC 24 |
1437838002 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.728608039 |
|
|
Sep 04 04:57:21 PM UTC 24 |
Sep 04 04:57:24 PM UTC 24 |
110070839 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.3062970510 |
|
|
Sep 04 04:55:45 PM UTC 24 |
Sep 04 04:57:24 PM UTC 24 |
2571523148 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.1622040590 |
|
|
Sep 04 04:59:20 PM UTC 24 |
Sep 04 04:59:50 PM UTC 24 |
616952790 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.3128980145 |
|
|
Sep 04 04:57:09 PM UTC 24 |
Sep 04 04:57:25 PM UTC 24 |
296297750 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2823041206 |
|
|
Sep 04 04:57:23 PM UTC 24 |
Sep 04 04:57:25 PM UTC 24 |
14932851 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.79260459 |
|
|
Sep 04 04:57:23 PM UTC 24 |
Sep 04 04:57:26 PM UTC 24 |
448440281 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.2538809135 |
|
|
Sep 04 04:57:18 PM UTC 24 |
Sep 04 04:57:27 PM UTC 24 |
585419352 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.1671310939 |
|
|
Sep 04 04:56:59 PM UTC 24 |
Sep 04 04:57:27 PM UTC 24 |
1067036407 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.3643738337 |
|
|
Sep 04 04:57:25 PM UTC 24 |
Sep 04 04:57:28 PM UTC 24 |
65395734 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.2301252268 |
|
|
Sep 04 04:57:18 PM UTC 24 |
Sep 04 04:57:29 PM UTC 24 |
319682544 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.815733991 |
|
|
Sep 04 04:57:12 PM UTC 24 |
Sep 04 04:57:30 PM UTC 24 |
467733977 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.1276880201 |
|
|
Sep 04 04:57:18 PM UTC 24 |
Sep 04 04:57:30 PM UTC 24 |
1336668628 ps |