| T581 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.2847891647 |
|
|
Sep 04 04:57:21 PM UTC 24 |
Sep 04 04:57:31 PM UTC 24 |
497666210 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.995306034 |
|
|
Sep 04 04:57:29 PM UTC 24 |
Sep 04 04:57:31 PM UTC 24 |
43437198 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.358605872 |
|
|
Sep 04 04:57:29 PM UTC 24 |
Sep 04 04:57:31 PM UTC 24 |
23204345 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.2187993506 |
|
|
Sep 04 04:57:17 PM UTC 24 |
Sep 04 04:57:31 PM UTC 24 |
577678432 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.3688754918 |
|
|
Sep 04 04:57:11 PM UTC 24 |
Sep 04 04:57:32 PM UTC 24 |
296813892 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.899038356 |
|
|
Sep 04 04:57:29 PM UTC 24 |
Sep 04 04:57:32 PM UTC 24 |
27539437 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.1022435832 |
|
|
Sep 04 04:57:06 PM UTC 24 |
Sep 04 04:57:35 PM UTC 24 |
291387141 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.432175422 |
|
|
Sep 04 04:57:18 PM UTC 24 |
Sep 04 04:57:35 PM UTC 24 |
1616899371 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.305713413 |
|
|
Sep 04 04:57:25 PM UTC 24 |
Sep 04 04:57:35 PM UTC 24 |
362489078 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.3163782324 |
|
|
Sep 04 04:57:32 PM UTC 24 |
Sep 04 04:57:36 PM UTC 24 |
329029715 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.1753467066 |
|
|
Sep 04 04:57:25 PM UTC 24 |
Sep 04 04:57:37 PM UTC 24 |
2756609151 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.1906195876 |
|
|
Sep 04 04:57:32 PM UTC 24 |
Sep 04 04:57:37 PM UTC 24 |
226949811 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.194591056 |
|
|
Sep 04 04:57:27 PM UTC 24 |
Sep 04 04:57:38 PM UTC 24 |
757574188 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.782353988 |
|
|
Sep 04 04:57:37 PM UTC 24 |
Sep 04 04:57:39 PM UTC 24 |
24526304 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.617847269 |
|
|
Sep 04 04:57:37 PM UTC 24 |
Sep 04 04:57:39 PM UTC 24 |
14588435 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.2220837764 |
|
|
Sep 04 04:57:37 PM UTC 24 |
Sep 04 04:57:39 PM UTC 24 |
20473204 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.2176646924 |
|
|
Sep 04 04:57:32 PM UTC 24 |
Sep 04 04:57:40 PM UTC 24 |
986209289 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3094114766 |
|
|
Sep 04 04:57:25 PM UTC 24 |
Sep 04 04:57:41 PM UTC 24 |
3305464935 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.2561009977 |
|
|
Sep 04 04:57:25 PM UTC 24 |
Sep 04 04:57:41 PM UTC 24 |
506102621 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1718947368 |
|
|
Sep 04 04:57:32 PM UTC 24 |
Sep 04 04:57:41 PM UTC 24 |
80859272 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.1402410810 |
|
|
Sep 04 04:57:55 PM UTC 24 |
Sep 04 04:58:01 PM UTC 24 |
84044107 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.3943317502 |
|
|
Sep 04 04:58:00 PM UTC 24 |
Sep 04 04:58:02 PM UTC 24 |
38049932 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.1268988556 |
|
|
Sep 04 04:57:27 PM UTC 24 |
Sep 04 04:57:42 PM UTC 24 |
297386943 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.2096357010 |
|
|
Sep 04 04:57:40 PM UTC 24 |
Sep 04 04:57:45 PM UTC 24 |
159624680 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.1554103905 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:57:45 PM UTC 24 |
2885430351 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.1313809336 |
|
|
Sep 04 04:57:43 PM UTC 24 |
Sep 04 04:57:46 PM UTC 24 |
28578372 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.3554463119 |
|
|
Sep 04 04:56:41 PM UTC 24 |
Sep 04 04:57:46 PM UTC 24 |
2063239887 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.1031741630 |
|
|
Sep 04 04:57:38 PM UTC 24 |
Sep 04 04:57:46 PM UTC 24 |
416373668 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.2234206204 |
|
|
Sep 04 04:57:27 PM UTC 24 |
Sep 04 04:57:46 PM UTC 24 |
5819387411 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.2210114408 |
|
|
Sep 04 04:57:34 PM UTC 24 |
Sep 04 04:57:47 PM UTC 24 |
1281704299 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.1068379023 |
|
|
Sep 04 04:57:46 PM UTC 24 |
Sep 04 04:57:48 PM UTC 24 |
12303650 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.3776278852 |
|
|
Sep 04 04:57:46 PM UTC 24 |
Sep 04 04:57:48 PM UTC 24 |
20632375 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.9529311 |
|
|
Sep 04 04:56:28 PM UTC 24 |
Sep 04 04:57:48 PM UTC 24 |
1705438106 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.2239803605 |
|
|
Sep 04 04:57:40 PM UTC 24 |
Sep 04 04:57:51 PM UTC 24 |
307257316 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.2282158381 |
|
|
Sep 04 04:57:34 PM UTC 24 |
Sep 04 04:57:51 PM UTC 24 |
602832156 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.2953022639 |
|
|
Sep 04 04:57:42 PM UTC 24 |
Sep 04 04:57:51 PM UTC 24 |
2361198146 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3503237505 |
|
|
Sep 04 04:57:40 PM UTC 24 |
Sep 04 04:57:52 PM UTC 24 |
294236658 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1119562135 |
|
|
Sep 04 04:54:42 PM UTC 24 |
Sep 04 04:57:53 PM UTC 24 |
8637634465 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.3445073129 |
|
|
Sep 04 04:57:40 PM UTC 24 |
Sep 04 04:57:53 PM UTC 24 |
812653660 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.3151253943 |
|
|
Sep 04 04:57:34 PM UTC 24 |
Sep 04 04:57:53 PM UTC 24 |
1881851200 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.1073414691 |
|
|
Sep 04 04:54:43 PM UTC 24 |
Sep 04 04:57:53 PM UTC 24 |
16499523694 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.3308950901 |
|
|
Sep 04 04:57:30 PM UTC 24 |
Sep 04 04:57:53 PM UTC 24 |
170196895 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.383955391 |
|
|
Sep 04 04:57:48 PM UTC 24 |
Sep 04 04:57:54 PM UTC 24 |
105156478 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.2845124909 |
|
|
Sep 04 04:57:50 PM UTC 24 |
Sep 04 04:57:54 PM UTC 24 |
69577826 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.139188096 |
|
|
Sep 04 04:57:53 PM UTC 24 |
Sep 04 04:57:55 PM UTC 24 |
63851084 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.746727900 |
|
|
Sep 04 04:57:32 PM UTC 24 |
Sep 04 04:57:55 PM UTC 24 |
2545576233 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.2103183876 |
|
|
Sep 04 04:57:48 PM UTC 24 |
Sep 04 04:57:55 PM UTC 24 |
877317442 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.3266969548 |
|
|
Sep 04 04:57:23 PM UTC 24 |
Sep 04 04:57:56 PM UTC 24 |
249914933 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1358203231 |
|
|
Sep 04 04:57:48 PM UTC 24 |
Sep 04 04:57:56 PM UTC 24 |
603307448 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.3066710975 |
|
|
Sep 04 04:57:38 PM UTC 24 |
Sep 04 04:57:57 PM UTC 24 |
176384276 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.2501312051 |
|
|
Sep 04 04:57:40 PM UTC 24 |
Sep 04 04:57:57 PM UTC 24 |
514866318 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.2493207736 |
|
|
Sep 04 04:57:42 PM UTC 24 |
Sep 04 04:57:57 PM UTC 24 |
364583841 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.629501956 |
|
|
Sep 04 04:57:55 PM UTC 24 |
Sep 04 04:57:58 PM UTC 24 |
34390426 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.281170894 |
|
|
Sep 04 04:54:25 PM UTC 24 |
Sep 04 04:57:58 PM UTC 24 |
40833682963 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.229094953 |
|
|
Sep 04 04:57:50 PM UTC 24 |
Sep 04 04:58:00 PM UTC 24 |
1332676394 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.3271212561 |
|
|
Sep 04 04:57:55 PM UTC 24 |
Sep 04 04:58:01 PM UTC 24 |
228778286 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.450814086 |
|
|
Sep 04 04:58:00 PM UTC 24 |
Sep 04 04:58:02 PM UTC 24 |
11882498 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.760119247 |
|
|
Sep 04 04:58:35 PM UTC 24 |
Sep 04 04:58:51 PM UTC 24 |
1556370558 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.1699941968 |
|
|
Sep 04 04:58:00 PM UTC 24 |
Sep 04 04:58:03 PM UTC 24 |
169553684 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.739999722 |
|
|
Sep 04 04:56:39 PM UTC 24 |
Sep 04 04:58:04 PM UTC 24 |
7395521183 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.1013107002 |
|
|
Sep 04 04:57:55 PM UTC 24 |
Sep 04 04:58:05 PM UTC 24 |
263872290 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.2870704241 |
|
|
Sep 04 04:58:49 PM UTC 24 |
Sep 04 04:58:52 PM UTC 24 |
107096508 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.3216085269 |
|
|
Sep 04 04:58:01 PM UTC 24 |
Sep 04 04:58:06 PM UTC 24 |
193146298 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_errors.4025540599 |
|
|
Sep 04 04:57:48 PM UTC 24 |
Sep 04 04:58:07 PM UTC 24 |
1843642836 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.3087273079 |
|
|
Sep 04 04:57:56 PM UTC 24 |
Sep 04 04:58:08 PM UTC 24 |
2798347869 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.2022101577 |
|
|
Sep 04 04:57:53 PM UTC 24 |
Sep 04 04:58:08 PM UTC 24 |
1591365414 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2129379371 |
|
|
Sep 04 04:58:07 PM UTC 24 |
Sep 04 04:58:10 PM UTC 24 |
46147464 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.287097000 |
|
|
Sep 04 04:57:57 PM UTC 24 |
Sep 04 04:58:11 PM UTC 24 |
389852379 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.3033749631 |
|
|
Sep 04 04:58:07 PM UTC 24 |
Sep 04 04:58:11 PM UTC 24 |
33005109 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1931275665 |
|
|
Sep 04 04:58:09 PM UTC 24 |
Sep 04 04:58:12 PM UTC 24 |
14577059 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.3388293302 |
|
|
Sep 04 04:57:57 PM UTC 24 |
Sep 04 04:58:12 PM UTC 24 |
601228928 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.200131906 |
|
|
Sep 04 04:55:56 PM UTC 24 |
Sep 04 04:58:12 PM UTC 24 |
19338444585 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3177199617 |
|
|
Sep 04 04:58:03 PM UTC 24 |
Sep 04 04:58:12 PM UTC 24 |
414904406 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.25446020 |
|
|
Sep 04 04:58:01 PM UTC 24 |
Sep 04 04:58:13 PM UTC 24 |
256014327 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.61297788 |
|
|
Sep 04 04:58:04 PM UTC 24 |
Sep 04 04:58:13 PM UTC 24 |
822583087 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1496562708 |
|
|
Sep 04 04:58:01 PM UTC 24 |
Sep 04 04:58:14 PM UTC 24 |
90068384 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.232750214 |
|
|
Sep 04 04:57:56 PM UTC 24 |
Sep 04 04:58:14 PM UTC 24 |
422659878 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.1101287334 |
|
|
Sep 04 04:58:10 PM UTC 24 |
Sep 04 04:58:14 PM UTC 24 |
40775523 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.338451214 |
|
|
Sep 04 04:58:03 PM UTC 24 |
Sep 04 04:58:14 PM UTC 24 |
537505791 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.3705361399 |
|
|
Sep 04 04:57:48 PM UTC 24 |
Sep 04 04:58:15 PM UTC 24 |
533640196 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.697434649 |
|
|
Sep 04 04:57:50 PM UTC 24 |
Sep 04 04:58:15 PM UTC 24 |
2439849446 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.2446187217 |
|
|
Sep 04 04:57:57 PM UTC 24 |
Sep 04 04:58:16 PM UTC 24 |
818760083 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.2622752438 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:18 PM UTC 24 |
92852340 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.4174497354 |
|
|
Sep 04 04:58:04 PM UTC 24 |
Sep 04 04:58:18 PM UTC 24 |
297640933 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.2483684581 |
|
|
Sep 04 04:58:09 PM UTC 24 |
Sep 04 04:58:19 PM UTC 24 |
119072406 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.2132830027 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:19 PM UTC 24 |
61849890 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.2598706510 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:21 PM UTC 24 |
34047589 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.4152821765 |
|
|
Sep 04 04:58:03 PM UTC 24 |
Sep 04 04:58:21 PM UTC 24 |
1494963140 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.2242573067 |
|
|
Sep 04 04:58:35 PM UTC 24 |
Sep 04 04:58:51 PM UTC 24 |
470797581 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.1134913873 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:21 PM UTC 24 |
61049131 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3305509932 |
|
|
Sep 04 04:58:00 PM UTC 24 |
Sep 04 04:58:22 PM UTC 24 |
737831237 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.3840680470 |
|
|
Sep 04 04:58:20 PM UTC 24 |
Sep 04 04:58:25 PM UTC 24 |
174023909 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.2259172051 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:25 PM UTC 24 |
880470996 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1143578615 |
|
|
Sep 04 04:58:23 PM UTC 24 |
Sep 04 04:58:25 PM UTC 24 |
68211990 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.229496696 |
|
|
Sep 04 04:57:55 PM UTC 24 |
Sep 04 04:58:26 PM UTC 24 |
1900314107 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.3153370674 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:26 PM UTC 24 |
226218044 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.1849654560 |
|
|
Sep 04 04:57:15 PM UTC 24 |
Sep 04 04:58:26 PM UTC 24 |
31172649095 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.1776617416 |
|
|
Sep 04 04:55:56 PM UTC 24 |
Sep 04 04:58:27 PM UTC 24 |
12687338152 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.4029196399 |
|
|
Sep 04 04:58:24 PM UTC 24 |
Sep 04 04:58:27 PM UTC 24 |
41494699 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.2489095889 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:27 PM UTC 24 |
404499762 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.1329666910 |
|
|
Sep 04 04:58:25 PM UTC 24 |
Sep 04 04:58:28 PM UTC 24 |
12145001 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.3551209376 |
|
|
Sep 04 04:57:57 PM UTC 24 |
Sep 04 04:58:28 PM UTC 24 |
3692824733 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.2373670621 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:29 PM UTC 24 |
210727800 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.2821201672 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:29 PM UTC 24 |
106915748 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.2172115945 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:30 PM UTC 24 |
1450252526 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.2732713029 |
|
|
Sep 04 04:58:18 PM UTC 24 |
Sep 04 04:58:31 PM UTC 24 |
620457496 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.3967140576 |
|
|
Sep 04 04:58:28 PM UTC 24 |
Sep 04 04:58:31 PM UTC 24 |
83574962 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.2358416776 |
|
|
Sep 04 04:58:20 PM UTC 24 |
Sep 04 04:58:32 PM UTC 24 |
1237347412 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.1276634199 |
|
|
Sep 04 04:59:38 PM UTC 24 |
Sep 04 04:59:48 PM UTC 24 |
1430791153 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.4244679626 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:33 PM UTC 24 |
3406550920 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.1755410918 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:58:34 PM UTC 24 |
169541858 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.140878209 |
|
|
Sep 04 04:58:15 PM UTC 24 |
Sep 04 04:58:34 PM UTC 24 |
1273966605 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.3227847105 |
|
|
Sep 04 04:58:20 PM UTC 24 |
Sep 04 04:58:34 PM UTC 24 |
670714677 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.507014931 |
|
|
Sep 04 04:58:23 PM UTC 24 |
Sep 04 04:58:34 PM UTC 24 |
903212938 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.4086019642 |
|
|
Sep 04 04:57:13 PM UTC 24 |
Sep 04 04:58:35 PM UTC 24 |
3973555384 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.4050306193 |
|
|
Sep 04 04:58:33 PM UTC 24 |
Sep 04 04:58:36 PM UTC 24 |
22214545 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.4002753031 |
|
|
Sep 04 04:58:09 PM UTC 24 |
Sep 04 04:58:36 PM UTC 24 |
425837162 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.2549067720 |
|
|
Sep 04 04:58:28 PM UTC 24 |
Sep 04 04:58:36 PM UTC 24 |
269856072 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.486829170 |
|
|
Sep 04 04:58:33 PM UTC 24 |
Sep 04 04:58:38 PM UTC 24 |
411243879 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1899271872 |
|
|
Sep 04 04:58:28 PM UTC 24 |
Sep 04 04:58:39 PM UTC 24 |
253809436 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.3295529262 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:58:39 PM UTC 24 |
632442002 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.2267056084 |
|
|
Sep 04 04:58:35 PM UTC 24 |
Sep 04 04:58:39 PM UTC 24 |
21075666 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.3685513328 |
|
|
Sep 04 04:58:33 PM UTC 24 |
Sep 04 04:58:41 PM UTC 24 |
82543025 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.698890183 |
|
|
Sep 04 04:58:39 PM UTC 24 |
Sep 04 04:58:41 PM UTC 24 |
39432100 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.3204506147 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:58:42 PM UTC 24 |
270810703 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.1599167345 |
|
|
Sep 04 04:58:40 PM UTC 24 |
Sep 04 04:58:42 PM UTC 24 |
40388408 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.300812000 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:58:44 PM UTC 24 |
1726264988 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.3898519703 |
|
|
Sep 04 04:58:17 PM UTC 24 |
Sep 04 04:58:44 PM UTC 24 |
255066860 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.1374985298 |
|
|
Sep 04 04:58:40 PM UTC 24 |
Sep 04 04:58:45 PM UTC 24 |
81861700 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.3453343235 |
|
|
Sep 04 04:58:51 PM UTC 24 |
Sep 04 04:58:53 PM UTC 24 |
124020211 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.4182889717 |
|
|
Sep 04 04:58:37 PM UTC 24 |
Sep 04 04:58:47 PM UTC 24 |
210862566 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.2158243702 |
|
|
Sep 04 04:58:42 PM UTC 24 |
Sep 04 04:58:48 PM UTC 24 |
71263681 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.865583478 |
|
|
Sep 04 04:58:37 PM UTC 24 |
Sep 04 04:58:48 PM UTC 24 |
246939772 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.1248061125 |
|
|
Sep 04 04:58:43 PM UTC 24 |
Sep 04 04:58:49 PM UTC 24 |
70141528 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.3633843973 |
|
|
Sep 04 04:58:28 PM UTC 24 |
Sep 04 04:58:50 PM UTC 24 |
455418225 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.4194261436 |
|
|
Sep 04 04:58:45 PM UTC 24 |
Sep 04 04:58:50 PM UTC 24 |
148583787 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.153643512 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:58:54 PM UTC 24 |
1438706187 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.1519115858 |
|
|
Sep 04 04:58:43 PM UTC 24 |
Sep 04 04:58:55 PM UTC 24 |
324877596 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.945775777 |
|
|
Sep 04 04:58:51 PM UTC 24 |
Sep 04 04:58:55 PM UTC 24 |
30230504 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.1535445207 |
|
|
Sep 04 04:58:53 PM UTC 24 |
Sep 04 04:58:57 PM UTC 24 |
294127668 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.4171544293 |
|
|
Sep 04 04:58:35 PM UTC 24 |
Sep 04 04:58:58 PM UTC 24 |
1379238198 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.2869282906 |
|
|
Sep 04 04:58:35 PM UTC 24 |
Sep 04 04:58:58 PM UTC 24 |
888066537 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.1950009459 |
|
|
Sep 04 04:56:58 PM UTC 24 |
Sep 04 04:58:58 PM UTC 24 |
154212885504 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.1538962214 |
|
|
Sep 04 04:58:53 PM UTC 24 |
Sep 04 04:58:59 PM UTC 24 |
107524013 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.4013144291 |
|
|
Sep 04 04:58:45 PM UTC 24 |
Sep 04 04:59:00 PM UTC 24 |
2083331523 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all.2127501822 |
|
|
Sep 04 04:58:31 PM UTC 24 |
Sep 04 04:59:00 PM UTC 24 |
9010867639 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.3617768153 |
|
|
Sep 04 04:58:56 PM UTC 24 |
Sep 04 04:59:00 PM UTC 24 |
461803689 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.3297368626 |
|
|
Sep 04 04:59:46 PM UTC 24 |
Sep 04 04:59:49 PM UTC 24 |
22330393 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.1365742584 |
|
|
Sep 04 04:58:43 PM UTC 24 |
Sep 04 04:59:00 PM UTC 24 |
1439312951 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.3935756425 |
|
|
Sep 04 04:58:46 PM UTC 24 |
Sep 04 04:59:00 PM UTC 24 |
646826886 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.975530595 |
|
|
Sep 04 04:58:40 PM UTC 24 |
Sep 04 04:59:01 PM UTC 24 |
208272692 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.3322776202 |
|
|
Sep 04 04:58:28 PM UTC 24 |
Sep 04 04:59:02 PM UTC 24 |
317726650 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.2559149773 |
|
|
Sep 04 04:59:01 PM UTC 24 |
Sep 04 04:59:03 PM UTC 24 |
12474566 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.2338023916 |
|
|
Sep 04 04:59:01 PM UTC 24 |
Sep 04 04:59:04 PM UTC 24 |
16635719 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.2659004986 |
|
|
Sep 04 04:58:57 PM UTC 24 |
Sep 04 04:59:05 PM UTC 24 |
404068258 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.2508186844 |
|
|
Sep 04 04:59:01 PM UTC 24 |
Sep 04 04:59:06 PM UTC 24 |
179393102 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.3858560647 |
|
|
Sep 04 04:58:33 PM UTC 24 |
Sep 04 04:59:06 PM UTC 24 |
355078066 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.98686815 |
|
|
Sep 04 04:58:49 PM UTC 24 |
Sep 04 04:59:06 PM UTC 24 |
1334972944 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.4194815132 |
|
|
Sep 04 04:58:56 PM UTC 24 |
Sep 04 04:59:06 PM UTC 24 |
517495588 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.3593459442 |
|
|
Sep 04 04:58:54 PM UTC 24 |
Sep 04 04:59:08 PM UTC 24 |
627417359 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.1119276608 |
|
|
Sep 04 04:59:03 PM UTC 24 |
Sep 04 04:59:09 PM UTC 24 |
659983152 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.3824541662 |
|
|
Sep 04 04:59:03 PM UTC 24 |
Sep 04 04:59:09 PM UTC 24 |
1457188689 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.2673547260 |
|
|
Sep 04 04:58:56 PM UTC 24 |
Sep 04 04:59:09 PM UTC 24 |
1296334752 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.2835783538 |
|
|
Sep 04 04:59:44 PM UTC 24 |
Sep 04 04:59:47 PM UTC 24 |
36799753 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.744081776 |
|
|
Sep 04 04:59:08 PM UTC 24 |
Sep 04 04:59:11 PM UTC 24 |
15826066 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.280588552 |
|
|
Sep 04 04:59:08 PM UTC 24 |
Sep 04 04:59:11 PM UTC 24 |
21047850 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.3817839369 |
|
|
Sep 04 04:59:08 PM UTC 24 |
Sep 04 04:59:11 PM UTC 24 |
22606079 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.3393222505 |
|
|
Sep 04 04:58:53 PM UTC 24 |
Sep 04 04:59:12 PM UTC 24 |
1075047907 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.4165951584 |
|
|
Sep 04 04:59:01 PM UTC 24 |
Sep 04 04:59:13 PM UTC 24 |
216223768 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.2267510963 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:45 PM UTC 24 |
641762633 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.1499532391 |
|
|
Sep 04 04:59:44 PM UTC 24 |
Sep 04 04:59:47 PM UTC 24 |
22638962 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.540313422 |
|
|
Sep 04 04:59:05 PM UTC 24 |
Sep 04 04:59:14 PM UTC 24 |
1026692026 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.3401812913 |
|
|
Sep 04 04:59:05 PM UTC 24 |
Sep 04 04:59:14 PM UTC 24 |
767242434 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.65737947 |
|
|
Sep 04 04:59:10 PM UTC 24 |
Sep 04 04:59:16 PM UTC 24 |
481002997 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.1271670588 |
|
|
Sep 04 04:59:03 PM UTC 24 |
Sep 04 04:59:16 PM UTC 24 |
649104910 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.2454142490 |
|
|
Sep 04 04:59:15 PM UTC 24 |
Sep 04 04:59:18 PM UTC 24 |
54373176 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.4044964853 |
|
|
Sep 04 04:59:15 PM UTC 24 |
Sep 04 04:59:18 PM UTC 24 |
44685639 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.1711082625 |
|
|
Sep 04 04:58:59 PM UTC 24 |
Sep 04 04:59:19 PM UTC 24 |
641204871 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.242274951 |
|
|
Sep 04 04:59:01 PM UTC 24 |
Sep 04 04:59:20 PM UTC 24 |
858867081 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.2584193153 |
|
|
Sep 04 04:59:03 PM UTC 24 |
Sep 04 04:59:20 PM UTC 24 |
278732864 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.3368495304 |
|
|
Sep 04 04:59:10 PM UTC 24 |
Sep 04 04:59:20 PM UTC 24 |
217717749 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.3084892678 |
|
|
Sep 04 04:59:18 PM UTC 24 |
Sep 04 04:59:20 PM UTC 24 |
24600290 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.1918405051 |
|
|
Sep 04 04:59:05 PM UTC 24 |
Sep 04 04:59:21 PM UTC 24 |
371708606 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3347416081 |
|
|
Sep 04 04:59:12 PM UTC 24 |
Sep 04 04:59:23 PM UTC 24 |
244327959 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.3027431970 |
|
|
Sep 04 04:59:12 PM UTC 24 |
Sep 04 04:59:23 PM UTC 24 |
477840625 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.2096003142 |
|
|
Sep 04 04:59:20 PM UTC 24 |
Sep 04 04:59:24 PM UTC 24 |
166171391 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.2819131108 |
|
|
Sep 04 04:59:12 PM UTC 24 |
Sep 04 04:59:24 PM UTC 24 |
470266156 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3718344826 |
|
|
Sep 04 04:58:51 PM UTC 24 |
Sep 04 04:59:26 PM UTC 24 |
462387047 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.3076092894 |
|
|
Sep 04 04:59:14 PM UTC 24 |
Sep 04 04:59:26 PM UTC 24 |
287275502 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.3854470645 |
|
|
Sep 04 04:59:36 PM UTC 24 |
Sep 04 04:59:47 PM UTC 24 |
926118213 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.1462506484 |
|
|
Sep 04 04:57:43 PM UTC 24 |
Sep 04 04:59:28 PM UTC 24 |
13885486025 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.2296806610 |
|
|
Sep 04 04:59:12 PM UTC 24 |
Sep 04 04:59:28 PM UTC 24 |
1125194646 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.4056686806 |
|
|
Sep 04 04:59:22 PM UTC 24 |
Sep 04 04:59:28 PM UTC 24 |
486497590 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.13051078 |
|
|
Sep 04 04:59:26 PM UTC 24 |
Sep 04 04:59:28 PM UTC 24 |
29074734 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.2829417910 |
|
|
Sep 04 04:59:19 PM UTC 24 |
Sep 04 04:59:29 PM UTC 24 |
92946279 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.1747775724 |
|
|
Sep 04 04:59:26 PM UTC 24 |
Sep 04 04:59:29 PM UTC 24 |
129319219 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2253428219 |
|
|
Sep 04 04:59:27 PM UTC 24 |
Sep 04 04:59:29 PM UTC 24 |
50151394 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.1915033709 |
|
|
Sep 04 04:57:53 PM UTC 24 |
Sep 04 04:59:31 PM UTC 24 |
13690521988 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_stress_all_with_rand_reset.2535195061 |
|
|
Sep 04 04:59:24 PM UTC 24 |
Sep 04 04:59:32 PM UTC 24 |
248054196 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.14019102 |
|
|
Sep 04 04:59:12 PM UTC 24 |
Sep 04 04:59:32 PM UTC 24 |
557577859 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.2469633049 |
|
|
Sep 04 04:57:21 PM UTC 24 |
Sep 04 04:59:33 PM UTC 24 |
45411479962 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.2720328949 |
|
|
Sep 04 04:59:22 PM UTC 24 |
Sep 04 04:59:35 PM UTC 24 |
446224903 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.1220358847 |
|
|
Sep 04 04:59:33 PM UTC 24 |
Sep 04 04:59:35 PM UTC 24 |
50124268 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.1921906858 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:36 PM UTC 24 |
361843014 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.2450732561 |
|
|
Sep 04 04:59:22 PM UTC 24 |
Sep 04 04:59:36 PM UTC 24 |
1388387855 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.882527684 |
|
|
Sep 04 04:59:35 PM UTC 24 |
Sep 04 04:59:37 PM UTC 24 |
71181754 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.3322645661 |
|
|
Sep 04 04:59:18 PM UTC 24 |
Sep 04 04:59:37 PM UTC 24 |
545419866 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.2319516063 |
|
|
Sep 04 04:59:35 PM UTC 24 |
Sep 04 04:59:38 PM UTC 24 |
150281802 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.2722976142 |
|
|
Sep 04 04:59:30 PM UTC 24 |
Sep 04 04:59:39 PM UTC 24 |
192634987 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.2042561987 |
|
|
Sep 04 04:59:36 PM UTC 24 |
Sep 04 04:59:41 PM UTC 24 |
136618189 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.166028646 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:41 PM UTC 24 |
982552584 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.358162856 |
|
|
Sep 04 04:59:38 PM UTC 24 |
Sep 04 04:59:41 PM UTC 24 |
130920854 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3092320448 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:42 PM UTC 24 |
274464241 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.899094403 |
|
|
Sep 04 04:59:22 PM UTC 24 |
Sep 04 04:59:43 PM UTC 24 |
663454749 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.840933120 |
|
|
Sep 04 04:59:22 PM UTC 24 |
Sep 04 04:59:43 PM UTC 24 |
1310521402 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.3935856403 |
|
|
Sep 04 04:59:10 PM UTC 24 |
Sep 04 04:59:44 PM UTC 24 |
318297933 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.361623526 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:45 PM UTC 24 |
306313327 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_stress_all.1057524744 |
|
|
Sep 04 04:59:24 PM UTC 24 |
Sep 04 04:59:50 PM UTC 24 |
4086328433 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.2712944370 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:51 PM UTC 24 |
1277600109 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.3486357533 |
|
|
Sep 04 04:59:46 PM UTC 24 |
Sep 04 04:59:52 PM UTC 24 |
79121179 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.3803711357 |
|
|
Sep 04 04:59:27 PM UTC 24 |
Sep 04 04:59:52 PM UTC 24 |
848144870 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all_with_rand_reset.2416536300 |
|
|
Sep 04 04:58:23 PM UTC 24 |
Sep 04 04:59:52 PM UTC 24 |
4964015786 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.2304583707 |
|
|
Sep 04 04:57:27 PM UTC 24 |
Sep 04 04:59:53 PM UTC 24 |
7748296859 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.1182737596 |
|
|
Sep 04 04:59:38 PM UTC 24 |
Sep 04 04:59:54 PM UTC 24 |
1821467550 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.911899250 |
|
|
Sep 04 04:59:52 PM UTC 24 |
Sep 04 04:59:54 PM UTC 24 |
81333663 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.1491464674 |
|
|
Sep 04 04:59:41 PM UTC 24 |
Sep 04 04:59:54 PM UTC 24 |
397329013 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.1408729849 |
|
|
Sep 04 04:59:53 PM UTC 24 |
Sep 04 04:59:56 PM UTC 24 |
20614246 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all.4276302705 |
|
|
Sep 04 04:57:34 PM UTC 24 |
Sep 04 04:59:56 PM UTC 24 |
25749317018 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.2450982271 |
|
|
Sep 04 04:59:39 PM UTC 24 |
Sep 04 04:59:56 PM UTC 24 |
621168890 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.3931285076 |
|
|
Sep 04 04:59:52 PM UTC 24 |
Sep 04 04:59:57 PM UTC 24 |
50509079 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.1156060809 |
|
|
Sep 04 04:59:31 PM UTC 24 |
Sep 04 04:59:58 PM UTC 24 |
1058354488 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.3878467356 |
|
|
Sep 04 04:59:46 PM UTC 24 |
Sep 04 04:59:59 PM UTC 24 |
91485804 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.3682788823 |
|
|
Sep 04 04:59:55 PM UTC 24 |
Sep 04 04:59:59 PM UTC 24 |
24577099 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.443220189 |
|
|
Sep 04 04:59:53 PM UTC 24 |
Sep 04 05:00:00 PM UTC 24 |
280107431 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.4064600413 |
|
|
Sep 04 04:59:42 PM UTC 24 |
Sep 04 05:00:01 PM UTC 24 |
1223871495 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all_with_rand_reset.2078505205 |
|
|
Sep 04 04:57:53 PM UTC 24 |
Sep 04 05:00:01 PM UTC 24 |
23989030945 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all.3797263741 |
|
|
Sep 04 04:58:49 PM UTC 24 |
Sep 04 05:00:01 PM UTC 24 |
14940403966 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.667391138 |
|
|
Sep 04 04:59:48 PM UTC 24 |
Sep 04 05:00:02 PM UTC 24 |
1073329604 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.2754149598 |
|
|
Sep 04 04:59:48 PM UTC 24 |
Sep 04 05:00:02 PM UTC 24 |
232840610 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.437884928 |
|
|
Sep 04 04:57:57 PM UTC 24 |
Sep 04 05:00:02 PM UTC 24 |
2268674593 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.2576025264 |
|
|
Sep 04 04:59:48 PM UTC 24 |
Sep 04 05:00:02 PM UTC 24 |
1406240925 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.3977765961 |
|
|
Sep 04 04:59:48 PM UTC 24 |
Sep 04 05:00:03 PM UTC 24 |
525897658 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.1752171846 |
|
|
Sep 04 04:57:58 PM UTC 24 |
Sep 04 05:00:04 PM UTC 24 |
15795614971 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.1104099546 |
|
|
Sep 04 04:59:50 PM UTC 24 |
Sep 04 05:00:05 PM UTC 24 |
3082871106 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.4246446819 |
|
|
Sep 04 05:00:00 PM UTC 24 |
Sep 04 05:00:06 PM UTC 24 |
77134143 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.3538315105 |
|
|
Sep 04 05:00:00 PM UTC 24 |
Sep 04 05:00:07 PM UTC 24 |
20450590 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.1248780624 |
|
|
Sep 04 04:59:36 PM UTC 24 |
Sep 04 05:00:07 PM UTC 24 |
253060051 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.1836021662 |
|
|
Sep 04 05:00:00 PM UTC 24 |
Sep 04 05:00:08 PM UTC 24 |
25887160 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_mux.1210272087 |
|
|
Sep 04 04:59:57 PM UTC 24 |
Sep 04 05:00:08 PM UTC 24 |
688782915 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.1917756556 |
|
|
Sep 04 04:59:48 PM UTC 24 |
Sep 04 05:00:09 PM UTC 24 |
1361564270 ps |