| T360 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_prog_failure.3814107040 |
|
|
Sep 09 10:28:03 PM UTC 24 |
Sep 09 10:28:08 PM UTC 24 |
182126176 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_errors.2309222227 |
|
|
Sep 09 10:27:46 PM UTC 24 |
Sep 09 10:28:09 PM UTC 24 |
707284638 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_mux.693321629 |
|
|
Sep 09 10:27:54 PM UTC 24 |
Sep 09 10:28:10 PM UTC 24 |
1117981860 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.1086903170 |
|
|
Sep 09 10:28:05 PM UTC 24 |
Sep 09 10:28:11 PM UTC 24 |
279029007 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.4209126409 |
|
|
Sep 09 10:27:55 PM UTC 24 |
Sep 09 10:28:11 PM UTC 24 |
332971160 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.1899379491 |
|
|
Sep 09 10:27:45 PM UTC 24 |
Sep 09 10:28:12 PM UTC 24 |
246774607 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.4173461399 |
|
|
Sep 09 10:27:49 PM UTC 24 |
Sep 09 10:28:12 PM UTC 24 |
301756911 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.3200564288 |
|
|
Sep 09 10:27:54 PM UTC 24 |
Sep 09 10:28:13 PM UTC 24 |
330156632 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.4058607818 |
|
|
Sep 09 10:28:11 PM UTC 24 |
Sep 09 10:28:16 PM UTC 24 |
154768293 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.259705856 |
|
|
Sep 09 10:28:10 PM UTC 24 |
Sep 09 10:28:17 PM UTC 24 |
1747157107 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.3224216659 |
|
|
Sep 09 10:28:17 PM UTC 24 |
Sep 09 10:28:19 PM UTC 24 |
83313988 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.2791586911 |
|
|
Sep 09 10:28:18 PM UTC 24 |
Sep 09 10:28:21 PM UTC 24 |
39422405 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.3420386818 |
|
|
Sep 09 10:29:15 PM UTC 24 |
Sep 09 10:29:23 PM UTC 24 |
320818240 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.2863657077 |
|
|
Sep 09 10:28:20 PM UTC 24 |
Sep 09 10:28:23 PM UTC 24 |
13836326 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.588978661 |
|
|
Sep 09 10:28:04 PM UTC 24 |
Sep 09 10:28:23 PM UTC 24 |
585358739 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.212194022 |
|
|
Sep 09 10:27:16 PM UTC 24 |
Sep 09 10:28:23 PM UTC 24 |
14304046574 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3634811819 |
|
|
Sep 09 10:27:50 PM UTC 24 |
Sep 09 10:28:23 PM UTC 24 |
6421177427 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.3271682710 |
|
|
Sep 09 10:28:02 PM UTC 24 |
Sep 09 10:28:27 PM UTC 24 |
343510414 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.639025208 |
|
|
Sep 09 10:28:12 PM UTC 24 |
Sep 09 10:28:27 PM UTC 24 |
283586210 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.479191545 |
|
|
Sep 09 10:28:23 PM UTC 24 |
Sep 09 10:28:28 PM UTC 24 |
861203470 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.740451361 |
|
|
Sep 09 10:28:11 PM UTC 24 |
Sep 09 10:28:28 PM UTC 24 |
269541291 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.1576785460 |
|
|
Sep 09 10:28:12 PM UTC 24 |
Sep 09 10:28:31 PM UTC 24 |
292281848 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.2401336048 |
|
|
Sep 09 10:28:25 PM UTC 24 |
Sep 09 10:28:31 PM UTC 24 |
186988626 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.6701687 |
|
|
Sep 09 10:28:09 PM UTC 24 |
Sep 09 10:28:33 PM UTC 24 |
4383527365 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.605744552 |
|
|
Sep 09 10:28:23 PM UTC 24 |
Sep 09 10:28:36 PM UTC 24 |
284065088 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.1511685427 |
|
|
Sep 09 10:28:28 PM UTC 24 |
Sep 09 10:28:37 PM UTC 24 |
744965366 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_errors.2187511378 |
|
|
Sep 09 10:28:04 PM UTC 24 |
Sep 09 10:28:40 PM UTC 24 |
2450324041 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.3868468820 |
|
|
Sep 09 10:28:32 PM UTC 24 |
Sep 09 10:28:41 PM UTC 24 |
932465447 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1940718131 |
|
|
Sep 09 10:28:25 PM UTC 24 |
Sep 09 10:28:41 PM UTC 24 |
297424598 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.2875778249 |
|
|
Sep 09 10:28:25 PM UTC 24 |
Sep 09 10:28:41 PM UTC 24 |
929086436 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.1054925057 |
|
|
Sep 09 10:28:42 PM UTC 24 |
Sep 09 10:28:44 PM UTC 24 |
42762252 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.1405717486 |
|
|
Sep 09 10:27:25 PM UTC 24 |
Sep 09 10:28:44 PM UTC 24 |
7580300242 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.1024821216 |
|
|
Sep 09 10:27:49 PM UTC 24 |
Sep 09 10:28:45 PM UTC 24 |
7086505583 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1026433774 |
|
|
Sep 09 10:28:43 PM UTC 24 |
Sep 09 10:28:46 PM UTC 24 |
16117653 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.3777587652 |
|
|
Sep 09 10:28:42 PM UTC 24 |
Sep 09 10:28:46 PM UTC 24 |
327198423 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.2611743956 |
|
|
Sep 09 10:27:00 PM UTC 24 |
Sep 09 10:28:48 PM UTC 24 |
45321843267 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.2205955016 |
|
|
Sep 09 10:28:28 PM UTC 24 |
Sep 09 10:28:49 PM UTC 24 |
540109982 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.2123818718 |
|
|
Sep 09 10:28:34 PM UTC 24 |
Sep 09 10:28:49 PM UTC 24 |
395956797 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.953395061 |
|
|
Sep 09 10:28:46 PM UTC 24 |
Sep 09 10:28:49 PM UTC 24 |
16600282 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2715968536 |
|
|
Sep 09 10:27:41 PM UTC 24 |
Sep 09 10:28:52 PM UTC 24 |
9585077586 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.963902870 |
|
|
Sep 09 10:27:36 PM UTC 24 |
Sep 09 10:28:52 PM UTC 24 |
8170951536 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.82809161 |
|
|
Sep 09 10:28:49 PM UTC 24 |
Sep 09 10:28:53 PM UTC 24 |
485300400 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.901101626 |
|
|
Sep 09 10:28:32 PM UTC 24 |
Sep 09 10:28:53 PM UTC 24 |
1345737053 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.3097293618 |
|
|
Sep 09 10:28:37 PM UTC 24 |
Sep 09 10:28:53 PM UTC 24 |
375840533 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1642080687 |
|
|
Sep 09 10:28:45 PM UTC 24 |
Sep 09 10:28:58 PM UTC 24 |
489582623 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.1005719196 |
|
|
Sep 09 10:28:46 PM UTC 24 |
Sep 09 10:29:01 PM UTC 24 |
1742771506 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.3516310424 |
|
|
Sep 09 10:27:33 PM UTC 24 |
Sep 09 10:29:02 PM UTC 24 |
3412717251 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2527993176 |
|
|
Sep 09 10:28:21 PM UTC 24 |
Sep 09 10:29:05 PM UTC 24 |
2194121864 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3580297198 |
|
|
Sep 09 10:28:55 PM UTC 24 |
Sep 09 10:29:06 PM UTC 24 |
296469899 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.104281423 |
|
|
Sep 09 10:29:03 PM UTC 24 |
Sep 09 10:29:06 PM UTC 24 |
51105119 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.2863458441 |
|
|
Sep 09 10:25:41 PM UTC 24 |
Sep 09 10:29:07 PM UTC 24 |
12232347524 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.719113209 |
|
|
Sep 09 10:29:06 PM UTC 24 |
Sep 09 10:29:09 PM UTC 24 |
24480855 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.341472499 |
|
|
Sep 09 10:29:07 PM UTC 24 |
Sep 09 10:29:09 PM UTC 24 |
15102825 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.3721329940 |
|
|
Sep 09 10:28:55 PM UTC 24 |
Sep 09 10:29:13 PM UTC 24 |
2994237913 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3696667949 |
|
|
Sep 09 10:29:09 PM UTC 24 |
Sep 09 10:29:13 PM UTC 24 |
48889618 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.2842265914 |
|
|
Sep 09 10:28:50 PM UTC 24 |
Sep 09 10:29:13 PM UTC 24 |
1847711332 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.1121715571 |
|
|
Sep 09 10:29:08 PM UTC 24 |
Sep 09 10:29:14 PM UTC 24 |
521580826 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.1954568680 |
|
|
Sep 09 10:28:50 PM UTC 24 |
Sep 09 10:29:14 PM UTC 24 |
751351398 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.227511887 |
|
|
Sep 09 10:28:53 PM UTC 24 |
Sep 09 10:29:17 PM UTC 24 |
14617813616 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.2620883914 |
|
|
Sep 09 10:28:52 PM UTC 24 |
Sep 09 10:29:18 PM UTC 24 |
1232213025 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.254104001 |
|
|
Sep 09 10:28:38 PM UTC 24 |
Sep 09 10:29:18 PM UTC 24 |
8503085323 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.3485007662 |
|
|
Sep 09 10:28:45 PM UTC 24 |
Sep 09 10:29:19 PM UTC 24 |
839581070 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.1326340124 |
|
|
Sep 09 10:28:53 PM UTC 24 |
Sep 09 10:29:19 PM UTC 24 |
571590431 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.1208316987 |
|
|
Sep 09 10:28:06 PM UTC 24 |
Sep 09 10:29:20 PM UTC 24 |
1896148587 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.805888357 |
|
|
Sep 09 10:28:46 PM UTC 24 |
Sep 09 10:29:22 PM UTC 24 |
2771548123 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.217395492 |
|
|
Sep 09 10:28:28 PM UTC 24 |
Sep 09 10:29:22 PM UTC 24 |
4398500884 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.26817396 |
|
|
Sep 09 10:29:23 PM UTC 24 |
Sep 09 10:29:26 PM UTC 24 |
33565132 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.525050718 |
|
|
Sep 09 10:29:24 PM UTC 24 |
Sep 09 10:29:27 PM UTC 24 |
24891106 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.3111755836 |
|
|
Sep 09 10:27:42 PM UTC 24 |
Sep 09 10:29:28 PM UTC 24 |
3509223465 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.2187454661 |
|
|
Sep 09 10:29:27 PM UTC 24 |
Sep 09 10:29:29 PM UTC 24 |
48527175 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.4054448664 |
|
|
Sep 09 10:29:20 PM UTC 24 |
Sep 09 10:29:30 PM UTC 24 |
324008744 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.1441760966 |
|
|
Sep 09 10:29:16 PM UTC 24 |
Sep 09 10:29:31 PM UTC 24 |
1103200730 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2688468795 |
|
|
Sep 09 10:28:14 PM UTC 24 |
Sep 09 10:29:32 PM UTC 24 |
12889970090 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.4180600883 |
|
|
Sep 09 10:29:10 PM UTC 24 |
Sep 09 10:29:32 PM UTC 24 |
283521583 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.942606510 |
|
|
Sep 09 10:29:20 PM UTC 24 |
Sep 09 10:29:32 PM UTC 24 |
277305143 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.960471114 |
|
|
Sep 09 10:30:27 PM UTC 24 |
Sep 09 10:30:43 PM UTC 24 |
485992326 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.4007264647 |
|
|
Sep 09 10:29:29 PM UTC 24 |
Sep 09 10:29:34 PM UTC 24 |
698561250 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.2454316737 |
|
|
Sep 09 10:29:07 PM UTC 24 |
Sep 09 10:29:37 PM UTC 24 |
370309213 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.3045439516 |
|
|
Sep 09 10:28:10 PM UTC 24 |
Sep 09 10:29:38 PM UTC 24 |
19589414014 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.755088774 |
|
|
Sep 09 10:29:20 PM UTC 24 |
Sep 09 10:29:40 PM UTC 24 |
274413942 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2060670218 |
|
|
Sep 09 10:29:28 PM UTC 24 |
Sep 09 10:29:40 PM UTC 24 |
286425172 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.600610016 |
|
|
Sep 09 10:29:31 PM UTC 24 |
Sep 09 10:29:41 PM UTC 24 |
204076496 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2212045458 |
|
|
Sep 09 10:28:30 PM UTC 24 |
Sep 09 10:29:42 PM UTC 24 |
6758905359 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.782810004 |
|
|
Sep 09 10:27:05 PM UTC 24 |
Sep 09 10:29:42 PM UTC 24 |
30514887207 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.3684062873 |
|
|
Sep 09 10:29:20 PM UTC 24 |
Sep 09 10:29:43 PM UTC 24 |
1469674151 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.1630419618 |
|
|
Sep 09 10:29:35 PM UTC 24 |
Sep 09 10:29:44 PM UTC 24 |
283443226 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.1487250207 |
|
|
Sep 09 10:29:33 PM UTC 24 |
Sep 09 10:29:46 PM UTC 24 |
453643856 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.4089787204 |
|
|
Sep 09 10:29:43 PM UTC 24 |
Sep 09 10:29:46 PM UTC 24 |
44426158 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.933776957 |
|
|
Sep 09 10:29:30 PM UTC 24 |
Sep 09 10:29:46 PM UTC 24 |
323343297 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.1664109829 |
|
|
Sep 09 10:29:44 PM UTC 24 |
Sep 09 10:29:47 PM UTC 24 |
41512309 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.2821748719 |
|
|
Sep 09 10:29:16 PM UTC 24 |
Sep 09 10:29:47 PM UTC 24 |
657640096 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.4194469505 |
|
|
Sep 09 10:29:43 PM UTC 24 |
Sep 09 10:29:47 PM UTC 24 |
56122302 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.3174874980 |
|
|
Sep 09 10:29:30 PM UTC 24 |
Sep 09 10:29:48 PM UTC 24 |
883670158 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.4122090029 |
|
|
Sep 09 10:29:18 PM UTC 24 |
Sep 09 10:29:49 PM UTC 24 |
3019040963 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.815229079 |
|
|
Sep 09 10:29:39 PM UTC 24 |
Sep 09 10:29:49 PM UTC 24 |
270649919 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.4040626990 |
|
|
Sep 09 10:29:38 PM UTC 24 |
Sep 09 10:29:51 PM UTC 24 |
7596223576 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.3098371587 |
|
|
Sep 09 10:29:47 PM UTC 24 |
Sep 09 10:29:52 PM UTC 24 |
1411224523 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.288776804 |
|
|
Sep 09 10:29:48 PM UTC 24 |
Sep 09 10:29:53 PM UTC 24 |
947801728 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.530008621 |
|
|
Sep 09 10:25:16 PM UTC 24 |
Sep 09 10:29:54 PM UTC 24 |
28668647333 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.4040286522 |
|
|
Sep 09 10:29:44 PM UTC 24 |
Sep 09 10:29:56 PM UTC 24 |
203423273 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.738610367 |
|
|
Sep 09 10:29:33 PM UTC 24 |
Sep 09 10:29:57 PM UTC 24 |
4889790727 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.1038561316 |
|
|
Sep 09 10:29:58 PM UTC 24 |
Sep 09 10:30:00 PM UTC 24 |
24370970 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.1878888405 |
|
|
Sep 09 10:29:27 PM UTC 24 |
Sep 09 10:30:00 PM UTC 24 |
1476335062 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.3117593944 |
|
|
Sep 09 10:29:53 PM UTC 24 |
Sep 09 10:30:01 PM UTC 24 |
5313709956 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.1650153124 |
|
|
Sep 09 10:29:47 PM UTC 24 |
Sep 09 10:30:03 PM UTC 24 |
322051018 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.3577738066 |
|
|
Sep 09 10:30:01 PM UTC 24 |
Sep 09 10:30:03 PM UTC 24 |
123446046 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.1385842359 |
|
|
Sep 09 10:29:40 PM UTC 24 |
Sep 09 10:30:04 PM UTC 24 |
869786353 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.1472149452 |
|
|
Sep 09 10:29:51 PM UTC 24 |
Sep 09 10:30:06 PM UTC 24 |
875260904 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.3936655806 |
|
|
Sep 09 10:29:49 PM UTC 24 |
Sep 09 10:30:07 PM UTC 24 |
1096743362 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.1318715626 |
|
|
Sep 09 10:30:01 PM UTC 24 |
Sep 09 10:30:08 PM UTC 24 |
245979446 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.4105301144 |
|
|
Sep 09 10:29:52 PM UTC 24 |
Sep 09 10:30:08 PM UTC 24 |
331568240 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2904192345 |
|
|
Sep 09 10:30:03 PM UTC 24 |
Sep 09 10:30:08 PM UTC 24 |
66334107 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.507181379 |
|
|
Sep 09 10:29:48 PM UTC 24 |
Sep 09 10:30:08 PM UTC 24 |
1211465654 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.1001139806 |
|
|
Sep 09 10:29:44 PM UTC 24 |
Sep 09 10:30:10 PM UTC 24 |
3308116236 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1508969591 |
|
|
Sep 09 10:30:04 PM UTC 24 |
Sep 09 10:30:11 PM UTC 24 |
88564121 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.3261426744 |
|
|
Sep 09 10:29:47 PM UTC 24 |
Sep 09 10:30:12 PM UTC 24 |
1891230766 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.401606885 |
|
|
Sep 09 10:30:08 PM UTC 24 |
Sep 09 10:30:12 PM UTC 24 |
550095390 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.1366601536 |
|
|
Sep 09 10:29:15 PM UTC 24 |
Sep 09 10:30:15 PM UTC 24 |
8027271616 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.3645774940 |
|
|
Sep 09 10:30:06 PM UTC 24 |
Sep 09 10:30:19 PM UTC 24 |
271775730 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.953525742 |
|
|
Sep 09 10:29:54 PM UTC 24 |
Sep 09 10:30:20 PM UTC 24 |
2532523508 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.3615652158 |
|
|
Sep 09 10:30:08 PM UTC 24 |
Sep 09 10:30:20 PM UTC 24 |
227629360 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.207664771 |
|
|
Sep 09 10:30:13 PM UTC 24 |
Sep 09 10:30:21 PM UTC 24 |
185411973 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3231892342 |
|
|
Sep 09 10:30:12 PM UTC 24 |
Sep 09 10:30:22 PM UTC 24 |
521243563 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.2726521794 |
|
|
Sep 09 10:30:21 PM UTC 24 |
Sep 09 10:30:23 PM UTC 24 |
14356943 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.434776296 |
|
|
Sep 09 10:30:02 PM UTC 24 |
Sep 09 10:30:24 PM UTC 24 |
193650813 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1027142992 |
|
|
Sep 09 10:30:22 PM UTC 24 |
Sep 09 10:30:24 PM UTC 24 |
31160296 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.3991620372 |
|
|
Sep 09 10:30:09 PM UTC 24 |
Sep 09 10:30:24 PM UTC 24 |
3343213991 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.751528002 |
|
|
Sep 09 10:26:42 PM UTC 24 |
Sep 09 10:30:25 PM UTC 24 |
9203094532 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.1584045354 |
|
|
Sep 09 10:30:09 PM UTC 24 |
Sep 09 10:30:26 PM UTC 24 |
6536531027 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1261988709 |
|
|
Sep 09 10:30:12 PM UTC 24 |
Sep 09 10:30:26 PM UTC 24 |
3660547310 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.3244018946 |
|
|
Sep 09 10:30:22 PM UTC 24 |
Sep 09 10:30:26 PM UTC 24 |
88943741 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.3259477221 |
|
|
Sep 09 10:30:26 PM UTC 24 |
Sep 09 10:30:29 PM UTC 24 |
79060673 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.136558687 |
|
|
Sep 09 10:30:24 PM UTC 24 |
Sep 09 10:30:29 PM UTC 24 |
133629674 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.4197580610 |
|
|
Sep 09 10:29:35 PM UTC 24 |
Sep 09 10:30:30 PM UTC 24 |
1581310895 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.3116695294 |
|
|
Sep 09 10:30:13 PM UTC 24 |
Sep 09 10:30:35 PM UTC 24 |
317704737 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.1793368637 |
|
|
Sep 09 10:30:30 PM UTC 24 |
Sep 09 10:30:35 PM UTC 24 |
132030680 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.2011639700 |
|
|
Sep 09 10:28:59 PM UTC 24 |
Sep 09 10:30:35 PM UTC 24 |
6625302095 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.1932484626 |
|
|
Sep 09 10:29:51 PM UTC 24 |
Sep 09 10:30:36 PM UTC 24 |
1208604724 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.4091025037 |
|
|
Sep 09 10:30:27 PM UTC 24 |
Sep 09 10:30:40 PM UTC 24 |
641505706 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.1023339605 |
|
|
Sep 09 10:30:36 PM UTC 24 |
Sep 09 10:30:40 PM UTC 24 |
478956723 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.348173515 |
|
|
Sep 09 10:30:26 PM UTC 24 |
Sep 09 10:30:41 PM UTC 24 |
476925185 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.632823325 |
|
|
Sep 09 10:30:26 PM UTC 24 |
Sep 09 10:30:42 PM UTC 24 |
1531127423 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.321712865 |
|
|
Sep 09 10:30:38 PM UTC 24 |
Sep 09 10:30:42 PM UTC 24 |
32617589 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.1654622433 |
|
|
Sep 09 10:30:41 PM UTC 24 |
Sep 09 10:30:43 PM UTC 24 |
17850438 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.2264645186 |
|
|
Sep 09 10:30:32 PM UTC 24 |
Sep 09 10:30:47 PM UTC 24 |
1042183960 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.2150790750 |
|
|
Sep 09 10:30:30 PM UTC 24 |
Sep 09 10:30:43 PM UTC 24 |
846995473 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.3618841296 |
|
|
Sep 09 10:29:33 PM UTC 24 |
Sep 09 10:30:44 PM UTC 24 |
3941379673 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.4150692747 |
|
|
Sep 09 10:29:48 PM UTC 24 |
Sep 09 10:30:45 PM UTC 24 |
4847587241 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.2509870387 |
|
|
Sep 09 10:30:26 PM UTC 24 |
Sep 09 10:30:46 PM UTC 24 |
3619870937 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.2212184727 |
|
|
Sep 09 10:30:43 PM UTC 24 |
Sep 09 10:30:48 PM UTC 24 |
881788868 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1201023761 |
|
|
Sep 09 10:28:50 PM UTC 24 |
Sep 09 10:30:49 PM UTC 24 |
5814682435 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.3952470818 |
|
|
Sep 09 10:30:45 PM UTC 24 |
Sep 09 10:30:50 PM UTC 24 |
120833391 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.1465688958 |
|
|
Sep 09 10:30:42 PM UTC 24 |
Sep 09 10:30:51 PM UTC 24 |
93384888 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2971549111 |
|
|
Sep 09 10:30:50 PM UTC 24 |
Sep 09 10:30:52 PM UTC 24 |
16514255 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.2727266478 |
|
|
Sep 09 10:30:51 PM UTC 24 |
Sep 09 10:30:53 PM UTC 24 |
95259797 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.963621291 |
|
|
Sep 09 10:30:50 PM UTC 24 |
Sep 09 10:30:54 PM UTC 24 |
211133190 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.1016174113 |
|
|
Sep 09 10:30:34 PM UTC 24 |
Sep 09 10:30:55 PM UTC 24 |
2489637963 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.3525349998 |
|
|
Sep 09 10:30:23 PM UTC 24 |
Sep 09 10:30:55 PM UTC 24 |
428454108 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.115561684 |
|
|
Sep 09 10:30:54 PM UTC 24 |
Sep 09 10:30:58 PM UTC 24 |
286058091 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.3342772869 |
|
|
Sep 09 10:30:20 PM UTC 24 |
Sep 09 10:30:58 PM UTC 24 |
1460830662 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.558961914 |
|
|
Sep 09 10:31:45 PM UTC 24 |
Sep 09 10:31:56 PM UTC 24 |
237834209 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.2001124884 |
|
|
Sep 09 10:30:43 PM UTC 24 |
Sep 09 10:30:59 PM UTC 24 |
624346447 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1792333230 |
|
|
Sep 09 10:30:46 PM UTC 24 |
Sep 09 10:30:59 PM UTC 24 |
241129880 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.2949730417 |
|
|
Sep 09 10:30:45 PM UTC 24 |
Sep 09 10:31:00 PM UTC 24 |
203445788 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.1859646739 |
|
|
Sep 09 10:30:57 PM UTC 24 |
Sep 09 10:31:00 PM UTC 24 |
37800787 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.1506580164 |
|
|
Sep 09 10:30:45 PM UTC 24 |
Sep 09 10:31:01 PM UTC 24 |
3896716616 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.2426105797 |
|
|
Sep 09 10:30:43 PM UTC 24 |
Sep 09 10:31:03 PM UTC 24 |
859940561 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.2852351093 |
|
|
Sep 09 10:31:01 PM UTC 24 |
Sep 09 10:31:03 PM UTC 24 |
56676033 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.637374115 |
|
|
Sep 09 10:31:02 PM UTC 24 |
Sep 09 10:31:05 PM UTC 24 |
74893487 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.119123194 |
|
|
Sep 09 10:30:53 PM UTC 24 |
Sep 09 10:31:05 PM UTC 24 |
1297449269 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.2286144203 |
|
|
Sep 09 10:30:41 PM UTC 24 |
Sep 09 10:31:05 PM UTC 24 |
585031484 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1790953898 |
|
|
Sep 09 10:31:01 PM UTC 24 |
Sep 09 10:31:06 PM UTC 24 |
55418773 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.3066366470 |
|
|
Sep 09 10:30:56 PM UTC 24 |
Sep 09 10:31:06 PM UTC 24 |
3177491512 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.1615208796 |
|
|
Sep 09 10:30:56 PM UTC 24 |
Sep 09 10:31:08 PM UTC 24 |
296346406 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.2709088641 |
|
|
Sep 09 10:31:06 PM UTC 24 |
Sep 09 10:31:10 PM UTC 24 |
48800859 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.3244717896 |
|
|
Sep 09 10:30:59 PM UTC 24 |
Sep 09 10:31:11 PM UTC 24 |
924235673 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.2732576352 |
|
|
Sep 09 10:30:57 PM UTC 24 |
Sep 09 10:31:14 PM UTC 24 |
1278290773 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.3949803215 |
|
|
Sep 09 10:31:04 PM UTC 24 |
Sep 09 10:31:14 PM UTC 24 |
146843856 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.4105434539 |
|
|
Sep 09 10:30:36 PM UTC 24 |
Sep 09 10:31:14 PM UTC 24 |
4028943025 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1279411381 |
|
|
Sep 09 10:31:07 PM UTC 24 |
Sep 09 10:31:16 PM UTC 24 |
1032884107 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3123334173 |
|
|
Sep 09 10:31:15 PM UTC 24 |
Sep 09 10:31:17 PM UTC 24 |
41369117 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.6219516 |
|
|
Sep 09 10:31:15 PM UTC 24 |
Sep 09 10:31:18 PM UTC 24 |
54034432 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.2185465533 |
|
|
Sep 09 10:29:41 PM UTC 24 |
Sep 09 10:31:19 PM UTC 24 |
20897409426 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.1046989847 |
|
|
Sep 09 10:31:15 PM UTC 24 |
Sep 09 10:31:20 PM UTC 24 |
71813346 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.922500262 |
|
|
Sep 09 10:30:59 PM UTC 24 |
Sep 09 10:31:21 PM UTC 24 |
1782591232 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.865333919 |
|
|
Sep 09 10:30:51 PM UTC 24 |
Sep 09 10:31:21 PM UTC 24 |
265383970 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.3481721843 |
|
|
Sep 09 10:31:08 PM UTC 24 |
Sep 09 10:31:22 PM UTC 24 |
1331025378 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.803242654 |
|
|
Sep 09 10:31:06 PM UTC 24 |
Sep 09 10:31:22 PM UTC 24 |
416751832 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.1621982658 |
|
|
Sep 09 10:31:08 PM UTC 24 |
Sep 09 10:31:23 PM UTC 24 |
1326643727 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.3700528343 |
|
|
Sep 09 10:31:20 PM UTC 24 |
Sep 09 10:31:23 PM UTC 24 |
97896232 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.865242004 |
|
|
Sep 09 10:31:07 PM UTC 24 |
Sep 09 10:31:24 PM UTC 24 |
1136820462 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.4111625059 |
|
|
Sep 09 10:31:25 PM UTC 24 |
Sep 09 10:31:28 PM UTC 24 |
14342048 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.198431901 |
|
|
Sep 09 10:31:18 PM UTC 24 |
Sep 09 10:31:29 PM UTC 24 |
176226329 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.3547436657 |
|
|
Sep 09 10:31:03 PM UTC 24 |
Sep 09 10:31:29 PM UTC 24 |
867707389 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1739163135 |
|
|
Sep 09 10:31:10 PM UTC 24 |
Sep 09 10:31:30 PM UTC 24 |
884306951 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.3751113403 |
|
|
Sep 09 10:31:30 PM UTC 24 |
Sep 09 10:31:32 PM UTC 24 |
27539665 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.25974473 |
|
|
Sep 09 10:31:21 PM UTC 24 |
Sep 09 10:31:33 PM UTC 24 |
829556420 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.1105411558 |
|
|
Sep 09 10:30:30 PM UTC 24 |
Sep 09 10:31:34 PM UTC 24 |
10326361889 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.1353601588 |
|
|
Sep 09 10:31:23 PM UTC 24 |
Sep 09 10:31:35 PM UTC 24 |
643772997 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3323181235 |
|
|
Sep 09 10:31:28 PM UTC 24 |
Sep 09 10:31:35 PM UTC 24 |
187611351 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.1131459106 |
|
|
Sep 09 10:31:23 PM UTC 24 |
Sep 09 10:31:36 PM UTC 24 |
278279046 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.2947556610 |
|
|
Sep 09 10:31:20 PM UTC 24 |
Sep 09 10:31:36 PM UTC 24 |
578329830 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.745828491 |
|
|
Sep 09 10:31:32 PM UTC 24 |
Sep 09 10:31:37 PM UTC 24 |
48152285 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.111473132 |
|
|
Sep 09 10:31:23 PM UTC 24 |
Sep 09 10:31:37 PM UTC 24 |
914318465 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.379836466 |
|
|
Sep 09 10:31:36 PM UTC 24 |
Sep 09 10:31:38 PM UTC 24 |
197703776 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.1307018819 |
|
|
Sep 09 10:31:23 PM UTC 24 |
Sep 09 10:31:38 PM UTC 24 |
4000136017 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.743795670 |
|
|
Sep 09 10:28:42 PM UTC 24 |
Sep 09 10:31:39 PM UTC 24 |
9499908878 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.1240350211 |
|
|
Sep 09 10:31:31 PM UTC 24 |
Sep 09 10:31:41 PM UTC 24 |
251029464 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.359126612 |
|
|
Sep 09 10:31:17 PM UTC 24 |
Sep 09 10:31:41 PM UTC 24 |
1045075998 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1348381007 |
|
|
Sep 09 10:31:39 PM UTC 24 |
Sep 09 10:31:41 PM UTC 24 |
56166671 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.426855369 |
|
|
Sep 09 10:31:39 PM UTC 24 |
Sep 09 10:31:42 PM UTC 24 |
50102521 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.2134781684 |
|
|
Sep 09 10:31:40 PM UTC 24 |
Sep 09 10:31:43 PM UTC 24 |
20246949 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.3074615390 |
|
|
Sep 09 10:31:33 PM UTC 24 |
Sep 09 10:31:44 PM UTC 24 |
658298347 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.1170527922 |
|
|
Sep 09 10:31:43 PM UTC 24 |
Sep 09 10:31:46 PM UTC 24 |
300207039 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.1468544860 |
|
|
Sep 09 10:31:36 PM UTC 24 |
Sep 09 10:31:46 PM UTC 24 |
605270855 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.3838513375 |
|
|
Sep 09 10:31:42 PM UTC 24 |
Sep 09 10:31:46 PM UTC 24 |
75787054 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.1062860668 |
|
|
Sep 09 10:31:48 PM UTC 24 |
Sep 09 10:31:50 PM UTC 24 |
22361785 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.2400796963 |
|
|
Sep 09 10:27:55 PM UTC 24 |
Sep 09 10:31:50 PM UTC 24 |
8905153236 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3645945477 |
|
|
Sep 09 10:30:09 PM UTC 24 |
Sep 09 10:31:51 PM UTC 24 |
12752501144 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.2417221373 |
|
|
Sep 09 10:31:40 PM UTC 24 |
Sep 09 10:31:51 PM UTC 24 |
67313784 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.1819487211 |
|
|
Sep 09 10:31:42 PM UTC 24 |
Sep 09 10:31:52 PM UTC 24 |
1152167708 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.648138465 |
|
|
Sep 09 10:31:37 PM UTC 24 |
Sep 09 10:31:52 PM UTC 24 |
1295222289 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2618526229 |
|
|
Sep 09 10:31:51 PM UTC 24 |
Sep 09 10:31:53 PM UTC 24 |
39958988 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2736575586 |
|
|
Sep 09 10:31:43 PM UTC 24 |
Sep 09 10:31:54 PM UTC 24 |
4730145863 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3759496426 |
|
|
Sep 09 10:31:45 PM UTC 24 |
Sep 09 10:31:56 PM UTC 24 |
743985327 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.1878468538 |
|
|
Sep 09 10:31:50 PM UTC 24 |
Sep 09 10:31:56 PM UTC 24 |
211079694 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.45351174 |
|
|
Sep 09 10:31:53 PM UTC 24 |
Sep 09 10:31:57 PM UTC 24 |
47107996 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.2848469638 |
|
|
Sep 09 10:33:30 PM UTC 24 |
Sep 09 10:33:44 PM UTC 24 |
326895371 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.1049106555 |
|
|
Sep 09 10:31:12 PM UTC 24 |
Sep 09 10:31:57 PM UTC 24 |
1363821281 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.3560819720 |
|
|
Sep 09 10:31:01 PM UTC 24 |
Sep 09 10:31:58 PM UTC 24 |
4672473001 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.3746688535 |
|
|
Sep 09 10:31:44 PM UTC 24 |
Sep 09 10:31:59 PM UTC 24 |
1197146617 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.2177150667 |
|
|
Sep 09 10:31:57 PM UTC 24 |
Sep 09 10:31:59 PM UTC 24 |
42498679 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1576217244 |
|
|
Sep 09 10:31:58 PM UTC 24 |
Sep 09 10:32:01 PM UTC 24 |
12220906 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.2394868329 |
|
|
Sep 09 10:31:33 PM UTC 24 |
Sep 09 10:32:01 PM UTC 24 |
724323163 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.3545526105 |
|
|
Sep 09 10:32:26 PM UTC 24 |
Sep 09 10:32:51 PM UTC 24 |
1152676434 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.2655088728 |
|
|
Sep 09 10:32:00 PM UTC 24 |
Sep 09 10:32:03 PM UTC 24 |
44286017 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.4249074606 |
|
|
Sep 09 10:31:30 PM UTC 24 |
Sep 09 10:32:03 PM UTC 24 |
228576406 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.786053599 |
|
|
Sep 09 10:31:57 PM UTC 24 |
Sep 09 10:32:04 PM UTC 24 |
59602844 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2399892830 |
|
|
Sep 09 10:31:36 PM UTC 24 |
Sep 09 10:32:04 PM UTC 24 |
685658682 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.3420271369 |
|
|
Sep 09 10:31:24 PM UTC 24 |
Sep 09 10:32:04 PM UTC 24 |
566363974 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.3302871503 |
|
|
Sep 09 10:31:40 PM UTC 24 |
Sep 09 10:32:05 PM UTC 24 |
793429638 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1768447002 |
|
|
Sep 09 10:31:53 PM UTC 24 |
Sep 09 10:32:06 PM UTC 24 |
462656641 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.3785727202 |
|
|
Sep 09 10:32:02 PM UTC 24 |
Sep 09 10:32:08 PM UTC 24 |
165807566 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.3594881385 |
|
|
Sep 09 10:32:05 PM UTC 24 |
Sep 09 10:32:08 PM UTC 24 |
17609983 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.999412047 |
|
|
Sep 09 10:31:54 PM UTC 24 |
Sep 09 10:32:08 PM UTC 24 |
983580937 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.3437069389 |
|
|
Sep 09 10:31:56 PM UTC 24 |
Sep 09 10:32:08 PM UTC 24 |
207495162 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2151068108 |
|
|
Sep 09 10:32:07 PM UTC 24 |
Sep 09 10:32:09 PM UTC 24 |
17241042 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.1393699737 |
|
|
Sep 09 10:32:07 PM UTC 24 |
Sep 09 10:32:10 PM UTC 24 |
22365660 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.4069836906 |
|
|
Sep 09 10:31:53 PM UTC 24 |
Sep 09 10:32:11 PM UTC 24 |
3078667255 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_08/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.2044326560 |
|
|
Sep 09 10:33:31 PM UTC 24 |
Sep 09 10:33:43 PM UTC 24 |
1959470895 ps |