| T192 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.2288149926 |
|
|
Sep 11 06:49:28 PM UTC 24 |
Sep 11 06:49:43 PM UTC 24 |
291188857 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all_with_rand_reset.4069836047 |
|
|
Sep 11 06:47:51 PM UTC 24 |
Sep 11 06:49:43 PM UTC 24 |
18017955751 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.4032806257 |
|
|
Sep 11 06:49:40 PM UTC 24 |
Sep 11 06:49:44 PM UTC 24 |
143196709 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.1224669821 |
|
|
Sep 11 06:49:35 PM UTC 24 |
Sep 11 06:49:45 PM UTC 24 |
1563652986 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.3020751192 |
|
|
Sep 11 06:49:13 PM UTC 24 |
Sep 11 06:49:46 PM UTC 24 |
1524686784 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.3131251403 |
|
|
Sep 11 06:49:33 PM UTC 24 |
Sep 11 06:49:46 PM UTC 24 |
498608549 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.1026195193 |
|
|
Sep 11 06:49:42 PM UTC 24 |
Sep 11 06:49:47 PM UTC 24 |
153821472 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.1098608510 |
|
|
Sep 11 06:49:23 PM UTC 24 |
Sep 11 06:49:47 PM UTC 24 |
2144145015 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.4041934965 |
|
|
Sep 11 06:49:45 PM UTC 24 |
Sep 11 06:49:47 PM UTC 24 |
54411528 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.4278188783 |
|
|
Sep 11 06:49:40 PM UTC 24 |
Sep 11 06:49:49 PM UTC 24 |
131626279 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.526755016 |
|
|
Sep 11 06:49:46 PM UTC 24 |
Sep 11 06:49:49 PM UTC 24 |
34345883 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.2740606256 |
|
|
Sep 11 06:49:46 PM UTC 24 |
Sep 11 06:49:49 PM UTC 24 |
75452667 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.1580395952 |
|
|
Sep 11 06:49:36 PM UTC 24 |
Sep 11 06:49:50 PM UTC 24 |
1899299563 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.22306682 |
|
|
Sep 11 06:49:43 PM UTC 24 |
Sep 11 06:49:50 PM UTC 24 |
483300543 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.1045214115 |
|
|
Sep 11 06:49:35 PM UTC 24 |
Sep 11 06:49:51 PM UTC 24 |
283323342 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/3.lc_ctrl_jtag_state_failure.1572821606 |
|
|
Sep 11 06:48:09 PM UTC 24 |
Sep 11 06:49:52 PM UTC 24 |
3841689661 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.2678408033 |
|
|
Sep 11 06:49:33 PM UTC 24 |
Sep 11 06:49:52 PM UTC 24 |
1702422182 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.4249373994 |
|
|
Sep 11 06:50:02 PM UTC 24 |
Sep 11 06:50:17 PM UTC 24 |
253510765 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.1104868800 |
|
|
Sep 11 06:49:50 PM UTC 24 |
Sep 11 06:49:53 PM UTC 24 |
45452107 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.3282657875 |
|
|
Sep 11 06:49:49 PM UTC 24 |
Sep 11 06:49:53 PM UTC 24 |
329163000 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.1991249589 |
|
|
Sep 11 06:49:43 PM UTC 24 |
Sep 11 06:49:53 PM UTC 24 |
2653061671 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/5.lc_ctrl_jtag_errors.2725789724 |
|
|
Sep 11 06:48:29 PM UTC 24 |
Sep 11 06:49:54 PM UTC 24 |
31893817686 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.3217875178 |
|
|
Sep 11 06:49:42 PM UTC 24 |
Sep 11 06:49:54 PM UTC 24 |
255793591 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1675140777 |
|
|
Sep 11 06:49:43 PM UTC 24 |
Sep 11 06:49:54 PM UTC 24 |
335872669 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.2681772972 |
|
|
Sep 11 06:49:41 PM UTC 24 |
Sep 11 06:49:54 PM UTC 24 |
1990153683 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.1358429116 |
|
|
Sep 11 06:49:35 PM UTC 24 |
Sep 11 06:49:54 PM UTC 24 |
3368881877 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.3553849258 |
|
|
Sep 11 06:49:35 PM UTC 24 |
Sep 11 06:49:56 PM UTC 24 |
634132399 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.666383779 |
|
|
Sep 11 06:49:45 PM UTC 24 |
Sep 11 06:49:56 PM UTC 24 |
420681721 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.1556969293 |
|
|
Sep 11 06:49:30 PM UTC 24 |
Sep 11 06:49:56 PM UTC 24 |
852834569 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.882119951 |
|
|
Sep 11 06:49:27 PM UTC 24 |
Sep 11 06:49:57 PM UTC 24 |
12727066028 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.3604030598 |
|
|
Sep 11 06:49:52 PM UTC 24 |
Sep 11 06:49:57 PM UTC 24 |
142194823 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.4160039823 |
|
|
Sep 11 06:49:56 PM UTC 24 |
Sep 11 06:49:58 PM UTC 24 |
60856972 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.364998269 |
|
|
Sep 11 06:49:56 PM UTC 24 |
Sep 11 06:49:58 PM UTC 24 |
13671655 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all.2618477449 |
|
|
Sep 11 06:47:51 PM UTC 24 |
Sep 11 06:49:58 PM UTC 24 |
30540692331 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.1912447671 |
|
|
Sep 11 06:49:56 PM UTC 24 |
Sep 11 06:49:59 PM UTC 24 |
104309151 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3293521141 |
|
|
Sep 11 06:49:57 PM UTC 24 |
Sep 11 06:50:00 PM UTC 24 |
78502413 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1329647580 |
|
|
Sep 11 06:49:47 PM UTC 24 |
Sep 11 06:50:00 PM UTC 24 |
277100131 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3534903714 |
|
|
Sep 11 06:49:54 PM UTC 24 |
Sep 11 06:50:01 PM UTC 24 |
847748186 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.2440628929 |
|
|
Sep 11 06:49:49 PM UTC 24 |
Sep 11 06:50:01 PM UTC 24 |
276743862 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.4003642745 |
|
|
Sep 11 06:49:50 PM UTC 24 |
Sep 11 06:50:01 PM UTC 24 |
1080551484 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2405565189 |
|
|
Sep 11 06:49:19 PM UTC 24 |
Sep 11 06:50:03 PM UTC 24 |
15371163466 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.901482051 |
|
|
Sep 11 06:49:42 PM UTC 24 |
Sep 11 06:50:03 PM UTC 24 |
2590883492 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.1104606370 |
|
|
Sep 11 06:48:51 PM UTC 24 |
Sep 11 06:50:04 PM UTC 24 |
5037732121 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.2144303851 |
|
|
Sep 11 06:49:42 PM UTC 24 |
Sep 11 06:50:05 PM UTC 24 |
935898802 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.1618729742 |
|
|
Sep 11 06:49:51 PM UTC 24 |
Sep 11 06:50:05 PM UTC 24 |
363023245 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.1066382835 |
|
|
Sep 11 06:50:03 PM UTC 24 |
Sep 11 06:50:06 PM UTC 24 |
84186354 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.8542961 |
|
|
Sep 11 06:50:04 PM UTC 24 |
Sep 11 06:50:07 PM UTC 24 |
18853990 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.3606906750 |
|
|
Sep 11 06:50:00 PM UTC 24 |
Sep 11 06:50:07 PM UTC 24 |
1251535660 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.2518373620 |
|
|
Sep 11 06:49:59 PM UTC 24 |
Sep 11 06:50:07 PM UTC 24 |
409509671 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.1597488857 |
|
|
Sep 11 06:49:56 PM UTC 24 |
Sep 11 06:50:09 PM UTC 24 |
279468441 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.3038946311 |
|
|
Sep 11 06:50:03 PM UTC 24 |
Sep 11 06:50:09 PM UTC 24 |
193184559 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.1980988932 |
|
|
Sep 11 06:49:57 PM UTC 24 |
Sep 11 06:50:09 PM UTC 24 |
269834188 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.2082353891 |
|
|
Sep 11 06:49:57 PM UTC 24 |
Sep 11 06:50:10 PM UTC 24 |
604237848 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.1878064495 |
|
|
Sep 11 06:49:59 PM UTC 24 |
Sep 11 06:50:10 PM UTC 24 |
644426130 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.1984929962 |
|
|
Sep 11 06:48:12 PM UTC 24 |
Sep 11 06:50:10 PM UTC 24 |
21069479319 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.4196921276 |
|
|
Sep 11 06:49:54 PM UTC 24 |
Sep 11 06:50:10 PM UTC 24 |
911690087 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.2311590127 |
|
|
Sep 11 06:48:57 PM UTC 24 |
Sep 11 06:50:11 PM UTC 24 |
9327861806 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.1252015057 |
|
|
Sep 11 06:50:07 PM UTC 24 |
Sep 11 06:50:11 PM UTC 24 |
32709333 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.1173924488 |
|
|
Sep 11 06:50:14 PM UTC 24 |
Sep 11 06:50:16 PM UTC 24 |
35752184 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.4238126617 |
|
|
Sep 11 06:49:45 PM UTC 24 |
Sep 11 06:50:11 PM UTC 24 |
2432447040 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.1065283697 |
|
|
Sep 11 06:50:02 PM UTC 24 |
Sep 11 06:50:12 PM UTC 24 |
1114454845 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.3796333504 |
|
|
Sep 11 06:49:51 PM UTC 24 |
Sep 11 06:50:12 PM UTC 24 |
2876294690 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.1586348536 |
|
|
Sep 11 06:49:17 PM UTC 24 |
Sep 11 06:50:13 PM UTC 24 |
7960906581 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.510652648 |
|
|
Sep 11 06:49:40 PM UTC 24 |
Sep 11 06:50:13 PM UTC 24 |
257044761 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.1977218998 |
|
|
Sep 11 06:49:54 PM UTC 24 |
Sep 11 06:50:14 PM UTC 24 |
1765035113 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3952994486 |
|
|
Sep 11 06:49:59 PM UTC 24 |
Sep 11 06:50:15 PM UTC 24 |
3132338200 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.2273185456 |
|
|
Sep 11 06:50:08 PM UTC 24 |
Sep 11 06:50:17 PM UTC 24 |
177781909 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.4256042993 |
|
|
Sep 11 06:49:42 PM UTC 24 |
Sep 11 06:50:17 PM UTC 24 |
1186347796 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.810752653 |
|
|
Sep 11 06:50:02 PM UTC 24 |
Sep 11 06:50:17 PM UTC 24 |
462310368 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.1062988691 |
|
|
Sep 11 06:50:14 PM UTC 24 |
Sep 11 06:50:17 PM UTC 24 |
23265609 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.3390932284 |
|
|
Sep 11 06:50:07 PM UTC 24 |
Sep 11 06:50:18 PM UTC 24 |
1042887379 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.4190999857 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:50:18 PM UTC 24 |
1449213774 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.2016973355 |
|
|
Sep 11 06:49:32 PM UTC 24 |
Sep 11 06:50:18 PM UTC 24 |
910668574 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.1417070529 |
|
|
Sep 11 06:49:09 PM UTC 24 |
Sep 11 06:50:18 PM UTC 24 |
10383986730 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.386354781 |
|
|
Sep 11 06:49:50 PM UTC 24 |
Sep 11 06:50:18 PM UTC 24 |
867935588 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1404292159 |
|
|
Sep 11 06:50:08 PM UTC 24 |
Sep 11 06:50:19 PM UTC 24 |
271174047 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.2678162211 |
|
|
Sep 11 06:50:09 PM UTC 24 |
Sep 11 06:50:19 PM UTC 24 |
400326543 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.2263748630 |
|
|
Sep 11 06:50:15 PM UTC 24 |
Sep 11 06:50:21 PM UTC 24 |
82125575 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.3734625048 |
|
|
Sep 11 06:49:09 PM UTC 24 |
Sep 11 06:50:22 PM UTC 24 |
2753402018 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.3315321937 |
|
|
Sep 11 06:50:19 PM UTC 24 |
Sep 11 06:50:22 PM UTC 24 |
336761524 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.4269360329 |
|
|
Sep 11 06:49:24 PM UTC 24 |
Sep 11 06:50:22 PM UTC 24 |
11036922571 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.3041371687 |
|
|
Sep 11 06:50:21 PM UTC 24 |
Sep 11 06:50:23 PM UTC 24 |
14579800 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.3843911007 |
|
|
Sep 11 06:50:20 PM UTC 24 |
Sep 11 06:50:23 PM UTC 24 |
47482051 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.4059963973 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:50:23 PM UTC 24 |
1305556649 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.3451687369 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:50:24 PM UTC 24 |
235926281 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.847662868 |
|
|
Sep 11 06:50:21 PM UTC 24 |
Sep 11 06:50:24 PM UTC 24 |
85134509 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all_with_rand_reset.1431581882 |
|
|
Sep 11 06:49:01 PM UTC 24 |
Sep 11 06:50:24 PM UTC 24 |
11373864043 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.1803112798 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:50:24 PM UTC 24 |
362714434 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.291402160 |
|
|
Sep 11 06:49:47 PM UTC 24 |
Sep 11 06:50:25 PM UTC 24 |
960563016 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.3698635150 |
|
|
Sep 11 06:50:17 PM UTC 24 |
Sep 11 06:50:26 PM UTC 24 |
1157775208 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.2946897315 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:50:46 PM UTC 24 |
1165285335 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all.4262522752 |
|
|
Sep 11 06:48:32 PM UTC 24 |
Sep 11 06:50:26 PM UTC 24 |
20078278950 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.3265079950 |
|
|
Sep 11 06:50:15 PM UTC 24 |
Sep 11 06:50:27 PM UTC 24 |
126424324 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.3565431434 |
|
|
Sep 11 06:50:23 PM UTC 24 |
Sep 11 06:50:28 PM UTC 24 |
337726199 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.4241209186 |
|
|
Sep 11 06:50:24 PM UTC 24 |
Sep 11 06:50:29 PM UTC 24 |
132087439 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.2924371682 |
|
|
Sep 11 06:50:19 PM UTC 24 |
Sep 11 06:50:29 PM UTC 24 |
519544791 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3032021947 |
|
|
Sep 11 06:49:17 PM UTC 24 |
Sep 11 06:50:29 PM UTC 24 |
10041546955 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1121821970 |
|
|
Sep 11 06:50:19 PM UTC 24 |
Sep 11 06:50:30 PM UTC 24 |
444126385 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.939262733 |
|
|
Sep 11 06:50:19 PM UTC 24 |
Sep 11 06:50:30 PM UTC 24 |
2292817139 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.2307690086 |
|
|
Sep 11 06:50:27 PM UTC 24 |
Sep 11 06:50:30 PM UTC 24 |
71889436 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.1903402865 |
|
|
Sep 11 06:49:56 PM UTC 24 |
Sep 11 06:50:31 PM UTC 24 |
210077951 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.2984062054 |
|
|
Sep 11 06:49:35 PM UTC 24 |
Sep 11 06:50:31 PM UTC 24 |
14098515683 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.2000912367 |
|
|
Sep 11 06:49:19 PM UTC 24 |
Sep 11 06:50:31 PM UTC 24 |
19264674538 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.3149411766 |
|
|
Sep 11 06:50:17 PM UTC 24 |
Sep 11 06:50:31 PM UTC 24 |
487198862 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.3285701802 |
|
|
Sep 11 06:50:30 PM UTC 24 |
Sep 11 06:50:32 PM UTC 24 |
16404761 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.3939156443 |
|
|
Sep 11 06:50:30 PM UTC 24 |
Sep 11 06:50:32 PM UTC 24 |
41707364 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.35280920 |
|
|
Sep 11 06:50:30 PM UTC 24 |
Sep 11 06:50:32 PM UTC 24 |
71696024 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.879467013 |
|
|
Sep 11 06:49:33 PM UTC 24 |
Sep 11 06:50:32 PM UTC 24 |
2182780367 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.355058343 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:50:33 PM UTC 24 |
721279270 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.2445336400 |
|
|
Sep 11 06:50:23 PM UTC 24 |
Sep 11 06:50:33 PM UTC 24 |
327386826 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1958424500 |
|
|
Sep 11 06:50:08 PM UTC 24 |
Sep 11 06:50:34 PM UTC 24 |
705611597 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.1115361601 |
|
|
Sep 11 06:50:17 PM UTC 24 |
Sep 11 06:50:34 PM UTC 24 |
441066503 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.830415627 |
|
|
Sep 11 06:50:31 PM UTC 24 |
Sep 11 06:50:34 PM UTC 24 |
23459036 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.897244064 |
|
|
Sep 11 06:50:18 PM UTC 24 |
Sep 11 06:50:35 PM UTC 24 |
617353914 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.4222392098 |
|
|
Sep 11 06:50:06 PM UTC 24 |
Sep 11 06:50:36 PM UTC 24 |
715491728 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.933240025 |
|
|
Sep 11 06:48:22 PM UTC 24 |
Sep 11 06:50:36 PM UTC 24 |
4238302833 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.3885716893 |
|
|
Sep 11 06:50:18 PM UTC 24 |
Sep 11 06:50:37 PM UTC 24 |
6823627268 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.2830881633 |
|
|
Sep 11 06:50:23 PM UTC 24 |
Sep 11 06:50:37 PM UTC 24 |
1123789237 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.3753539586 |
|
|
Sep 11 06:50:18 PM UTC 24 |
Sep 11 06:50:37 PM UTC 24 |
1048312705 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.3028060734 |
|
|
Sep 11 06:50:31 PM UTC 24 |
Sep 11 06:50:38 PM UTC 24 |
136831675 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.2634765299 |
|
|
Sep 11 06:50:35 PM UTC 24 |
Sep 11 06:50:38 PM UTC 24 |
27740651 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3992835501 |
|
|
Sep 11 06:49:59 PM UTC 24 |
Sep 11 06:50:38 PM UTC 24 |
4630244418 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.3488089958 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:50:38 PM UTC 24 |
847889906 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.3932038349 |
|
|
Sep 11 06:50:25 PM UTC 24 |
Sep 11 06:50:38 PM UTC 24 |
1339574556 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.3164586103 |
|
|
Sep 11 06:50:23 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
103033735 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2083601586 |
|
|
Sep 11 06:50:27 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
1270977965 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.533150463 |
|
|
Sep 11 06:50:00 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
9511075154 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.3744471433 |
|
|
Sep 11 06:48:41 PM UTC 24 |
Sep 11 06:50:46 PM UTC 24 |
54863900385 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.1384322688 |
|
|
Sep 11 06:49:43 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
17229544549 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.2704719348 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
307349708 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.2956176237 |
|
|
Sep 11 06:50:27 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
794499923 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.2175182165 |
|
|
Sep 11 06:50:36 PM UTC 24 |
Sep 11 06:50:39 PM UTC 24 |
30757285 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.86629783 |
|
|
Sep 11 06:49:37 PM UTC 24 |
Sep 11 06:50:40 PM UTC 24 |
1732698659 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.744681270 |
|
|
Sep 11 06:50:27 PM UTC 24 |
Sep 11 06:50:40 PM UTC 24 |
993454011 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.86394198 |
|
|
Sep 11 06:50:38 PM UTC 24 |
Sep 11 06:50:40 PM UTC 24 |
11633742 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.131847789 |
|
|
Sep 11 06:50:25 PM UTC 24 |
Sep 11 06:50:41 PM UTC 24 |
429026435 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.1004703410 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:50:41 PM UTC 24 |
425044961 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.2413904967 |
|
|
Sep 11 06:50:38 PM UTC 24 |
Sep 11 06:50:42 PM UTC 24 |
600437068 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.1742248892 |
|
|
Sep 11 06:50:31 PM UTC 24 |
Sep 11 06:50:43 PM UTC 24 |
196170753 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.1799899628 |
|
|
Sep 11 06:50:38 PM UTC 24 |
Sep 11 06:50:43 PM UTC 24 |
346909407 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.316252479 |
|
|
Sep 11 06:49:54 PM UTC 24 |
Sep 11 06:50:44 PM UTC 24 |
4840841048 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2348342211 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:44 PM UTC 24 |
21188135 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.2442106045 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:44 PM UTC 24 |
53184578 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.4025483761 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:45 PM UTC 24 |
20130626 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.3653969573 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:45 PM UTC 24 |
340974856 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.3084435554 |
|
|
Sep 11 06:50:31 PM UTC 24 |
Sep 11 06:50:46 PM UTC 24 |
335254488 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.3853994130 |
|
|
Sep 11 06:50:35 PM UTC 24 |
Sep 11 06:50:46 PM UTC 24 |
4826563805 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.1678598376 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:46 PM UTC 24 |
59191477 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.3711332324 |
|
|
Sep 11 06:50:45 PM UTC 24 |
Sep 11 06:50:48 PM UTC 24 |
17998105 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.2110243694 |
|
|
Sep 11 06:50:45 PM UTC 24 |
Sep 11 06:50:48 PM UTC 24 |
27033654 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.3091196055 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:48 PM UTC 24 |
179264418 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.3988279391 |
|
|
Sep 11 06:49:52 PM UTC 24 |
Sep 11 06:50:49 PM UTC 24 |
1994765825 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.1652371214 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:50:49 PM UTC 24 |
389549132 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1221382161 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:50:50 PM UTC 24 |
984023228 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.1352669261 |
|
|
Sep 11 06:50:22 PM UTC 24 |
Sep 11 06:50:50 PM UTC 24 |
153509650 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.1038920313 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:50:50 PM UTC 24 |
1068884915 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.2788363060 |
|
|
Sep 11 06:50:14 PM UTC 24 |
Sep 11 06:50:50 PM UTC 24 |
3007222747 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.127448949 |
|
|
Sep 11 06:50:35 PM UTC 24 |
Sep 11 06:50:51 PM UTC 24 |
389611623 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.226857170 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:50:52 PM UTC 24 |
1307820582 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1884446039 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:50:52 PM UTC 24 |
1879179238 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.3657796461 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:50:52 PM UTC 24 |
203810352 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.516400732 |
|
|
Sep 11 06:50:09 PM UTC 24 |
Sep 11 06:50:53 PM UTC 24 |
13179844085 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1226384564 |
|
|
Sep 11 06:50:45 PM UTC 24 |
Sep 11 06:50:53 PM UTC 24 |
232091982 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.3368117179 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:50:53 PM UTC 24 |
1641359032 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.2908371565 |
|
|
Sep 11 06:50:51 PM UTC 24 |
Sep 11 06:50:53 PM UTC 24 |
18625613 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.1649025063 |
|
|
Sep 11 06:50:14 PM UTC 24 |
Sep 11 06:50:54 PM UTC 24 |
462219159 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.2362678092 |
|
|
Sep 11 06:50:51 PM UTC 24 |
Sep 11 06:50:54 PM UTC 24 |
47423857 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.2796317031 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:54 PM UTC 24 |
343166533 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2001485811 |
|
|
Sep 11 06:51:04 PM UTC 24 |
Sep 11 06:51:16 PM UTC 24 |
837060128 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.1230947100 |
|
|
Sep 11 06:50:51 PM UTC 24 |
Sep 11 06:50:56 PM UTC 24 |
46888449 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.3002577895 |
|
|
Sep 11 06:50:44 PM UTC 24 |
Sep 11 06:50:56 PM UTC 24 |
1108260467 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.3326470266 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:50:56 PM UTC 24 |
574817486 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.1619213289 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:50:56 PM UTC 24 |
73497325 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.3126945147 |
|
|
Sep 11 06:50:53 PM UTC 24 |
Sep 11 06:50:58 PM UTC 24 |
118713762 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.2048013071 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:58 PM UTC 24 |
1383070663 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.2746771244 |
|
|
Sep 11 06:50:56 PM UTC 24 |
Sep 11 06:50:58 PM UTC 24 |
20636323 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.1568503155 |
|
|
Sep 11 06:50:39 PM UTC 24 |
Sep 11 06:50:59 PM UTC 24 |
446633346 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1626744395 |
|
|
Sep 11 06:50:57 PM UTC 24 |
Sep 11 06:50:59 PM UTC 24 |
35370792 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.2252750310 |
|
|
Sep 11 06:49:54 PM UTC 24 |
Sep 11 06:50:59 PM UTC 24 |
1777274241 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.1548423732 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:50:59 PM UTC 24 |
357529875 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3516751731 |
|
|
Sep 11 06:50:56 PM UTC 24 |
Sep 11 06:51:00 PM UTC 24 |
182741002 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.4031378468 |
|
|
Sep 11 06:50:44 PM UTC 24 |
Sep 11 06:51:00 PM UTC 24 |
626026701 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.2494515745 |
|
|
Sep 11 06:50:57 PM UTC 24 |
Sep 11 06:51:00 PM UTC 24 |
95309474 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.4114544465 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:51:01 PM UTC 24 |
560124139 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.4018023843 |
|
|
Sep 11 06:50:31 PM UTC 24 |
Sep 11 06:51:02 PM UTC 24 |
217043147 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.3160210385 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:51:02 PM UTC 24 |
1377910673 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3486824358 |
|
|
Sep 11 06:50:27 PM UTC 24 |
Sep 11 06:51:02 PM UTC 24 |
13155150287 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.47125340 |
|
|
Sep 11 06:50:53 PM UTC 24 |
Sep 11 06:51:02 PM UTC 24 |
233746362 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.2312819935 |
|
|
Sep 11 06:50:52 PM UTC 24 |
Sep 11 06:51:03 PM UTC 24 |
325747374 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.3265609466 |
|
|
Sep 11 06:50:49 PM UTC 24 |
Sep 11 06:51:03 PM UTC 24 |
1825624100 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.3591695621 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:51:04 PM UTC 24 |
448533714 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.535019493 |
|
|
Sep 11 06:51:04 PM UTC 24 |
Sep 11 06:51:18 PM UTC 24 |
387027262 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.1133197411 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:51:04 PM UTC 24 |
3768601882 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.3807192877 |
|
|
Sep 11 06:50:55 PM UTC 24 |
Sep 11 06:51:04 PM UTC 24 |
2517403904 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.3882121485 |
|
|
Sep 11 06:51:02 PM UTC 24 |
Sep 11 06:51:05 PM UTC 24 |
92963575 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3885469468 |
|
|
Sep 11 06:51:03 PM UTC 24 |
Sep 11 06:51:05 PM UTC 24 |
33474194 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.2566221 |
|
|
Sep 11 06:51:02 PM UTC 24 |
Sep 11 06:51:05 PM UTC 24 |
69290025 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.3240097307 |
|
|
Sep 11 06:49:37 PM UTC 24 |
Sep 11 06:51:05 PM UTC 24 |
5696332026 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.4225326545 |
|
|
Sep 11 06:50:53 PM UTC 24 |
Sep 11 06:51:05 PM UTC 24 |
908687492 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.2615859089 |
|
|
Sep 11 06:50:49 PM UTC 24 |
Sep 11 06:51:07 PM UTC 24 |
708970120 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.1727683069 |
|
|
Sep 11 06:51:00 PM UTC 24 |
Sep 11 06:51:08 PM UTC 24 |
595948436 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.3537726757 |
|
|
Sep 11 06:50:53 PM UTC 24 |
Sep 11 06:51:08 PM UTC 24 |
629966586 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.647942983 |
|
|
Sep 11 06:51:12 PM UTC 24 |
Sep 11 06:51:17 PM UTC 24 |
222691809 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.1172009566 |
|
|
Sep 11 06:51:04 PM UTC 24 |
Sep 11 06:51:08 PM UTC 24 |
243435921 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2866571874 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:09 PM UTC 24 |
44897047 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.666458939 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:09 PM UTC 24 |
37702937 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.1794647307 |
|
|
Sep 11 06:50:53 PM UTC 24 |
Sep 11 06:51:09 PM UTC 24 |
878876887 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.1984113110 |
|
|
Sep 11 06:50:58 PM UTC 24 |
Sep 11 06:51:09 PM UTC 24 |
301210482 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.4050906212 |
|
|
Sep 11 06:50:55 PM UTC 24 |
Sep 11 06:51:10 PM UTC 24 |
335769261 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.795093095 |
|
|
Sep 11 06:51:04 PM UTC 24 |
Sep 11 06:51:17 PM UTC 24 |
307217666 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.857897372 |
|
|
Sep 11 06:50:12 PM UTC 24 |
Sep 11 06:51:10 PM UTC 24 |
16566697610 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.3539774464 |
|
|
Sep 11 06:51:03 PM UTC 24 |
Sep 11 06:51:11 PM UTC 24 |
283055666 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.3344198224 |
|
|
Sep 11 06:50:57 PM UTC 24 |
Sep 11 06:51:11 PM UTC 24 |
196312703 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.3974315764 |
|
|
Sep 11 06:51:08 PM UTC 24 |
Sep 11 06:51:12 PM UTC 24 |
143895698 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.3669872334 |
|
|
Sep 11 06:51:00 PM UTC 24 |
Sep 11 06:51:12 PM UTC 24 |
1042926209 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.1900899919 |
|
|
Sep 11 06:51:10 PM UTC 24 |
Sep 11 06:51:13 PM UTC 24 |
98262238 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.2243239784 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:13 PM UTC 24 |
370541041 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3284442116 |
|
|
Sep 11 06:51:12 PM UTC 24 |
Sep 11 06:51:14 PM UTC 24 |
14592548 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.3857421406 |
|
|
Sep 11 06:51:12 PM UTC 24 |
Sep 11 06:51:14 PM UTC 24 |
24784780 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.3519625159 |
|
|
Sep 11 06:51:04 PM UTC 24 |
Sep 11 06:51:15 PM UTC 24 |
812947708 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.2530162503 |
|
|
Sep 11 06:51:13 PM UTC 24 |
Sep 11 06:51:18 PM UTC 24 |
200191939 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.3420073076 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:15 PM UTC 24 |
232169967 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1509424217 |
|
|
Sep 11 06:51:08 PM UTC 24 |
Sep 11 06:51:15 PM UTC 24 |
948849893 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.4009101994 |
|
|
Sep 11 06:51:00 PM UTC 24 |
Sep 11 06:51:16 PM UTC 24 |
1343157989 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.3659142943 |
|
|
Sep 11 06:51:00 PM UTC 24 |
Sep 11 06:51:16 PM UTC 24 |
800602722 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.1002486313 |
|
|
Sep 11 06:50:38 PM UTC 24 |
Sep 11 06:51:17 PM UTC 24 |
688913539 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.3387788935 |
|
|
Sep 11 06:50:57 PM UTC 24 |
Sep 11 06:51:18 PM UTC 24 |
4045122907 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.205545321 |
|
|
Sep 11 06:52:28 PM UTC 24 |
Sep 11 06:52:33 PM UTC 24 |
147220466 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.3561603290 |
|
|
Sep 11 06:50:42 PM UTC 24 |
Sep 11 06:51:18 PM UTC 24 |
1014947311 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.598032542 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:19 PM UTC 24 |
437648849 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.3469653513 |
|
|
Sep 11 06:51:10 PM UTC 24 |
Sep 11 06:51:20 PM UTC 24 |
1270983984 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.3166513135 |
|
|
Sep 11 06:51:11 PM UTC 24 |
Sep 11 06:51:20 PM UTC 24 |
853207994 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.722623069 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:21 PM UTC 24 |
78372808 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3658613167 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:21 PM UTC 24 |
15194915 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.3007494160 |
|
|
Sep 11 06:51:13 PM UTC 24 |
Sep 11 06:51:22 PM UTC 24 |
308738334 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.2809143339 |
|
|
Sep 11 06:51:15 PM UTC 24 |
Sep 11 06:51:22 PM UTC 24 |
1555347841 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.4022359161 |
|
|
Sep 11 06:51:09 PM UTC 24 |
Sep 11 06:51:22 PM UTC 24 |
260878931 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.2386878478 |
|
|
Sep 11 06:51:10 PM UTC 24 |
Sep 11 06:51:22 PM UTC 24 |
504296000 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.316908703 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:22 PM UTC 24 |
40548944 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.4259137180 |
|
|
Sep 11 06:50:48 PM UTC 24 |
Sep 11 06:51:24 PM UTC 24 |
268804422 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1122651289 |
|
|
Sep 11 06:51:23 PM UTC 24 |
Sep 11 06:51:25 PM UTC 24 |
39452474 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.4043188414 |
|
|
Sep 11 06:51:23 PM UTC 24 |
Sep 11 06:51:25 PM UTC 24 |
54105523 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1510587583 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:26 PM UTC 24 |
524033931 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2744051214 |
|
|
Sep 11 06:51:23 PM UTC 24 |
Sep 11 06:51:26 PM UTC 24 |
172721712 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.4270758331 |
|
|
Sep 11 06:51:15 PM UTC 24 |
Sep 11 06:51:27 PM UTC 24 |
412219027 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.1938642309 |
|
|
Sep 11 06:50:52 PM UTC 24 |
Sep 11 06:51:27 PM UTC 24 |
249525127 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.2018106330 |
|
|
Sep 11 06:51:17 PM UTC 24 |
Sep 11 06:51:29 PM UTC 24 |
337864714 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.3264049349 |
|
|
Sep 11 06:51:26 PM UTC 24 |
Sep 11 06:51:29 PM UTC 24 |
78786015 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.3739501427 |
|
|
Sep 11 06:51:10 PM UTC 24 |
Sep 11 06:51:29 PM UTC 24 |
1276789441 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.2252491760 |
|
|
Sep 11 06:51:15 PM UTC 24 |
Sep 11 06:51:30 PM UTC 24 |
297613980 ps |