| T577 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.135185955 |
|
|
Sep 11 06:50:49 PM UTC 24 |
Sep 11 06:51:30 PM UTC 24 |
1829185356 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.676981843 |
|
|
Sep 11 06:50:14 PM UTC 24 |
Sep 11 06:51:30 PM UTC 24 |
20044653653 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.3239118918 |
|
|
Sep 11 06:51:16 PM UTC 24 |
Sep 11 06:51:30 PM UTC 24 |
380295158 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.1900053675 |
|
|
Sep 11 06:51:15 PM UTC 24 |
Sep 11 06:51:32 PM UTC 24 |
663248132 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.555723538 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:33 PM UTC 24 |
1141283074 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.755439987 |
|
|
Sep 11 06:51:24 PM UTC 24 |
Sep 11 06:51:33 PM UTC 24 |
151324667 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.3767934496 |
|
|
Sep 11 06:51:30 PM UTC 24 |
Sep 11 06:51:33 PM UTC 24 |
30470765 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.2364318601 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:33 PM UTC 24 |
61250113 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.3525339141 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:51:33 PM UTC 24 |
1156987723 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.1739046973 |
|
|
Sep 11 06:51:30 PM UTC 24 |
Sep 11 06:51:34 PM UTC 24 |
29298968 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.26070439 |
|
|
Sep 11 06:51:26 PM UTC 24 |
Sep 11 06:51:34 PM UTC 24 |
955173152 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.2932541844 |
|
|
Sep 11 06:51:32 PM UTC 24 |
Sep 11 06:51:35 PM UTC 24 |
15321181 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.1528938894 |
|
|
Sep 11 06:51:21 PM UTC 24 |
Sep 11 06:51:35 PM UTC 24 |
306301898 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2915548985 |
|
|
Sep 11 06:50:57 PM UTC 24 |
Sep 11 06:51:35 PM UTC 24 |
213974472 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.1193115489 |
|
|
Sep 11 06:51:21 PM UTC 24 |
Sep 11 06:51:35 PM UTC 24 |
943475446 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.318204354 |
|
|
Sep 11 06:51:21 PM UTC 24 |
Sep 11 06:51:36 PM UTC 24 |
9662440768 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.2970534783 |
|
|
Sep 11 06:51:32 PM UTC 24 |
Sep 11 06:51:36 PM UTC 24 |
37992033 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.3502343353 |
|
|
Sep 11 06:51:24 PM UTC 24 |
Sep 11 06:51:36 PM UTC 24 |
311478114 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.3420946968 |
|
|
Sep 11 06:51:21 PM UTC 24 |
Sep 11 06:51:37 PM UTC 24 |
1563275408 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.265831016 |
|
|
Sep 11 06:51:27 PM UTC 24 |
Sep 11 06:51:38 PM UTC 24 |
479003167 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.1963320412 |
|
|
Sep 11 06:50:33 PM UTC 24 |
Sep 11 06:51:38 PM UTC 24 |
61662924297 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.3764504597 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:51:40 PM UTC 24 |
23710347 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.1986731693 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:51:40 PM UTC 24 |
46234850 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.2027561390 |
|
|
Sep 11 06:51:32 PM UTC 24 |
Sep 11 06:51:41 PM UTC 24 |
148309604 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.2052175940 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:51:41 PM UTC 24 |
36873840 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.2152041304 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:51:41 PM UTC 24 |
985192505 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.1345886816 |
|
|
Sep 11 06:51:26 PM UTC 24 |
Sep 11 06:51:43 PM UTC 24 |
660114382 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.1183052376 |
|
|
Sep 11 06:51:23 PM UTC 24 |
Sep 11 06:51:43 PM UTC 24 |
587639120 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.2194052797 |
|
|
Sep 11 06:51:27 PM UTC 24 |
Sep 11 06:51:43 PM UTC 24 |
391079480 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.442218367 |
|
|
Sep 11 06:51:34 PM UTC 24 |
Sep 11 06:51:44 PM UTC 24 |
359661945 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.1391769514 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:51:45 PM UTC 24 |
391512749 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.4037828289 |
|
|
Sep 11 06:51:34 PM UTC 24 |
Sep 11 06:51:45 PM UTC 24 |
523107174 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.1937716038 |
|
|
Sep 11 06:51:43 PM UTC 24 |
Sep 11 06:51:46 PM UTC 24 |
21011291 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.3296131228 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:51:46 PM UTC 24 |
315815700 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.2795430676 |
|
|
Sep 11 06:51:34 PM UTC 24 |
Sep 11 06:51:47 PM UTC 24 |
2428625664 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.3075488956 |
|
|
Sep 11 06:51:44 PM UTC 24 |
Sep 11 06:51:47 PM UTC 24 |
12296759 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.1560952809 |
|
|
Sep 11 06:51:43 PM UTC 24 |
Sep 11 06:51:49 PM UTC 24 |
729825201 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.1503757240 |
|
|
Sep 11 06:51:35 PM UTC 24 |
Sep 11 06:51:50 PM UTC 24 |
1180086403 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.3484967066 |
|
|
Sep 11 06:52:29 PM UTC 24 |
Sep 11 06:52:31 PM UTC 24 |
25104140 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.4253275578 |
|
|
Sep 11 06:51:39 PM UTC 24 |
Sep 11 06:51:50 PM UTC 24 |
259874531 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.2563198098 |
|
|
Sep 11 06:51:35 PM UTC 24 |
Sep 11 06:51:50 PM UTC 24 |
2301050819 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.1049145434 |
|
|
Sep 11 06:51:46 PM UTC 24 |
Sep 11 06:51:50 PM UTC 24 |
64956209 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.1937398758 |
|
|
Sep 11 06:51:41 PM UTC 24 |
Sep 11 06:51:51 PM UTC 24 |
190421662 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_errors.458761954 |
|
|
Sep 11 06:51:38 PM UTC 24 |
Sep 11 06:51:52 PM UTC 24 |
419427287 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.4125072697 |
|
|
Sep 11 06:51:03 PM UTC 24 |
Sep 11 06:51:55 PM UTC 24 |
1550049567 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3176816952 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:33 PM UTC 24 |
254457808 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3037093451 |
|
|
Sep 11 06:51:34 PM UTC 24 |
Sep 11 06:51:52 PM UTC 24 |
427982382 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.4028563559 |
|
|
Sep 11 06:51:50 PM UTC 24 |
Sep 11 06:51:53 PM UTC 24 |
13771868 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.766029639 |
|
|
Sep 11 06:51:40 PM UTC 24 |
Sep 11 06:51:53 PM UTC 24 |
583859536 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.2499365796 |
|
|
Sep 11 06:51:02 PM UTC 24 |
Sep 11 06:51:53 PM UTC 24 |
1586610551 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.716840897 |
|
|
Sep 11 06:51:41 PM UTC 24 |
Sep 11 06:51:54 PM UTC 24 |
229388606 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.1377605595 |
|
|
Sep 11 06:49:45 PM UTC 24 |
Sep 11 06:51:54 PM UTC 24 |
2225795647 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.1076228374 |
|
|
Sep 11 06:51:46 PM UTC 24 |
Sep 11 06:51:54 PM UTC 24 |
398136198 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.3465041839 |
|
|
Sep 11 06:51:52 PM UTC 24 |
Sep 11 06:51:55 PM UTC 24 |
14385374 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.3981026118 |
|
|
Sep 11 06:51:13 PM UTC 24 |
Sep 11 06:51:55 PM UTC 24 |
611404149 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.3466063338 |
|
|
Sep 11 06:51:29 PM UTC 24 |
Sep 11 06:51:56 PM UTC 24 |
623433332 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.3492925456 |
|
|
Sep 11 06:52:21 PM UTC 24 |
Sep 11 06:52:29 PM UTC 24 |
665542216 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.3027061378 |
|
|
Sep 11 06:51:52 PM UTC 24 |
Sep 11 06:51:56 PM UTC 24 |
107644527 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.3841979375 |
|
|
Sep 11 06:51:45 PM UTC 24 |
Sep 11 06:51:56 PM UTC 24 |
111091674 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.460176259 |
|
|
Sep 11 06:51:39 PM UTC 24 |
Sep 11 06:51:58 PM UTC 24 |
2067759858 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.196664792 |
|
|
Sep 11 06:51:48 PM UTC 24 |
Sep 11 06:51:59 PM UTC 24 |
560158069 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.1269970340 |
|
|
Sep 11 06:52:24 PM UTC 24 |
Sep 11 06:52:28 PM UTC 24 |
68203821 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.2574886669 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:28 PM UTC 24 |
1204864950 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.659286382 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:29 PM UTC 24 |
2114122458 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.1124652594 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:31 PM UTC 24 |
4617338800 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.2646186970 |
|
|
Sep 11 06:51:54 PM UTC 24 |
Sep 11 06:51:59 PM UTC 24 |
141536332 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.877161228 |
|
|
Sep 11 06:50:28 PM UTC 24 |
Sep 11 06:51:59 PM UTC 24 |
8070638448 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2325325972 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:51:59 PM UTC 24 |
18107688 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.4086127591 |
|
|
Sep 11 06:51:19 PM UTC 24 |
Sep 11 06:52:00 PM UTC 24 |
379524008 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.2191713964 |
|
|
Sep 11 06:51:46 PM UTC 24 |
Sep 11 06:52:00 PM UTC 24 |
256667440 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.3700886389 |
|
|
Sep 11 06:51:58 PM UTC 24 |
Sep 11 06:52:01 PM UTC 24 |
89625258 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.1774738397 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:52:01 PM UTC 24 |
64475554 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3111752260 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:52:01 PM UTC 24 |
159347704 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.2186346670 |
|
|
Sep 11 06:51:46 PM UTC 24 |
Sep 11 06:52:03 PM UTC 24 |
3311527216 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.1751146454 |
|
|
Sep 11 06:52:00 PM UTC 24 |
Sep 11 06:52:03 PM UTC 24 |
29928985 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.2936200388 |
|
|
Sep 11 06:51:58 PM UTC 24 |
Sep 11 06:52:03 PM UTC 24 |
104692145 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.1900653076 |
|
|
Sep 11 06:51:23 PM UTC 24 |
Sep 11 06:52:03 PM UTC 24 |
301061782 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.2809569980 |
|
|
Sep 11 06:50:44 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
4834581493 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.1564064179 |
|
|
Sep 11 06:50:25 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
2963563498 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.1317400771 |
|
|
Sep 11 06:51:48 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
511265732 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.168716698 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
3608016214 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.624983729 |
|
|
Sep 11 06:52:02 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
88762629 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1767805705 |
|
|
Sep 11 06:51:54 PM UTC 24 |
Sep 11 06:52:04 PM UTC 24 |
224180591 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.2299231096 |
|
|
Sep 11 06:51:54 PM UTC 24 |
Sep 11 06:52:05 PM UTC 24 |
2301749469 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.1275853185 |
|
|
Sep 11 06:52:04 PM UTC 24 |
Sep 11 06:52:06 PM UTC 24 |
14491157 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.2832458931 |
|
|
Sep 11 06:51:48 PM UTC 24 |
Sep 11 06:52:07 PM UTC 24 |
566154967 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.4257804035 |
|
|
Sep 11 06:51:32 PM UTC 24 |
Sep 11 06:52:07 PM UTC 24 |
1091099022 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.1364085882 |
|
|
Sep 11 06:51:58 PM UTC 24 |
Sep 11 06:52:09 PM UTC 24 |
332246242 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.3225315080 |
|
|
Sep 11 06:52:04 PM UTC 24 |
Sep 11 06:52:09 PM UTC 24 |
134890372 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.94879830 |
|
|
Sep 11 06:52:00 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
2294031487 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.1208933962 |
|
|
Sep 11 06:51:54 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
1346611942 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.238338521 |
|
|
Sep 11 06:52:08 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
95263938 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.2933989427 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
32131507 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.2738124005 |
|
|
Sep 11 06:50:17 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
11379397058 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.2974676008 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:52:10 PM UTC 24 |
653970488 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.2765397411 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:11 PM UTC 24 |
122703491 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.940233290 |
|
|
Sep 11 06:52:24 PM UTC 24 |
Sep 11 06:52:31 PM UTC 24 |
862601376 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.764106367 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:52:12 PM UTC 24 |
984626721 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.2000944188 |
|
|
Sep 11 06:52:02 PM UTC 24 |
Sep 11 06:52:13 PM UTC 24 |
1297821992 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.3408732024 |
|
|
Sep 11 06:52:10 PM UTC 24 |
Sep 11 06:52:13 PM UTC 24 |
18544537 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.3422750661 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:52:13 PM UTC 24 |
1449020820 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.582294356 |
|
|
Sep 11 06:52:09 PM UTC 24 |
Sep 11 06:52:13 PM UTC 24 |
135244299 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.546841102 |
|
|
Sep 11 06:52:02 PM UTC 24 |
Sep 11 06:52:14 PM UTC 24 |
218700929 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.1005270108 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:15 PM UTC 24 |
469030609 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.3360901130 |
|
|
Sep 11 06:52:02 PM UTC 24 |
Sep 11 06:52:16 PM UTC 24 |
503192026 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.2818838972 |
|
|
Sep 11 06:50:20 PM UTC 24 |
Sep 11 06:52:16 PM UTC 24 |
5571868074 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.2269101078 |
|
|
Sep 11 06:51:17 PM UTC 24 |
Sep 11 06:52:17 PM UTC 24 |
3632685933 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.1140169796 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:17 PM UTC 24 |
1325169846 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.4182040297 |
|
|
Sep 11 06:52:15 PM UTC 24 |
Sep 11 06:52:17 PM UTC 24 |
296469110 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.3043002013 |
|
|
Sep 11 06:52:15 PM UTC 24 |
Sep 11 06:52:18 PM UTC 24 |
47547583 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.205873583 |
|
|
Sep 11 06:50:40 PM UTC 24 |
Sep 11 06:52:18 PM UTC 24 |
26052728241 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.259049691 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:18 PM UTC 24 |
235201396 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.1664369086 |
|
|
Sep 11 06:52:15 PM UTC 24 |
Sep 11 06:52:18 PM UTC 24 |
176603561 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.1200923428 |
|
|
Sep 11 06:50:44 PM UTC 24 |
Sep 11 06:52:19 PM UTC 24 |
11153639732 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.2669837714 |
|
|
Sep 11 06:52:11 PM UTC 24 |
Sep 11 06:52:19 PM UTC 24 |
92864805 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.3908625753 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:20 PM UTC 24 |
538825346 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.4038490561 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:21 PM UTC 24 |
1529708991 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.3949287628 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:21 PM UTC 24 |
260156143 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.735234060 |
|
|
Sep 11 06:52:00 PM UTC 24 |
Sep 11 06:52:22 PM UTC 24 |
551467378 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.1590296482 |
|
|
Sep 11 06:52:21 PM UTC 24 |
Sep 11 06:52:23 PM UTC 24 |
22181257 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.8824303 |
|
|
Sep 11 06:52:21 PM UTC 24 |
Sep 11 06:52:23 PM UTC 24 |
31217894 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.1892009511 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:23 PM UTC 24 |
662240374 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.3537145369 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:24 PM UTC 24 |
151189200 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.3329102429 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:24 PM UTC 24 |
212377757 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.717712737 |
|
|
Sep 11 06:52:17 PM UTC 24 |
Sep 11 06:52:24 PM UTC 24 |
298573268 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.1444455519 |
|
|
Sep 11 06:51:37 PM UTC 24 |
Sep 11 06:52:24 PM UTC 24 |
1403584593 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.2765429192 |
|
|
Sep 11 06:52:21 PM UTC 24 |
Sep 11 06:52:25 PM UTC 24 |
124986812 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.514122764 |
|
|
Sep 11 06:52:13 PM UTC 24 |
Sep 11 06:52:26 PM UTC 24 |
292163192 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.3629779765 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:27 PM UTC 24 |
1048396037 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.869955113 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:27 PM UTC 24 |
320420701 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.784480634 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:27 PM UTC 24 |
250198938 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.2688918082 |
|
|
Sep 11 06:52:22 PM UTC 24 |
Sep 11 06:52:27 PM UTC 24 |
151598953 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.325763324 |
|
|
Sep 11 06:52:06 PM UTC 24 |
Sep 11 06:52:28 PM UTC 24 |
2852976885 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.2101831475 |
|
|
Sep 11 06:51:45 PM UTC 24 |
Sep 11 06:52:29 PM UTC 24 |
269459857 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.3052888876 |
|
|
Sep 11 06:52:27 PM UTC 24 |
Sep 11 06:52:29 PM UTC 24 |
56531135 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.1081354491 |
|
|
Sep 11 06:52:29 PM UTC 24 |
Sep 11 06:52:32 PM UTC 24 |
160975328 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.3547418904 |
|
|
Sep 11 06:51:58 PM UTC 24 |
Sep 11 06:52:35 PM UTC 24 |
469628916 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.2286578334 |
|
|
Sep 11 06:51:52 PM UTC 24 |
Sep 11 06:52:35 PM UTC 24 |
1344892747 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.3390724887 |
|
|
Sep 11 06:52:33 PM UTC 24 |
Sep 11 06:52:35 PM UTC 24 |
22563322 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.3995560238 |
|
|
Sep 11 06:52:24 PM UTC 24 |
Sep 11 06:52:35 PM UTC 24 |
433923757 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.330336042 |
|
|
Sep 11 06:52:04 PM UTC 24 |
Sep 11 06:52:36 PM UTC 24 |
174680217 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.634576772 |
|
|
Sep 11 06:52:34 PM UTC 24 |
Sep 11 06:52:37 PM UTC 24 |
40887360 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2138750888 |
|
|
Sep 11 06:52:25 PM UTC 24 |
Sep 11 06:52:37 PM UTC 24 |
822126704 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.1093384931 |
|
|
Sep 11 06:52:25 PM UTC 24 |
Sep 11 06:52:38 PM UTC 24 |
519408076 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.459060213 |
|
|
Sep 11 06:52:25 PM UTC 24 |
Sep 11 06:52:38 PM UTC 24 |
2574938891 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.1340168523 |
|
|
Sep 11 06:53:05 PM UTC 24 |
Sep 11 06:53:17 PM UTC 24 |
774025224 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.3757448205 |
|
|
Sep 11 06:52:34 PM UTC 24 |
Sep 11 06:52:39 PM UTC 24 |
151491067 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.3762989999 |
|
|
Sep 11 06:52:29 PM UTC 24 |
Sep 11 06:52:40 PM UTC 24 |
106524225 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.1446117285 |
|
|
Sep 11 06:52:36 PM UTC 24 |
Sep 11 06:52:41 PM UTC 24 |
63410242 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.1454163491 |
|
|
Sep 11 06:52:36 PM UTC 24 |
Sep 11 06:52:41 PM UTC 24 |
64025587 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.1682825356 |
|
|
Sep 11 06:52:22 PM UTC 24 |
Sep 11 06:52:41 PM UTC 24 |
2450408116 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.2045884549 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:41 PM UTC 24 |
580963916 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.304751051 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:42 PM UTC 24 |
584172673 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.2057359230 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:42 PM UTC 24 |
367518679 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.2001681963 |
|
|
Sep 11 06:52:40 PM UTC 24 |
Sep 11 06:52:42 PM UTC 24 |
64814763 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.1480289360 |
|
|
Sep 11 06:52:40 PM UTC 24 |
Sep 11 06:52:43 PM UTC 24 |
118064879 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.1570167137 |
|
|
Sep 11 06:52:41 PM UTC 24 |
Sep 11 06:52:43 PM UTC 24 |
21527193 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.1143625959 |
|
|
Sep 11 06:52:18 PM UTC 24 |
Sep 11 06:52:44 PM UTC 24 |
3874885140 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.1064522513 |
|
|
Sep 11 06:52:37 PM UTC 24 |
Sep 11 06:52:44 PM UTC 24 |
1153498247 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.1390652340 |
|
|
Sep 11 06:51:50 PM UTC 24 |
Sep 11 06:53:18 PM UTC 24 |
3260478721 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.711126013 |
|
|
Sep 11 06:51:30 PM UTC 24 |
Sep 11 06:52:45 PM UTC 24 |
21828930398 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.889054789 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:45 PM UTC 24 |
746314874 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.3093852892 |
|
|
Sep 11 06:53:11 PM UTC 24 |
Sep 11 06:53:17 PM UTC 24 |
97963572 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.2037870710 |
|
|
Sep 11 06:52:25 PM UTC 24 |
Sep 11 06:52:46 PM UTC 24 |
2512772358 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.504046374 |
|
|
Sep 11 06:52:29 PM UTC 24 |
Sep 11 06:53:17 PM UTC 24 |
1064636247 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.3958961134 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:46 PM UTC 24 |
1031910406 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.3868271436 |
|
|
Sep 11 06:52:37 PM UTC 24 |
Sep 11 06:52:49 PM UTC 24 |
483871360 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.595786696 |
|
|
Sep 11 06:52:43 PM UTC 24 |
Sep 11 06:52:49 PM UTC 24 |
151735451 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.3722255984 |
|
|
Sep 11 06:52:47 PM UTC 24 |
Sep 11 06:52:49 PM UTC 24 |
16825921 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.798573415 |
|
|
Sep 11 06:52:47 PM UTC 24 |
Sep 11 06:52:49 PM UTC 24 |
27485521 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.2994256564 |
|
|
Sep 11 06:52:36 PM UTC 24 |
Sep 11 06:52:50 PM UTC 24 |
450633152 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.814794516 |
|
|
Sep 11 06:52:40 PM UTC 24 |
Sep 11 06:52:51 PM UTC 24 |
1011226595 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.2696393544 |
|
|
Sep 11 06:52:10 PM UTC 24 |
Sep 11 06:52:51 PM UTC 24 |
307968497 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.3855510677 |
|
|
Sep 11 06:52:47 PM UTC 24 |
Sep 11 06:52:52 PM UTC 24 |
92148999 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.1816280829 |
|
|
Sep 11 06:52:43 PM UTC 24 |
Sep 11 06:52:52 PM UTC 24 |
821985804 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.4185697123 |
|
|
Sep 11 06:52:31 PM UTC 24 |
Sep 11 06:52:53 PM UTC 24 |
815431837 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.2654754098 |
|
|
Sep 11 06:51:02 PM UTC 24 |
Sep 11 06:52:53 PM UTC 24 |
12481856368 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.2579696163 |
|
|
Sep 11 06:52:48 PM UTC 24 |
Sep 11 06:52:53 PM UTC 24 |
245088081 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.1244620904 |
|
|
Sep 11 06:52:44 PM UTC 24 |
Sep 11 06:52:54 PM UTC 24 |
1147936694 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.3546241354 |
|
|
Sep 11 06:52:36 PM UTC 24 |
Sep 11 06:52:54 PM UTC 24 |
325799514 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.3237494957 |
|
|
Sep 11 06:52:53 PM UTC 24 |
Sep 11 06:52:55 PM UTC 24 |
50471482 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.2746364499 |
|
|
Sep 11 06:52:43 PM UTC 24 |
Sep 11 06:52:56 PM UTC 24 |
250655257 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.4280770973 |
|
|
Sep 11 06:52:43 PM UTC 24 |
Sep 11 06:52:57 PM UTC 24 |
1855089738 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.1350709575 |
|
|
Sep 11 06:52:55 PM UTC 24 |
Sep 11 06:52:57 PM UTC 24 |
134127047 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.2379839322 |
|
|
Sep 11 06:52:48 PM UTC 24 |
Sep 11 06:52:58 PM UTC 24 |
875184463 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.167830533 |
|
|
Sep 11 06:52:45 PM UTC 24 |
Sep 11 06:52:58 PM UTC 24 |
1918691370 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.4038940543 |
|
|
Sep 11 06:52:55 PM UTC 24 |
Sep 11 06:52:59 PM UTC 24 |
49868012 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1498659702 |
|
|
Sep 11 06:52:50 PM UTC 24 |
Sep 11 06:52:59 PM UTC 24 |
322733239 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.2534239964 |
|
|
Sep 11 06:52:53 PM UTC 24 |
Sep 11 06:52:59 PM UTC 24 |
76602793 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.1513373721 |
|
|
Sep 11 06:52:57 PM UTC 24 |
Sep 11 06:53:02 PM UTC 24 |
694732178 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.2771950152 |
|
|
Sep 11 06:52:44 PM UTC 24 |
Sep 11 06:53:02 PM UTC 24 |
347379908 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.1523188689 |
|
|
Sep 11 06:52:50 PM UTC 24 |
Sep 11 06:53:02 PM UTC 24 |
479870383 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.3319178347 |
|
|
Sep 11 06:53:00 PM UTC 24 |
Sep 11 06:53:02 PM UTC 24 |
15616032 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.1345932588 |
|
|
Sep 11 06:52:40 PM UTC 24 |
Sep 11 06:53:03 PM UTC 24 |
11125898367 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.3127467447 |
|
|
Sep 11 06:52:48 PM UTC 24 |
Sep 11 06:53:03 PM UTC 24 |
230596775 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.1867783623 |
|
|
Sep 11 06:52:50 PM UTC 24 |
Sep 11 06:53:04 PM UTC 24 |
16152104051 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3491889378 |
|
|
Sep 11 06:52:43 PM UTC 24 |
Sep 11 06:53:04 PM UTC 24 |
605341065 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.47352809 |
|
|
Sep 11 06:52:55 PM UTC 24 |
Sep 11 06:53:05 PM UTC 24 |
154481562 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.1892857714 |
|
|
Sep 11 06:52:57 PM UTC 24 |
Sep 11 06:53:06 PM UTC 24 |
237553580 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.1815349404 |
|
|
Sep 11 06:52:34 PM UTC 24 |
Sep 11 06:53:06 PM UTC 24 |
627277323 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.2166248066 |
|
|
Sep 11 06:53:03 PM UTC 24 |
Sep 11 06:53:06 PM UTC 24 |
24022263 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.891125763 |
|
|
Sep 11 06:52:50 PM UTC 24 |
Sep 11 06:53:07 PM UTC 24 |
2031469403 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.894860054 |
|
|
Sep 11 06:52:58 PM UTC 24 |
Sep 11 06:53:08 PM UTC 24 |
320573876 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.963571390 |
|
|
Sep 11 06:52:52 PM UTC 24 |
Sep 11 06:53:08 PM UTC 24 |
1829175684 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.3806597316 |
|
|
Sep 11 06:53:00 PM UTC 24 |
Sep 11 06:53:09 PM UTC 24 |
103061687 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.29167765 |
|
|
Sep 11 06:52:55 PM UTC 24 |
Sep 11 06:53:09 PM UTC 24 |
813901107 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.824575901 |
|
|
Sep 11 06:53:03 PM UTC 24 |
Sep 11 06:53:10 PM UTC 24 |
92465237 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.3399790116 |
|
|
Sep 11 06:52:16 PM UTC 24 |
Sep 11 06:53:10 PM UTC 24 |
1719626541 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.3677342902 |
|
|
Sep 11 06:53:08 PM UTC 24 |
Sep 11 06:53:11 PM UTC 24 |
49333200 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3221583603 |
|
|
Sep 11 06:52:59 PM UTC 24 |
Sep 11 06:53:11 PM UTC 24 |
392443814 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.373887189 |
|
|
Sep 11 06:53:09 PM UTC 24 |
Sep 11 06:53:12 PM UTC 24 |
12745303 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.2604034759 |
|
|
Sep 11 06:53:05 PM UTC 24 |
Sep 11 06:53:12 PM UTC 24 |
243852746 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.764842644 |
|
|
Sep 11 06:53:03 PM UTC 24 |
Sep 11 06:53:13 PM UTC 24 |
757660317 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.122703958 |
|
|
Sep 11 06:52:41 PM UTC 24 |
Sep 11 06:53:14 PM UTC 24 |
227855965 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.1515420577 |
|
|
Sep 11 06:53:09 PM UTC 24 |
Sep 11 06:53:14 PM UTC 24 |
45807443 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.752090706 |
|
|
Sep 11 06:53:06 PM UTC 24 |
Sep 11 06:53:15 PM UTC 24 |
227945414 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.1827106766 |
|
|
Sep 11 06:52:58 PM UTC 24 |
Sep 11 06:53:18 PM UTC 24 |
954869138 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.1943243349 |
|
|
Sep 11 06:53:06 PM UTC 24 |
Sep 11 06:53:18 PM UTC 24 |
431603456 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.1645688067 |
|
|
Sep 11 06:53:05 PM UTC 24 |
Sep 11 06:53:19 PM UTC 24 |
1119258024 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.690313294 |
|
|
Sep 11 06:53:17 PM UTC 24 |
Sep 11 06:53:19 PM UTC 24 |
137856793 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.1221572292 |
|
|
Sep 11 06:53:17 PM UTC 24 |
Sep 11 06:53:20 PM UTC 24 |
120550208 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.2743078474 |
|
|
Sep 11 06:51:50 PM UTC 24 |
Sep 11 06:53:20 PM UTC 24 |
3986472143 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.4046595263 |
|
|
Sep 11 06:53:19 PM UTC 24 |
Sep 11 06:53:21 PM UTC 24 |
59213186 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.1428157170 |
|
|
Sep 11 06:53:11 PM UTC 24 |
Sep 11 06:53:22 PM UTC 24 |
136645785 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.157334526 |
|
|
Sep 11 06:53:19 PM UTC 24 |
Sep 11 06:53:22 PM UTC 24 |
15162047 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all_with_rand_reset.391181570 |
|
|
Sep 11 06:51:06 PM UTC 24 |
Sep 11 06:53:22 PM UTC 24 |
22091325753 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.2961952245 |
|
|
Sep 11 06:52:48 PM UTC 24 |
Sep 11 06:53:22 PM UTC 24 |
332450428 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.2652507292 |
|
|
Sep 11 06:53:14 PM UTC 24 |
Sep 11 06:53:24 PM UTC 24 |
444611745 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.1407822818 |
|
|
Sep 11 06:53:14 PM UTC 24 |
Sep 11 06:53:24 PM UTC 24 |
2262654168 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all.4175387140 |
|
|
Sep 11 06:52:33 PM UTC 24 |
Sep 11 06:53:24 PM UTC 24 |
3013850378 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.518196368 |
|
|
Sep 11 06:53:05 PM UTC 24 |
Sep 11 06:53:24 PM UTC 24 |
433073821 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.1218844919 |
|
|
Sep 11 06:53:12 PM UTC 24 |
Sep 11 06:53:25 PM UTC 24 |
619807170 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.3605633288 |
|
|
Sep 11 06:53:13 PM UTC 24 |
Sep 11 06:53:25 PM UTC 24 |
688293108 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.2996216160 |
|
|
Sep 11 06:53:23 PM UTC 24 |
Sep 11 06:53:25 PM UTC 24 |
15659649 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.3951772430 |
|
|
Sep 11 06:53:24 PM UTC 24 |
Sep 11 06:53:27 PM UTC 24 |
141895505 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.729500039 |
|
|
Sep 11 06:53:13 PM UTC 24 |
Sep 11 06:53:27 PM UTC 24 |
951890885 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.2603322259 |
|
|
Sep 11 06:53:24 PM UTC 24 |
Sep 11 06:53:29 PM UTC 24 |
91318966 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_jtag_access.668402358 |
|
|
Sep 11 06:53:21 PM UTC 24 |
Sep 11 06:53:29 PM UTC 24 |
476574033 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_state_post_trans.2813705267 |
|
|
Sep 11 06:53:25 PM UTC 24 |
Sep 11 06:53:30 PM UTC 24 |
161797480 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.1124189846 |
|
|
Sep 11 06:53:19 PM UTC 24 |
Sep 11 06:53:30 PM UTC 24 |
182011723 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.2180144748 |
|
|
Sep 11 06:53:13 PM UTC 24 |
Sep 11 06:53:31 PM UTC 24 |
667829119 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.2467545925 |
|
|
Sep 11 06:53:21 PM UTC 24 |
Sep 11 06:53:31 PM UTC 24 |
248942261 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.738162179 |
|
|
Sep 11 06:53:26 PM UTC 24 |
Sep 11 06:53:31 PM UTC 24 |
275344993 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_mux.2528542676 |
|
|
Sep 11 06:53:21 PM UTC 24 |
Sep 11 06:53:32 PM UTC 24 |
969404442 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.4140840520 |
|
|
Sep 11 06:53:30 PM UTC 24 |
Sep 11 06:53:33 PM UTC 24 |
24423925 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_stress_all.1390794775 |
|
|
Sep 11 06:53:00 PM UTC 24 |
Sep 11 06:54:36 PM UTC 24 |
4377534796 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/48.lc_ctrl_volatile_unlock_smoke.1060617880 |
|
|
Sep 11 06:53:32 PM UTC 24 |
Sep 11 06:53:34 PM UTC 24 |
16252411 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/48.lc_ctrl_smoke.698745513 |
|
|
Sep 11 06:53:32 PM UTC 24 |
Sep 11 06:53:36 PM UTC 24 |
79993014 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all.3105455202 |
|
|
Sep 11 06:51:57 PM UTC 24 |
Sep 11 06:53:36 PM UTC 24 |
10413583143 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/48.lc_ctrl_prog_failure.3517855464 |
|
|
Sep 11 06:53:33 PM UTC 24 |
Sep 11 06:53:37 PM UTC 24 |
29367810 ps |