| T367 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.1584800888 |
|
|
Sep 24 11:03:56 PM UTC 24 |
Sep 24 11:04:03 PM UTC 24 |
1409660108 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.4140271199 |
|
|
Sep 24 11:03:35 PM UTC 24 |
Sep 24 11:04:05 PM UTC 24 |
453137012 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_prog_failure.1274024881 |
|
|
Sep 24 11:03:43 PM UTC 24 |
Sep 24 11:04:05 PM UTC 24 |
3949063186 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3158839015 |
|
|
Sep 24 11:03:25 PM UTC 24 |
Sep 24 11:04:05 PM UTC 24 |
1769738442 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.2352535013 |
|
|
Sep 24 11:03:49 PM UTC 24 |
Sep 24 11:04:09 PM UTC 24 |
529699187 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_errors.2938378919 |
|
|
Sep 24 11:03:37 PM UTC 24 |
Sep 24 11:04:11 PM UTC 24 |
3383445192 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.490207294 |
|
|
Sep 24 11:03:55 PM UTC 24 |
Sep 24 11:04:11 PM UTC 24 |
1763664555 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_errors.263905147 |
|
|
Sep 24 11:03:55 PM UTC 24 |
Sep 24 11:04:13 PM UTC 24 |
671821493 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.4225776721 |
|
|
Sep 24 11:04:06 PM UTC 24 |
Sep 24 11:04:14 PM UTC 24 |
719598718 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.3187796207 |
|
|
Sep 24 11:03:45 PM UTC 24 |
Sep 24 11:04:15 PM UTC 24 |
523490359 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.2170024746 |
|
|
Sep 24 11:04:00 PM UTC 24 |
Sep 24 11:04:16 PM UTC 24 |
3218889415 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.4062376336 |
|
|
Sep 24 11:04:14 PM UTC 24 |
Sep 24 11:04:16 PM UTC 24 |
21029248 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.771415434 |
|
|
Sep 24 11:03:59 PM UTC 24 |
Sep 24 11:04:17 PM UTC 24 |
1115669124 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_mux.1760131887 |
|
|
Sep 24 11:03:46 PM UTC 24 |
Sep 24 11:04:18 PM UTC 24 |
5240265740 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.3119810381 |
|
|
Sep 24 11:04:16 PM UTC 24 |
Sep 24 11:04:18 PM UTC 24 |
23493665 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.4067368677 |
|
|
Sep 24 11:03:53 PM UTC 24 |
Sep 24 11:04:19 PM UTC 24 |
981543098 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3958956290 |
|
|
Sep 24 11:04:18 PM UTC 24 |
Sep 24 11:04:21 PM UTC 24 |
32295592 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.1822588883 |
|
|
Sep 24 11:04:15 PM UTC 24 |
Sep 24 11:04:22 PM UTC 24 |
1065952572 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2913885543 |
|
|
Sep 24 11:04:17 PM UTC 24 |
Sep 24 11:04:23 PM UTC 24 |
66699313 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.429945480 |
|
|
Sep 24 11:04:07 PM UTC 24 |
Sep 24 11:04:24 PM UTC 24 |
702480684 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.353981474 |
|
|
Sep 24 11:03:22 PM UTC 24 |
Sep 24 11:04:24 PM UTC 24 |
6665050878 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.2890851927 |
|
|
Sep 24 11:03:44 PM UTC 24 |
Sep 24 11:04:24 PM UTC 24 |
1686606433 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.4165556406 |
|
|
Sep 24 11:02:37 PM UTC 24 |
Sep 24 11:04:25 PM UTC 24 |
4341797818 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.939671947 |
|
|
Sep 24 11:04:06 PM UTC 24 |
Sep 24 11:04:27 PM UTC 24 |
468356413 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3282508859 |
|
|
Sep 24 11:04:21 PM UTC 24 |
Sep 24 11:04:29 PM UTC 24 |
2134975576 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_errors.3789818356 |
|
|
Sep 24 11:02:16 PM UTC 24 |
Sep 24 11:04:30 PM UTC 24 |
4778676390 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.3314769972 |
|
|
Sep 24 11:04:20 PM UTC 24 |
Sep 24 11:04:31 PM UTC 24 |
1112919663 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.2764740633 |
|
|
Sep 24 11:04:26 PM UTC 24 |
Sep 24 11:04:32 PM UTC 24 |
402204982 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.3435237935 |
|
|
Sep 24 11:04:20 PM UTC 24 |
Sep 24 11:04:33 PM UTC 24 |
255168416 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3192169638 |
|
|
Sep 24 11:04:09 PM UTC 24 |
Sep 24 11:04:33 PM UTC 24 |
1954886298 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.2132438030 |
|
|
Sep 24 11:04:32 PM UTC 24 |
Sep 24 11:04:34 PM UTC 24 |
73451905 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.3898417848 |
|
|
Sep 24 11:03:30 PM UTC 24 |
Sep 24 11:04:36 PM UTC 24 |
3327583035 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1623728063 |
|
|
Sep 24 11:04:34 PM UTC 24 |
Sep 24 11:04:36 PM UTC 24 |
36371243 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.337711965 |
|
|
Sep 24 11:04:33 PM UTC 24 |
Sep 24 11:04:37 PM UTC 24 |
26163130 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.2477743849 |
|
|
Sep 24 11:04:26 PM UTC 24 |
Sep 24 11:04:39 PM UTC 24 |
267116141 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.2742655188 |
|
|
Sep 24 11:04:35 PM UTC 24 |
Sep 24 11:04:41 PM UTC 24 |
78912032 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.3847924307 |
|
|
Sep 24 11:04:26 PM UTC 24 |
Sep 24 11:04:41 PM UTC 24 |
1796914392 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.953462070 |
|
|
Sep 24 11:04:37 PM UTC 24 |
Sep 24 11:04:42 PM UTC 24 |
51496031 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.2647811176 |
|
|
Sep 24 11:04:24 PM UTC 24 |
Sep 24 11:04:42 PM UTC 24 |
2845006507 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all_with_rand_reset.2707370051 |
|
|
Sep 24 11:02:00 PM UTC 24 |
Sep 24 11:04:42 PM UTC 24 |
9493670351 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.1222403979 |
|
|
Sep 24 11:04:40 PM UTC 24 |
Sep 24 11:04:44 PM UTC 24 |
58272675 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.2847543675 |
|
|
Sep 24 11:04:23 PM UTC 24 |
Sep 24 11:04:44 PM UTC 24 |
1471139719 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.3607066899 |
|
|
Sep 24 11:04:17 PM UTC 24 |
Sep 24 11:04:45 PM UTC 24 |
162467973 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.329054491 |
|
|
Sep 24 11:04:44 PM UTC 24 |
Sep 24 11:04:46 PM UTC 24 |
33079159 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.691321727 |
|
|
Sep 24 11:04:27 PM UTC 24 |
Sep 24 11:04:47 PM UTC 24 |
2316471980 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.2208051114 |
|
|
Sep 24 11:04:42 PM UTC 24 |
Sep 24 11:04:50 PM UTC 24 |
356984513 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.3356270332 |
|
|
Sep 24 11:04:51 PM UTC 24 |
Sep 24 11:04:53 PM UTC 24 |
47683601 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.473143209 |
|
|
Sep 24 11:04:38 PM UTC 24 |
Sep 24 11:04:54 PM UTC 24 |
475889409 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.2199929563 |
|
|
Sep 24 11:04:38 PM UTC 24 |
Sep 24 11:04:55 PM UTC 24 |
300086317 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.1711367350 |
|
|
Sep 24 11:04:45 PM UTC 24 |
Sep 24 11:04:58 PM UTC 24 |
6794942765 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.2468539936 |
|
|
Sep 24 11:04:55 PM UTC 24 |
Sep 24 11:04:58 PM UTC 24 |
39189558 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.2508083937 |
|
|
Sep 24 11:04:34 PM UTC 24 |
Sep 24 11:04:58 PM UTC 24 |
749876255 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.318480083 |
|
|
Sep 24 11:04:42 PM UTC 24 |
Sep 24 11:04:59 PM UTC 24 |
511669929 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.851915395 |
|
|
Sep 24 11:04:54 PM UTC 24 |
Sep 24 11:04:59 PM UTC 24 |
120190267 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3362780709 |
|
|
Sep 24 11:04:59 PM UTC 24 |
Sep 24 11:05:03 PM UTC 24 |
178745939 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.820744083 |
|
|
Sep 24 11:04:03 PM UTC 24 |
Sep 24 11:05:04 PM UTC 24 |
2910570741 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.2569595937 |
|
|
Sep 24 11:04:46 PM UTC 24 |
Sep 24 11:05:05 PM UTC 24 |
1471455716 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.4019768231 |
|
|
Sep 24 11:03:38 PM UTC 24 |
Sep 24 11:05:06 PM UTC 24 |
16215625774 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.899752235 |
|
|
Sep 24 11:04:45 PM UTC 24 |
Sep 24 11:05:06 PM UTC 24 |
2265392692 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.4081011643 |
|
|
Sep 24 11:04:59 PM UTC 24 |
Sep 24 11:05:10 PM UTC 24 |
100033494 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.990506326 |
|
|
Sep 24 11:05:00 PM UTC 24 |
Sep 24 11:05:14 PM UTC 24 |
2268839624 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.1223180052 |
|
|
Sep 24 11:04:59 PM UTC 24 |
Sep 24 11:05:14 PM UTC 24 |
1066909129 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.3180386129 |
|
|
Sep 24 11:04:22 PM UTC 24 |
Sep 24 11:05:15 PM UTC 24 |
6504832165 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.2317608978 |
|
|
Sep 24 11:05:15 PM UTC 24 |
Sep 24 11:05:18 PM UTC 24 |
27903634 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.101337657 |
|
|
Sep 24 11:05:17 PM UTC 24 |
Sep 24 11:05:19 PM UTC 24 |
13300094 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/2.lc_ctrl_stress_all.3973828624 |
|
|
Sep 24 11:00:10 PM UTC 24 |
Sep 24 11:05:19 PM UTC 24 |
28587744936 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.190686263 |
|
|
Sep 24 11:05:08 PM UTC 24 |
Sep 24 11:05:20 PM UTC 24 |
1199203852 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2759951168 |
|
|
Sep 24 11:04:24 PM UTC 24 |
Sep 24 11:05:21 PM UTC 24 |
1546250162 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1631459702 |
|
|
Sep 24 11:05:05 PM UTC 24 |
Sep 24 11:05:22 PM UTC 24 |
2782159872 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.2878028807 |
|
|
Sep 24 11:05:17 PM UTC 24 |
Sep 24 11:05:23 PM UTC 24 |
50740702 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.2140665403 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:29 PM UTC 24 |
68387011 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.2497024486 |
|
|
Sep 24 11:05:06 PM UTC 24 |
Sep 24 11:05:23 PM UTC 24 |
1322599737 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.4080164393 |
|
|
Sep 24 11:03:56 PM UTC 24 |
Sep 24 11:05:24 PM UTC 24 |
6724704782 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3977113310 |
|
|
Sep 24 11:05:03 PM UTC 24 |
Sep 24 11:05:25 PM UTC 24 |
2807841952 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.3338910227 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:05:25 PM UTC 24 |
30661449 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.3609743652 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:05:29 PM UTC 24 |
136381240 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.2059581968 |
|
|
Sep 24 11:05:25 PM UTC 24 |
Sep 24 11:05:29 PM UTC 24 |
110719201 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.3829397535 |
|
|
Sep 24 11:04:55 PM UTC 24 |
Sep 24 11:05:31 PM UTC 24 |
707484126 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.3999281999 |
|
|
Sep 24 11:05:23 PM UTC 24 |
Sep 24 11:05:33 PM UTC 24 |
3110964056 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.2648865671 |
|
|
Sep 24 11:05:30 PM UTC 24 |
Sep 24 11:05:33 PM UTC 24 |
135355548 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.531539404 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:05:34 PM UTC 24 |
1347868615 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.3276293470 |
|
|
Sep 24 11:05:32 PM UTC 24 |
Sep 24 11:05:34 PM UTC 24 |
89202830 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.488174271 |
|
|
Sep 24 11:05:30 PM UTC 24 |
Sep 24 11:05:35 PM UTC 24 |
91091055 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.617436496 |
|
|
Sep 24 11:05:26 PM UTC 24 |
Sep 24 11:05:38 PM UTC 24 |
444529953 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.2558389261 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:05:38 PM UTC 24 |
1224795165 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.2228563801 |
|
|
Sep 24 11:05:22 PM UTC 24 |
Sep 24 11:05:39 PM UTC 24 |
2479197987 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.1940558849 |
|
|
Sep 24 11:03:49 PM UTC 24 |
Sep 24 11:05:39 PM UTC 24 |
12243142356 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.3889066746 |
|
|
Sep 24 11:04:29 PM UTC 24 |
Sep 24 11:05:41 PM UTC 24 |
7058701162 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.1488395753 |
|
|
Sep 24 11:05:35 PM UTC 24 |
Sep 24 11:05:41 PM UTC 24 |
74308231 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.2732331627 |
|
|
Sep 24 11:05:25 PM UTC 24 |
Sep 24 11:05:43 PM UTC 24 |
961471192 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.2761883456 |
|
|
Sep 24 11:05:25 PM UTC 24 |
Sep 24 11:05:44 PM UTC 24 |
1070951415 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.3845720007 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:05:45 PM UTC 24 |
1336750396 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3697600875 |
|
|
Sep 24 11:05:00 PM UTC 24 |
Sep 24 11:05:46 PM UTC 24 |
4451075945 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.2667260763 |
|
|
Sep 24 11:05:36 PM UTC 24 |
Sep 24 11:05:47 PM UTC 24 |
280410928 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.3920568953 |
|
|
Sep 24 11:01:59 PM UTC 24 |
Sep 24 11:05:48 PM UTC 24 |
35517738301 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.1409052227 |
|
|
Sep 24 11:05:34 PM UTC 24 |
Sep 24 11:05:48 PM UTC 24 |
110298621 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.3336826829 |
|
|
Sep 24 11:05:39 PM UTC 24 |
Sep 24 11:05:51 PM UTC 24 |
285843348 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.4202774702 |
|
|
Sep 24 11:05:41 PM UTC 24 |
Sep 24 11:05:51 PM UTC 24 |
734420103 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.1523754831 |
|
|
Sep 24 11:05:42 PM UTC 24 |
Sep 24 11:05:51 PM UTC 24 |
275222006 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.841778462 |
|
|
Sep 24 11:05:36 PM UTC 24 |
Sep 24 11:05:52 PM UTC 24 |
637783944 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.3078916966 |
|
|
Sep 24 11:05:50 PM UTC 24 |
Sep 24 11:05:52 PM UTC 24 |
28112492 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2247986198 |
|
|
Sep 24 11:05:50 PM UTC 24 |
Sep 24 11:05:52 PM UTC 24 |
22043993 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.352195378 |
|
|
Sep 24 11:00:37 PM UTC 24 |
Sep 24 11:05:53 PM UTC 24 |
29985721332 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.423938456 |
|
|
Sep 24 11:05:50 PM UTC 24 |
Sep 24 11:05:55 PM UTC 24 |
62944898 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.3704338539 |
|
|
Sep 24 11:02:44 PM UTC 24 |
Sep 24 11:05:56 PM UTC 24 |
43122621303 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.471810385 |
|
|
Sep 24 11:05:45 PM UTC 24 |
Sep 24 11:05:57 PM UTC 24 |
946136077 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.155993619 |
|
|
Sep 24 11:05:52 PM UTC 24 |
Sep 24 11:05:57 PM UTC 24 |
352171195 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.2913624692 |
|
|
Sep 24 11:05:43 PM UTC 24 |
Sep 24 11:05:58 PM UTC 24 |
268509876 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.3368719383 |
|
|
Sep 24 11:05:41 PM UTC 24 |
Sep 24 11:05:59 PM UTC 24 |
977141519 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.676414984 |
|
|
Sep 24 11:05:05 PM UTC 24 |
Sep 24 11:06:00 PM UTC 24 |
7038920637 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.90354461 |
|
|
Sep 24 11:05:55 PM UTC 24 |
Sep 24 11:06:01 PM UTC 24 |
549417031 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2210481544 |
|
|
Sep 24 11:05:52 PM UTC 24 |
Sep 24 11:06:02 PM UTC 24 |
217113732 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.3239471345 |
|
|
Sep 24 11:05:33 PM UTC 24 |
Sep 24 11:06:03 PM UTC 24 |
470002097 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.3422269873 |
|
|
Sep 24 11:05:52 PM UTC 24 |
Sep 24 11:06:04 PM UTC 24 |
230962588 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.1746400142 |
|
|
Sep 24 11:05:19 PM UTC 24 |
Sep 24 11:06:05 PM UTC 24 |
1354659328 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.3356650892 |
|
|
Sep 24 11:06:03 PM UTC 24 |
Sep 24 11:06:05 PM UTC 24 |
16735163 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1904245870 |
|
|
Sep 24 11:06:05 PM UTC 24 |
Sep 24 11:06:07 PM UTC 24 |
12342308 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1860323210 |
|
|
Sep 24 11:05:58 PM UTC 24 |
Sep 24 11:06:08 PM UTC 24 |
839709211 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.3445082250 |
|
|
Sep 24 11:06:04 PM UTC 24 |
Sep 24 11:06:09 PM UTC 24 |
84752411 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.3395561448 |
|
|
Sep 24 11:05:46 PM UTC 24 |
Sep 24 11:06:12 PM UTC 24 |
1331127581 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.2588286192 |
|
|
Sep 24 11:05:54 PM UTC 24 |
Sep 24 11:06:12 PM UTC 24 |
4589538145 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.1194235385 |
|
|
Sep 24 11:06:08 PM UTC 24 |
Sep 24 11:06:12 PM UTC 24 |
345927512 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.1495079200 |
|
|
Sep 24 11:05:42 PM UTC 24 |
Sep 24 11:06:13 PM UTC 24 |
1402339689 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.569424137 |
|
|
Sep 24 11:06:00 PM UTC 24 |
Sep 24 11:06:14 PM UTC 24 |
2463570134 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.719254274 |
|
|
Sep 24 11:05:52 PM UTC 24 |
Sep 24 11:06:14 PM UTC 24 |
463888630 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.455765732 |
|
|
Sep 24 11:03:09 PM UTC 24 |
Sep 24 11:06:15 PM UTC 24 |
43313154646 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.2371718664 |
|
|
Sep 24 11:04:44 PM UTC 24 |
Sep 24 11:06:16 PM UTC 24 |
2830378461 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.815540641 |
|
|
Sep 24 11:06:13 PM UTC 24 |
Sep 24 11:06:16 PM UTC 24 |
92033774 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.4103320121 |
|
|
Sep 24 11:06:07 PM UTC 24 |
Sep 24 11:06:17 PM UTC 24 |
64642179 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.1080418298 |
|
|
Sep 24 11:06:28 PM UTC 24 |
Sep 24 11:06:31 PM UTC 24 |
16511652 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3068607405 |
|
|
Sep 24 11:05:58 PM UTC 24 |
Sep 24 11:06:18 PM UTC 24 |
3180523635 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.40858083 |
|
|
Sep 24 11:04:41 PM UTC 24 |
Sep 24 11:06:18 PM UTC 24 |
5004899938 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.3810855966 |
|
|
Sep 24 11:06:15 PM UTC 24 |
Sep 24 11:06:18 PM UTC 24 |
50080797 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.461687545 |
|
|
Sep 24 11:05:52 PM UTC 24 |
Sep 24 11:06:18 PM UTC 24 |
577908595 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.3301250536 |
|
|
Sep 24 11:05:54 PM UTC 24 |
Sep 24 11:06:19 PM UTC 24 |
1037168342 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2924709547 |
|
|
Sep 24 11:06:00 PM UTC 24 |
Sep 24 11:06:19 PM UTC 24 |
312638209 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.2400698283 |
|
|
Sep 24 11:04:47 PM UTC 24 |
Sep 24 11:06:20 PM UTC 24 |
4652171681 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.2361505175 |
|
|
Sep 24 11:06:09 PM UTC 24 |
Sep 24 11:06:21 PM UTC 24 |
1989676812 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.3127516468 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:23 PM UTC 24 |
68626879 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.678364976 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:23 PM UTC 24 |
18303863 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.1708806961 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:24 PM UTC 24 |
50463682 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.2161775497 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:24 PM UTC 24 |
60383798 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.1852279401 |
|
|
Sep 24 11:06:09 PM UTC 24 |
Sep 24 11:06:24 PM UTC 24 |
731985657 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.917175341 |
|
|
Sep 24 11:05:39 PM UTC 24 |
Sep 24 11:06:27 PM UTC 24 |
3515821085 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.1119329015 |
|
|
Sep 24 11:06:06 PM UTC 24 |
Sep 24 11:06:29 PM UTC 24 |
318517911 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.1275161399 |
|
|
Sep 24 11:04:13 PM UTC 24 |
Sep 24 11:06:30 PM UTC 24 |
8704205515 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.1663954477 |
|
|
Sep 24 11:06:22 PM UTC 24 |
Sep 24 11:06:31 PM UTC 24 |
327720487 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.4123481531 |
|
|
Sep 24 11:06:17 PM UTC 24 |
Sep 24 11:06:32 PM UTC 24 |
1441179035 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.3875004658 |
|
|
Sep 24 11:06:29 PM UTC 24 |
Sep 24 11:06:32 PM UTC 24 |
137195121 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.959655330 |
|
|
Sep 24 11:06:29 PM UTC 24 |
Sep 24 11:06:33 PM UTC 24 |
18290718 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.3551801744 |
|
|
Sep 24 11:06:23 PM UTC 24 |
Sep 24 11:06:34 PM UTC 24 |
702884331 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.4144530706 |
|
|
Sep 24 11:06:17 PM UTC 24 |
Sep 24 11:06:34 PM UTC 24 |
1138639634 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1342378456 |
|
|
Sep 24 11:06:22 PM UTC 24 |
Sep 24 11:06:34 PM UTC 24 |
4135642371 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.3906993473 |
|
|
Sep 24 11:06:24 PM UTC 24 |
Sep 24 11:06:37 PM UTC 24 |
638814446 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.3924069458 |
|
|
Sep 24 11:06:32 PM UTC 24 |
Sep 24 11:06:38 PM UTC 24 |
243664099 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.967836046 |
|
|
Sep 24 11:06:14 PM UTC 24 |
Sep 24 11:06:39 PM UTC 24 |
734725004 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.3159258803 |
|
|
Sep 24 11:06:21 PM UTC 24 |
Sep 24 11:06:40 PM UTC 24 |
1833146145 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.907794122 |
|
|
Sep 24 11:06:24 PM UTC 24 |
Sep 24 11:06:41 PM UTC 24 |
675415522 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.864174642 |
|
|
Sep 24 11:06:14 PM UTC 24 |
Sep 24 11:06:42 PM UTC 24 |
2047841005 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.383850266 |
|
|
Sep 24 11:06:39 PM UTC 24 |
Sep 24 11:06:42 PM UTC 24 |
24562335 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.4204835154 |
|
|
Sep 24 11:05:21 PM UTC 24 |
Sep 24 11:06:42 PM UTC 24 |
4776004830 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.2294680755 |
|
|
Sep 24 11:06:35 PM UTC 24 |
Sep 24 11:06:43 PM UTC 24 |
1704271830 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.3034705686 |
|
|
Sep 24 11:06:32 PM UTC 24 |
Sep 24 11:06:43 PM UTC 24 |
61389398 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.1302335391 |
|
|
Sep 24 11:06:17 PM UTC 24 |
Sep 24 11:06:43 PM UTC 24 |
1543646869 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.1674571105 |
|
|
Sep 24 11:05:58 PM UTC 24 |
Sep 24 11:06:43 PM UTC 24 |
2556547684 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.3546887656 |
|
|
Sep 24 11:05:24 PM UTC 24 |
Sep 24 11:06:43 PM UTC 24 |
3629423881 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.451216245 |
|
|
Sep 24 11:06:42 PM UTC 24 |
Sep 24 11:06:44 PM UTC 24 |
36180207 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.2363512424 |
|
|
Sep 24 11:06:41 PM UTC 24 |
Sep 24 11:06:47 PM UTC 24 |
433107637 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1069220098 |
|
|
Sep 24 11:06:43 PM UTC 24 |
Sep 24 11:06:48 PM UTC 24 |
218571651 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.2998219653 |
|
|
Sep 24 11:06:33 PM UTC 24 |
Sep 24 11:06:48 PM UTC 24 |
280634481 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.4290709867 |
|
|
Sep 24 11:06:36 PM UTC 24 |
Sep 24 11:06:49 PM UTC 24 |
458896068 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.3787753449 |
|
|
Sep 24 11:03:30 PM UTC 24 |
Sep 24 11:06:50 PM UTC 24 |
22240420075 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3688558728 |
|
|
Sep 24 11:06:50 PM UTC 24 |
Sep 24 11:06:53 PM UTC 24 |
22938873 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.4190628738 |
|
|
Sep 24 11:06:51 PM UTC 24 |
Sep 24 11:06:54 PM UTC 24 |
14630218 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.1287204267 |
|
|
Sep 24 11:06:35 PM UTC 24 |
Sep 24 11:06:54 PM UTC 24 |
1913937158 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3508334396 |
|
|
Sep 24 11:06:20 PM UTC 24 |
Sep 24 11:06:54 PM UTC 24 |
228439275 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.1247318412 |
|
|
Sep 24 11:06:50 PM UTC 24 |
Sep 24 11:06:55 PM UTC 24 |
313959271 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.2694993718 |
|
|
Sep 24 11:06:45 PM UTC 24 |
Sep 24 11:06:55 PM UTC 24 |
566560908 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.760004368 |
|
|
Sep 24 11:06:33 PM UTC 24 |
Sep 24 11:06:55 PM UTC 24 |
3332878687 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.297423542 |
|
|
Sep 24 11:06:43 PM UTC 24 |
Sep 24 11:06:57 PM UTC 24 |
505709988 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1146925102 |
|
|
Sep 24 11:06:45 PM UTC 24 |
Sep 24 11:06:58 PM UTC 24 |
186129190 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.3461536731 |
|
|
Sep 24 11:06:45 PM UTC 24 |
Sep 24 11:06:58 PM UTC 24 |
1046686510 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.1951871431 |
|
|
Sep 24 11:06:35 PM UTC 24 |
Sep 24 11:06:59 PM UTC 24 |
1075359762 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.1716817016 |
|
|
Sep 24 11:06:31 PM UTC 24 |
Sep 24 11:07:00 PM UTC 24 |
175028153 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.1425317798 |
|
|
Sep 24 11:06:45 PM UTC 24 |
Sep 24 11:07:00 PM UTC 24 |
3554763392 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.4010212969 |
|
|
Sep 24 11:06:55 PM UTC 24 |
Sep 24 11:07:00 PM UTC 24 |
346383096 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.2251877326 |
|
|
Sep 24 11:07:01 PM UTC 24 |
Sep 24 11:07:03 PM UTC 24 |
47553379 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1650869065 |
|
|
Sep 24 11:07:01 PM UTC 24 |
Sep 24 11:07:03 PM UTC 24 |
21282162 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.2426932484 |
|
|
Sep 24 11:06:15 PM UTC 24 |
Sep 24 11:07:04 PM UTC 24 |
5477795249 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.2714094537 |
|
|
Sep 24 11:07:01 PM UTC 24 |
Sep 24 11:07:05 PM UTC 24 |
52129425 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3517119347 |
|
|
Sep 24 11:06:55 PM UTC 24 |
Sep 24 11:07:06 PM UTC 24 |
266649418 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.109365068 |
|
|
Sep 24 11:07:04 PM UTC 24 |
Sep 24 11:07:08 PM UTC 24 |
35672648 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.3594381351 |
|
|
Sep 24 11:06:57 PM UTC 24 |
Sep 24 11:07:09 PM UTC 24 |
485554923 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.572128460 |
|
|
Sep 24 11:06:43 PM UTC 24 |
Sep 24 11:07:10 PM UTC 24 |
562320214 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.1773215194 |
|
|
Sep 24 11:05:47 PM UTC 24 |
Sep 24 11:07:31 PM UTC 24 |
4157377211 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.3386378632 |
|
|
Sep 24 11:06:57 PM UTC 24 |
Sep 24 11:07:10 PM UTC 24 |
518582052 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.223043345 |
|
|
Sep 24 11:06:57 PM UTC 24 |
Sep 24 11:07:12 PM UTC 24 |
368812418 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.4179396526 |
|
|
Sep 24 11:06:43 PM UTC 24 |
Sep 24 11:07:14 PM UTC 24 |
1884344226 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.394650116 |
|
|
Sep 24 11:06:58 PM UTC 24 |
Sep 24 11:07:14 PM UTC 24 |
982814718 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.2489364093 |
|
|
Sep 24 11:07:04 PM UTC 24 |
Sep 24 11:07:14 PM UTC 24 |
190680262 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.1057021895 |
|
|
Sep 24 11:06:58 PM UTC 24 |
Sep 24 11:07:15 PM UTC 24 |
1091856839 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.2084585776 |
|
|
Sep 24 11:05:48 PM UTC 24 |
Sep 24 11:07:16 PM UTC 24 |
2937713310 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2080239828 |
|
|
Sep 24 11:07:07 PM UTC 24 |
Sep 24 11:07:16 PM UTC 24 |
543716153 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1943839000 |
|
|
Sep 24 11:07:13 PM UTC 24 |
Sep 24 11:07:16 PM UTC 24 |
253962599 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3718106845 |
|
|
Sep 24 11:07:14 PM UTC 24 |
Sep 24 11:07:17 PM UTC 24 |
21679742 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.2141547767 |
|
|
Sep 24 11:06:56 PM UTC 24 |
Sep 24 11:07:17 PM UTC 24 |
1221083159 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.1062349964 |
|
|
Sep 24 11:07:14 PM UTC 24 |
Sep 24 11:07:19 PM UTC 24 |
30330262 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.3771309545 |
|
|
Sep 24 11:05:27 PM UTC 24 |
Sep 24 11:07:20 PM UTC 24 |
6830859718 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1227558119 |
|
|
Sep 24 11:06:45 PM UTC 24 |
Sep 24 11:07:22 PM UTC 24 |
1817188148 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.2712431018 |
|
|
Sep 24 11:07:17 PM UTC 24 |
Sep 24 11:07:22 PM UTC 24 |
861125296 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.3282245566 |
|
|
Sep 24 11:07:06 PM UTC 24 |
Sep 24 11:07:22 PM UTC 24 |
1302614515 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.1147536018 |
|
|
Sep 24 11:07:09 PM UTC 24 |
Sep 24 11:07:23 PM UTC 24 |
1124732985 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.3581944068 |
|
|
Sep 24 11:07:10 PM UTC 24 |
Sep 24 11:07:26 PM UTC 24 |
781261671 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2450763177 |
|
|
Sep 24 11:07:24 PM UTC 24 |
Sep 24 11:07:26 PM UTC 24 |
38169040 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.2726280402 |
|
|
Sep 24 11:07:10 PM UTC 24 |
Sep 24 11:07:26 PM UTC 24 |
289622053 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.2319374846 |
|
|
Sep 24 11:07:24 PM UTC 24 |
Sep 24 11:07:26 PM UTC 24 |
15539650 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2840071672 |
|
|
Sep 24 11:06:54 PM UTC 24 |
Sep 24 11:07:27 PM UTC 24 |
1050336965 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.2977670027 |
|
|
Sep 24 11:05:54 PM UTC 24 |
Sep 24 11:07:27 PM UTC 24 |
11718057587 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.1211884389 |
|
|
Sep 24 11:07:16 PM UTC 24 |
Sep 24 11:07:28 PM UTC 24 |
73608705 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.406803464 |
|
|
Sep 24 11:04:32 PM UTC 24 |
Sep 24 11:07:28 PM UTC 24 |
3660231402 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.1243094752 |
|
|
Sep 24 11:07:24 PM UTC 24 |
Sep 24 11:07:29 PM UTC 24 |
168651443 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.2484670425 |
|
|
Sep 24 11:07:17 PM UTC 24 |
Sep 24 11:07:29 PM UTC 24 |
287296116 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.1616758229 |
|
|
Sep 24 11:07:17 PM UTC 24 |
Sep 24 11:07:29 PM UTC 24 |
347646074 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.3335470314 |
|
|
Sep 24 11:07:06 PM UTC 24 |
Sep 24 11:07:29 PM UTC 24 |
567216465 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.3338671286 |
|
|
Sep 24 11:07:20 PM UTC 24 |
Sep 24 11:07:31 PM UTC 24 |
327247457 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.600191292 |
|
|
Sep 24 11:07:27 PM UTC 24 |
Sep 24 11:07:32 PM UTC 24 |
385318515 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.1538692050 |
|
|
Sep 24 11:07:21 PM UTC 24 |
Sep 24 11:07:32 PM UTC 24 |
228499269 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.1809860281 |
|
|
Sep 24 11:07:31 PM UTC 24 |
Sep 24 11:07:34 PM UTC 24 |
78825723 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.2187871313 |
|
|
Sep 24 11:05:11 PM UTC 24 |
Sep 24 11:07:34 PM UTC 24 |
13284327258 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.3147375699 |
|
|
Sep 24 11:07:33 PM UTC 24 |
Sep 24 11:07:35 PM UTC 24 |
12756914 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.3720908138 |
|
|
Sep 24 11:07:17 PM UTC 24 |
Sep 24 11:07:36 PM UTC 24 |
1071202811 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.2102071290 |
|
|
Sep 24 11:07:33 PM UTC 24 |
Sep 24 11:07:36 PM UTC 24 |
20904477 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.1341797344 |
|
|
Sep 24 11:07:29 PM UTC 24 |
Sep 24 11:07:37 PM UTC 24 |
433504997 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1112073056 |
|
|
Sep 24 11:07:27 PM UTC 24 |
Sep 24 11:07:37 PM UTC 24 |
166986687 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2241362851 |
|
|
Sep 24 11:07:02 PM UTC 24 |
Sep 24 11:07:38 PM UTC 24 |
889092076 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.872844753 |
|
|
Sep 24 11:07:35 PM UTC 24 |
Sep 24 11:07:39 PM UTC 24 |
23505535 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.2028999497 |
|
|
Sep 24 11:07:19 PM UTC 24 |
Sep 24 11:07:39 PM UTC 24 |
1893718340 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.4287645236 |
|
|
Sep 24 11:07:33 PM UTC 24 |
Sep 24 11:07:42 PM UTC 24 |
57872347 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.3071211758 |
|
|
Sep 24 11:07:41 PM UTC 24 |
Sep 24 11:07:43 PM UTC 24 |
30836609 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.627598067 |
|
|
Sep 24 11:07:29 PM UTC 24 |
Sep 24 11:07:45 PM UTC 24 |
2099328880 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.1173008341 |
|
|
Sep 24 11:07:31 PM UTC 24 |
Sep 24 11:07:46 PM UTC 24 |
402881439 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.539562369 |
|
|
Sep 24 11:07:27 PM UTC 24 |
Sep 24 11:07:46 PM UTC 24 |
294345129 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.4128897387 |
|
|
Sep 24 11:07:36 PM UTC 24 |
Sep 24 11:07:46 PM UTC 24 |
284603789 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2032181249 |
|
|
Sep 24 11:07:44 PM UTC 24 |
Sep 24 11:07:46 PM UTC 24 |
45735435 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.3459089473 |
|
|
Sep 24 11:07:43 PM UTC 24 |
Sep 24 11:07:47 PM UTC 24 |
237432049 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.3444910004 |
|
|
Sep 24 11:07:36 PM UTC 24 |
Sep 24 11:07:48 PM UTC 24 |
935335035 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.2079336952 |
|
|
Sep 24 11:07:31 PM UTC 24 |
Sep 24 11:07:48 PM UTC 24 |
2076985228 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.2231173790 |
|
|
Sep 24 11:07:37 PM UTC 24 |
Sep 24 11:07:48 PM UTC 24 |
1219914325 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all_with_rand_reset.368395555 |
|
|
Sep 24 11:06:59 PM UTC 24 |
Sep 24 11:07:48 PM UTC 24 |
8488999861 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.1782017165 |
|
|
Sep 24 11:07:38 PM UTC 24 |
Sep 24 11:07:50 PM UTC 24 |
297261676 ps |