ac0bef2ce| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | otbn_smoke | 8.000s | 78.363us | 1 | 1 | 100.00 |
| V1 | single_binary | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V1 | csr_hw_reset | otbn_csr_hw_reset | 7.000s | 26.523us | 5 | 5 | 100.00 |
| V1 | csr_rw | otbn_csr_rw | 7.000s | 25.273us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | otbn_csr_bit_bash | 10.000s | 136.319us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | otbn_csr_aliasing | 6.000s | 14.876us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 10.000s | 85.979us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 7.000s | 25.273us | 20 | 20 | 100.00 |
| otbn_csr_aliasing | 6.000s | 14.876us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | otbn_mem_walk | 31.000s | 1.468ms | 5 | 5 | 100.00 |
| V1 | mem_partial_access | otbn_mem_partial_access | 15.000s | 339.719us | 5 | 5 | 100.00 |
| V1 | TOTAL | 160 | 166 | 96.39 | |||
| V2 | reset_recovery | otbn_reset | 1.150m | 554.150us | 10 | 10 | 100.00 |
| V2 | multi_error | otbn_multi_err | 41.000s | 1.152ms | 1 | 1 | 100.00 |
| V2 | back_to_back | otbn_multi | 1.283m | 633.885us | 9 | 10 | 90.00 |
| V2 | stress_all | otbn_stress_all | 1.483m | 898.338us | 7 | 10 | 70.00 |
| V2 | lc_escalation | otbn_escalate | 26.000s | 194.579us | 43 | 60 | 71.67 |
| V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 6.000s | 115.755us | 3 | 5 | 60.00 |
| V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 21.000s | 56.658us | 8 | 10 | 80.00 |
| V2 | alert_test | otbn_alert_test | 8.000s | 28.656us | 50 | 50 | 100.00 |
| V2 | intr_test | otbn_intr_test | 8.000s | 35.031us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | otbn_tl_errors | 10.000s | 145.128us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | otbn_tl_errors | 10.000s | 145.128us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 7.000s | 26.523us | 5 | 5 | 100.00 |
| otbn_csr_rw | 7.000s | 25.273us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 6.000s | 14.876us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 8.000s | 29.378us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | otbn_csr_hw_reset | 7.000s | 26.523us | 5 | 5 | 100.00 |
| otbn_csr_rw | 7.000s | 25.273us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 6.000s | 14.876us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 8.000s | 29.378us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 221 | 246 | 89.84 | |||
| V2S | mem_integrity | otbn_imem_err | 9.000s | 68.986us | 10 | 10 | 100.00 |
| otbn_dmem_err | 10.000s | 29.283us | 13 | 15 | 86.67 | ||
| V2S | internal_integrity | otbn_alu_bignum_mod_err | 9.000s | 16.164us | 5 | 5 | 100.00 |
| otbn_controller_ispr_rdata_err | 9.000s | 30.105us | 4 | 5 | 80.00 | ||
| otbn_mac_bignum_acc_err | 10.000s | 30.609us | 4 | 5 | 80.00 | ||
| otbn_urnd_err | 8.000s | 24.436us | 1 | 2 | 50.00 | ||
| V2S | illegal_bus_access | otbn_illegal_mem_acc | 8.000s | 36.714us | 5 | 5 | 100.00 |
| V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 7.000s | 38.415us | 2 | 2 | 100.00 |
| V2S | tl_intg_err | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| otbn_tl_intg_err | 1.183m | 546.148us | 20 | 20 | 100.00 | ||
| V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 39.000s | 239.324us | 20 | 20 | 100.00 |
| V2S | prim_fsm_check | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | prim_count_check | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_mem_scramble | otbn_smoke | 8.000s | 78.363us | 1 | 1 | 100.00 |
| V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 10.000s | 29.283us | 13 | 15 | 86.67 |
| V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 9.000s | 68.986us | 10 | 10 | 100.00 |
| V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 1.183m | 546.148us | 20 | 20 | 100.00 |
| V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 26.000s | 194.579us | 43 | 60 | 71.67 |
| V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 9.000s | 68.986us | 10 | 10 | 100.00 |
| otbn_dmem_err | 10.000s | 29.283us | 13 | 15 | 86.67 | ||
| otbn_zero_state_err_urnd | 6.000s | 115.755us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 8.000s | 36.714us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 | ||
| V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_scramble_key_sideload | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 9.000s | 68.986us | 10 | 10 | 100.00 |
| otbn_dmem_err | 10.000s | 29.283us | 13 | 15 | 86.67 | ||
| otbn_zero_state_err_urnd | 6.000s | 115.755us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 8.000s | 36.714us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 | ||
| V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 26.000s | 194.579us | 43 | 60 | 71.67 |
| V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 9.000s | 68.986us | 10 | 10 | 100.00 |
| otbn_dmem_err | 10.000s | 29.283us | 13 | 15 | 86.67 | ||
| otbn_zero_state_err_urnd | 6.000s | 115.755us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 8.000s | 36.714us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 | ||
| V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_data_reg_sw_sca | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 10.000s | 27.846us | 11 | 12 | 91.67 |
| V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 7.000s | 13.417us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 43.000s | 407.061us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 43.000s | 407.061us | 5 | 5 | 100.00 |
| V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 10.000s | 68.022us | 7 | 10 | 70.00 |
| V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 8.000s | 115.307us | 10 | 10 | 100.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 2.100m | 10.004ms | 4 | 5 | 80.00 |
| V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 2.100m | 10.004ms | 4 | 5 | 80.00 |
| V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 8.000s | 14.174us | 6 | 7 | 85.71 |
| V2S | sec_cm_data_mem_sec_wipe | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_write_mem_integrity | otbn_multi | 1.283m | 633.885us | 9 | 10 | 90.00 |
| V2S | sec_cm_ctrl_flow_count | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_ctrl_flow_sca | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 41.000s | 139.876us | 5 | 5 | 100.00 |
| V2S | sec_cm_key_sideload | otbn_single | 46.000s | 198.491us | 94 | 100 | 94.00 |
| V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 6.117m | 3.844ms | 5 | 5 | 100.00 |
| V2S | TOTAL | 142 | 153 | 92.81 | |||
| V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 10.150m | 42.858ms | 6 | 10 | 60.00 |
| V3 | TOTAL | 6 | 10 | 60.00 | |||
| TOTAL | 529 | 575 | 92.00 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 9 | 9 | 8 | 88.89 |
| V2 | 11 | 11 | 6 | 54.55 |
| V2S | 19 | 19 | 11 | 57.89 |
| V3 | 1 | 1 | 0 | 0.00 |
| Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
|---|---|---|---|---|---|---|---|---|
| 98.73 | 99.50 | 94.11 | 99.61 | 91.05 | 93.11 | 97.44 | 91.05 | 99.16 |
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed has 8 failures:
Test otbn_rf_base_intg_err has 2 failures.
3.otbn_rf_base_intg_err.2572353148
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 52905488 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 52905488 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 52905488 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 52905488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.otbn_rf_base_intg_err.3573742727
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 28939824 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 28939824 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 28939824 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 28939824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 6 failures.
13.otbn_escalate.3552420378
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/13.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 2890986 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 2890986 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 2890986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
23.otbn_escalate.1556708648
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/23.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 5730794 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 5730794 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 5730794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed has 5 failures:
Test otbn_rf_base_intg_err has 1 failures.
2.otbn_rf_base_intg_err.1604900215
Line 248, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 63641759 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 63641759 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 63641759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 4 failures.
4.otbn_escalate.107743161
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 2014817 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 2014817 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 2014817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.otbn_escalate.370895136
Line 260, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 3345152 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 3345152 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 3345152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 3 failures:
Test otbn_stress_all has 1 failures.
1.otbn_stress_all.4053539204
Line 277, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stress_all/latest/run.log
UVM_FATAL @ 28302226 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 28302226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 2 failures.
58.otbn_single.376398959
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/58.otbn_single/latest/run.log
UVM_FATAL @ 10842029 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 10842029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
91.otbn_single.3463203474
Line 239, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/91.otbn_single/latest/run.log
UVM_FATAL @ 11200671 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11200671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:
Test otbn_stress_all has 1 failures.
7.otbn_stress_all.492960776
Line 278, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_stress_all/latest/run.log
UVM_FATAL @ 146893500 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 146893500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 2 failures.
42.otbn_single.2510354528
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/42.otbn_single/latest/run.log
UVM_FATAL @ 4869592 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 4869592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
95.otbn_single.861714266
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/95.otbn_single/latest/run.log
UVM_FATAL @ 23711064 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 23711064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:
Test otbn_stress_all_with_rand_reset has 1 failures.
8.otbn_stress_all_with_rand_reset.3526547324
Line 279, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 15022723 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 15022723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 2 failures.
25.otbn_single.3960959370
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/25.otbn_single/latest/run.log
UVM_FATAL @ 12544446 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 12544446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
28.otbn_single.132613627
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/28.otbn_single/latest/run.log
UVM_FATAL @ 36377011 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 36377011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 2 failures:
2.otbn_zero_state_err_urnd.4138795784
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_zero_state_err_urnd/latest/run.log
UVM_FATAL @ 12085629 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 12085629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.otbn_zero_state_err_urnd.2994210926
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_zero_state_err_urnd/latest/run.log
UVM_FATAL @ 11457628 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11457628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 2 failures:
Test otbn_stress_all has 1 failures.
3.otbn_stress_all.1285530883
Line 278, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all/latest/run.log
UVM_FATAL @ 27352226 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 27352226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stress_all_with_rand_reset has 1 failures.
7.otbn_stress_all_with_rand_reset.399346665
Line 295, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 202750740 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 202750740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed has 2 failures:
Test otbn_ctrl_redun has 1 failures.
7.otbn_ctrl_redun.3671255190
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_ctrl_redun/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 9054834 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 9054834 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 9054834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 1 failures.
12.otbn_escalate.1470405612
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/12.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 14576070 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 14576070 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 14576070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 2 failures:
9.otbn_dmem_err.3233321673
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_dmem_err/latest/run.log
UVM_FATAL @ 9360576 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 9360576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
10.otbn_dmem_err.3700487926
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/10.otbn_dmem_err/latest/run.log
UVM_FATAL @ 10632131 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 10632131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == *) Failed to update CRC has 2 failures:
39.otbn_escalate.1839804281
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/39.otbn_escalate/latest/run.log
UVM_FATAL @ 3053329 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
UVM_INFO @ 3053329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
43.otbn_escalate.4105541554
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/43.otbn_escalate/latest/run.log
UVM_FATAL @ 2547315 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
UVM_INFO @ 2547315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 1 failures:
0.otbn_sw_errs_fatal_chk.872703232
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest/run.log
UVM_FATAL @ 24619285 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 24619285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_urnd_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
0.otbn_urnd_err.501778029
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_urnd_err/latest/run.log
UVM_FATAL @ 14209684 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_urnd_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 14209684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:717) [otbn_common_vseq] Check failed has_outstanding_access() == * (* [*] vs * [*]) No CSR outstanding items after reset! has 1 failures:
1.otbn_stress_all_with_rand_reset.2629508696
Line 329, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 2046579817 ps: (cip_base_vseq.sv:717) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed has_outstanding_access() == 0 (1 [0x1] vs 0 [0x0]) No CSR outstanding items after reset!
UVM_INFO @ 2046579817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
2.otbn_controller_ispr_rdata_err.3910123193
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_controller_ispr_rdata_err/latest/run.log
UVM_FATAL @ 13183087 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 13183087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_mac_bignum_acc_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
2.otbn_mac_bignum_acc_err.2436352706
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_mac_bignum_acc_err/latest/run.log
UVM_FATAL @ 10824701 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_mac_bignum_acc_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 10824701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_sec_wipe_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
2.otbn_sec_wipe_err.4121009280
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_sec_wipe_err/latest/run.log
UVM_FATAL @ 12983436 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_sec_wipe_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 12983436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. has 1 failures:
3.otbn_escalate.2901452483
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_escalate/latest/run.log
UVM_FATAL @ 7824460 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 7824460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
3.otbn_stress_all_with_rand_reset.2941336654
Line 282, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 565285542 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 565285542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 1 failures:
3.otbn_sw_errs_fatal_chk.1740542465
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_sw_errs_fatal_chk/latest/run.log
UVM_FATAL @ 56657804 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 56657804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_stack_addr_integ_chk_vseq.sv:72) [otbn_stack_addr_integ_chk_vseq] timeout occurred! has 1 failures:
3.otbn_stack_addr_integ_chk.733059923
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stack_addr_integ_chk/latest/run.log
UVM_FATAL @ 10004402935 ps: (otbn_stack_addr_integ_chk_vseq.sv:72) [uvm_test_top.env.virtual_sequencer.otbn_stack_addr_integ_chk_vseq] timeout occurred!
UVM_INFO @ 10004402935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
4.otbn_multi.1320556808
Line 284, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_multi/latest/run.log
UVM_FATAL @ 485998125 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 485998125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
8.otbn_escalate.938023961
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_escalate/latest/run.log
UVM_FATAL @ 8889887 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 8889887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
28.otbn_escalate.1014094432
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/28.otbn_escalate/latest/run.log
UVM_FATAL @ 25348597 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 25348597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
38.otbn_escalate.846476669
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/38.otbn_escalate/latest/run.log
UVM_FATAL @ 61351297 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 61351297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---