Unified Coverage Report :: Module :: otp_ctrl_kdi

Module : otp_ctrl_kdi

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_otp_ctrl_kdi	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_otp_ctrl_kdi

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00	0.00	0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
7.86	0.00	0.00	31.46		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_flash_addr_key_anchor	0.00	0.00
u_flash_data_key_anchor	0.00	0.00
u_key_out_anchor	0.00	0.00				0.00
u_prim_count_entropy	0.00			0.00
u_prim_count_seed	0.00			0.00
u_req_arb	0.00	0.00	0.00			0.00
u_sram_data_key_anchor	0.00	0.00
u_state_regs	0.00	0.00				0.00

Line Coverage for Module : otp_ctrl_kdi

	Line No.	Total	Covered	Percent
TOTAL		142	0	0.00
CONT_ASSIGN	113	1	0	0.00
CONT_ASSIGN	114	1	0	0.00
CONT_ASSIGN	115	1	0	0.00
CONT_ASSIGN	117	1	0	0.00
CONT_ASSIGN	118	1	0	0.00
CONT_ASSIGN	119	1	0	0.00
CONT_ASSIGN	148	1	0	0.00
CONT_ASSIGN	156	1	0	0.00
CONT_ASSIGN	164	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	257	9	0	0.00
CONT_ASSIGN	282	1	0	0.00
CONT_ASSIGN	283	1	0	0.00
CONT_ASSIGN	284	1	0	0.00
CONT_ASSIGN	286	1	0	0.00
CONT_ASSIGN	287	1	0	0.00
CONT_ASSIGN	288	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	303	1	0	0.00
CONT_ASSIGN	352	1	0	0.00
ALWAYS	355	88	0	0.00
ALWAYS	571	3	0	0.00
ALWAYS	574	7	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
113	0	1
114	0	1
115	0	1
117	0	1
118	0	1
119	0	1
148	0	1
156	0	1
164	0	1
175	0	3
176	0	3
177	0	3
257	0	1
258	0	1
259	0	1
260	0	1
261	0	1
			==> MISSING_ELSE
263	0	1
264	0	1
			==> MISSING_ELSE
266	0	1
267	0	1
			==> MISSING_ELSE
282	0	1
283	0	1
284	0	1
286	0	1
287	0	1
288	0	1
291	0	3
292	0	3
293	0	3
303	0	1
352	0	1
355	0	1
358	0	1
361	0	1
362	0	1
363	0	1
364	0	1
371	0	1
374	0	1
375	0	1
376	0	1
377	0	1
380	0	1
381	0	1
382	0	1
383	0	1
385	0	1
388	0	1
390	0	1
394	0	1
395	0	1
			==> MISSING_ELSE
401	0	1
402	0	1
403	0	1
404	0	1
			==> MISSING_ELSE
410	0	1
411	0	1
413	0	1
414	0	1
415	0	1
			==> MISSING_ELSE
421	0	1
422	0	1
424	0	1
425	0	1
426	0	1
428	0	1
429	0	1
432	0	1
			==> MISSING_ELSE
436	0	1
437	0	1
			==> MISSING_ELSE
443	0	1
444	0	1
445	0	1
446	0	1
448	0	1
449	0	1
450	0	1
453	0	1
			==> MISSING_ELSE
460	0	1
461	0	1
462	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
			==> MISSING_ELSE
472	0	1
473	0	1
			==> MISSING_ELSE
479	0	1
480	0	1
481	0	1
482	0	1
483	0	1
			==> MISSING_ELSE
491	0	1
492	0	1
493	0	1
495	0	1
496	0	1
499	0	1
500	0	1
503	0	1
507	0	1
509	0	1
511	0	1
512	0	1
515	0	1
			==> MISSING_ELSE
524	0	1
525	0	1
526	0	1
528	0	1
529	0	1
530	0	1
533	0	1
			==> MISSING_ELSE
540	0	1
541	0	1
546	0	1
560	0	1
562	0	1
563	0	1
			==> MISSING_ELSE
571	0	3
574	0	1
575	0	1
576	0	1
577	0	1
579	0	1
580	0	1
581	0	1

---

Cond Coverage for Module : otp_ctrl_kdi

	Total	Covered	Percent
Conditions	18	0	0.00
Logical	18	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       303
 EXPRESSION ((data_sel == EntropyData) ? nonce_out_q[entropy_cnt[0]] : (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0))
             ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       303
 SUB-EXPRESSION (data_sel == EntropyData)
                ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       303
 SUB-EXPRESSION (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0)
                 ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       371
 EXPRESSION (edn_req_q & ((~edn_ack_i)))
             ----1----   -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       414
 EXPRESSION (scrmbl_mtx_gnt_i && scrmbl_ready_i)
             --------1-------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       448
 EXPRESSION (entropy_cnt == 2'b1)
            ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       495
 EXPRESSION (seed_cnt == 2'b1)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       528
 EXPRESSION (entropy_cnt == req_bundle.nonce_size)
            -------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

FSM Coverage for Module : otp_ctrl_kdi

Summary for FSM :: state_q

	Total	Covered	Percent
States	11	0	0.00	(Not included in score)
Transitions	24	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
DigClrSt	402	Not Covered
DigEntropySt	449	Not Covered
DigFinSt	432	Not Covered
DigLoadSt	415	Not Covered
DigWaitSt	483	Not Covered
ErrorSt	562	Not Covered
FetchEntropySt	429	Not Covered
FetchNonceSt	512	Not Covered
FinishSt	515	Not Covered
IdleSt	395	Not Covered
ResetSt	393	Not Covered

transitions	Line No.	Covered	Tests
DigClrSt->DigLoadSt	415	Not Covered
DigClrSt->ErrorSt	562	Not Covered
DigEntropySt->DigFinSt	468	Not Covered
DigEntropySt->ErrorSt	562	Not Covered
DigFinSt->DigWaitSt	483	Not Covered
DigFinSt->ErrorSt	562	Not Covered
DigLoadSt->DigFinSt	432	Not Covered
DigLoadSt->ErrorSt	562	Not Covered
DigLoadSt->FetchEntropySt	429	Not Covered
DigWaitSt->DigClrSt	503	Not Covered
DigWaitSt->DigLoadSt	500	Not Covered
DigWaitSt->ErrorSt	562	Not Covered
DigWaitSt->FetchNonceSt	512	Not Covered
DigWaitSt->FinishSt	515	Not Covered
FetchEntropySt->DigEntropySt	449	Not Covered
FetchEntropySt->ErrorSt	562	Not Covered
FetchNonceSt->ErrorSt	562	Not Covered
FetchNonceSt->FinishSt	529	Not Covered
FinishSt->ErrorSt	562	Not Covered
FinishSt->IdleSt	540	Not Covered
IdleSt->DigClrSt	402	Not Covered
IdleSt->ErrorSt	562	Not Covered
ResetSt->ErrorSt	562	Not Covered
ResetSt->IdleSt	395	Not Covered

---

Branch Coverage for Module : otp_ctrl_kdi

	Line No.	Total	Covered	Percent
Branches		46	0	0.00
TERNARY	303	3	0	0.00
IF	260	2	0	0.00
IF	263	2	0	0.00
IF	266	2	0	0.00
CASE	390	31	0	0.00
IF	560	2	0	0.00
IF	571	2	0	0.00
IF	574	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	303	((data_sel == EntropyData)) ? 
-2-:	303	(req_bundle.seed_valid) ? 

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	260	if (key_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	263	if (nonce_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	266	if (seed_valid_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	390	case (state_q)
-2-:	394	if (kdi_en_i)
-3-:	401	if (req_valid)
-4-:	414	if ((scrmbl_mtx_gnt_i && scrmbl_ready_i))
-5-:	424	if (seed_cnt[0])
-6-:	426	if (scrmbl_ready_i)
-7-:	428	if (req_bundle.ingest_entropy)
-8-:	436	if (scrmbl_ready_i)
-9-:	445	if (edn_ack_i)
-10-:	448	if ((entropy_cnt == 2'b1))
-11-:	465	if (entropy_cnt[0])
-12-:	467	if (scrmbl_ready_i)
-13-:	472	if (scrmbl_ready_i)
-14-:	482	if (scrmbl_ready_i)
-15-:	492	if (scrmbl_valid_i)
-16-:	495	if ((seed_cnt == 2'b1))
-17-:	499	if (req_bundle.chained_digest)
-18-:	511	if (req_bundle.fetch_nonce)
-19-:	525	if (edn_ack_i)
-20-:	528	if ((entropy_cnt == req_bundle.nonce_size))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	Status	Tests
ResetSt	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ResetSt	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	1	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	0	-	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	1	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	0	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	1	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	0	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
FinishSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ErrorSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	560	if (((lc_ctrl_pkg::lc_tx_test_true_loose(escalate_en_i) || seed_cnt_err) || entropy_cnt_err))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	571	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	574	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

Line Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Line No.	Total	Covered	Percent
TOTAL		142	0	0.00
CONT_ASSIGN	113	1	0	0.00
CONT_ASSIGN	114	1	0	0.00
CONT_ASSIGN	115	1	0	0.00
CONT_ASSIGN	117	1	0	0.00
CONT_ASSIGN	118	1	0	0.00
CONT_ASSIGN	119	1	0	0.00
CONT_ASSIGN	148	1	0	0.00
CONT_ASSIGN	156	1	0	0.00
CONT_ASSIGN	164	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	257	9	0	0.00
CONT_ASSIGN	282	1	0	0.00
CONT_ASSIGN	283	1	0	0.00
CONT_ASSIGN	284	1	0	0.00
CONT_ASSIGN	286	1	0	0.00
CONT_ASSIGN	287	1	0	0.00
CONT_ASSIGN	288	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	291	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	292	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	303	1	0	0.00
CONT_ASSIGN	352	1	0	0.00
ALWAYS	355	88	0	0.00
ALWAYS	571	3	0	0.00
ALWAYS	574	7	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
113	0	1
114	0	1
115	0	1
117	0	1
118	0	1
119	0	1
148	0	1
156	0	1
164	0	1
175	0	3
176	0	3
177	0	3
257	0	1
258	0	1
259	0	1
260	0	1
261	0	1
			==> MISSING_ELSE
263	0	1
264	0	1
			==> MISSING_ELSE
266	0	1
267	0	1
			==> MISSING_ELSE
282	0	1
283	0	1
284	0	1
286	0	1
287	0	1
288	0	1
291	0	3
292	0	3
293	0	3
303	0	1
352	0	1
355	0	1
358	0	1
361	0	1
362	0	1
363	0	1
364	0	1
371	0	1
374	0	1
375	0	1
376	0	1
377	0	1
380	0	1
381	0	1
382	0	1
383	0	1
385	0	1
388	0	1
390	0	1
394	0	1
395	0	1
			==> MISSING_ELSE
401	0	1
402	0	1
403	0	1
404	0	1
			==> MISSING_ELSE
410	0	1
411	0	1
413	0	1
414	0	1
415	0	1
			==> MISSING_ELSE
421	0	1
422	0	1
424	0	1
425	0	1
426	0	1
428	0	1
429	0	1
432	0	1
			==> MISSING_ELSE
436	0	1
437	0	1
			==> MISSING_ELSE
443	0	1
444	0	1
445	0	1
446	0	1
448	0	1
449	0	1
450	0	1
453	0	1
			==> MISSING_ELSE
460	0	1
461	0	1
462	0	1
465	0	1
466	0	1
467	0	1
468	0	1
469	0	1
			==> MISSING_ELSE
472	0	1
473	0	1
			==> MISSING_ELSE
479	0	1
480	0	1
481	0	1
482	0	1
483	0	1
			==> MISSING_ELSE
491	0	1
492	0	1
493	0	1
495	0	1
496	0	1
499	0	1
500	0	1
503	0	1
507	0	1
509	0	1
511	0	1
512	0	1
515	0	1
			==> MISSING_ELSE
524	0	1
525	0	1
526	0	1
528	0	1
529	0	1
530	0	1
533	0	1
			==> MISSING_ELSE
540	0	1
541	0	1
546	0	1
560	0	1
562	0	1
563	0	1
			==> MISSING_ELSE
571	0	3
574	0	1
575	0	1
576	0	1
577	0	1
579	0	1
580	0	1
581	0	1

---

Cond Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Total	Covered	Percent
Conditions	18	0	0.00
Logical	18	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       303
 EXPRESSION ((data_sel == EntropyData) ? nonce_out_q[entropy_cnt[0]] : (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0))
             ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       303
 SUB-EXPRESSION (data_sel == EntropyData)
                ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       303
 SUB-EXPRESSION (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0)
                 ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       371
 EXPRESSION (edn_req_q & ((~edn_ack_i)))
             ----1----   -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       414
 EXPRESSION (scrmbl_mtx_gnt_i && scrmbl_ready_i)
             --------1-------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       448
 EXPRESSION (entropy_cnt == 2'b1)
            ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       495
 EXPRESSION (seed_cnt == 2'b1)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       528
 EXPRESSION (entropy_cnt == req_bundle.nonce_size)
            -------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

FSM Coverage for Instance : tb.dut.u_otp_ctrl_kdi

Summary for FSM :: state_q

	Total	Covered	Percent
States	11	0	0.00	(Not included in score)
Transitions	22	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
DigClrSt	402	Not Covered
DigEntropySt	449	Not Covered
DigFinSt	432	Not Covered
DigLoadSt	415	Not Covered
DigWaitSt	483	Not Covered
ErrorSt	562	Not Covered
FetchEntropySt	429	Not Covered
FetchNonceSt	512	Not Covered
FinishSt	515	Not Covered
IdleSt	395	Not Covered
ResetSt	393	Not Covered

transitions	Line No.	Covered	Tests
DigClrSt->DigLoadSt	415	Not Covered
DigClrSt->ErrorSt	562	Not Covered
DigEntropySt->DigFinSt	468	Not Covered
DigEntropySt->ErrorSt	562	Not Covered
DigFinSt->DigWaitSt	483	Not Covered
DigFinSt->ErrorSt	562	Not Covered
DigLoadSt->DigFinSt	432	Not Covered
DigLoadSt->ErrorSt	562	Not Covered
DigLoadSt->FetchEntropySt	429	Not Covered
DigWaitSt->DigClrSt	503	Not Covered
DigWaitSt->DigLoadSt	500	Excluded
DigWaitSt->ErrorSt	562	Not Covered
DigWaitSt->FetchNonceSt	512	Not Covered
DigWaitSt->FinishSt	515	Excluded
FetchEntropySt->DigEntropySt	449	Not Covered
FetchEntropySt->ErrorSt	562	Not Covered
FetchNonceSt->ErrorSt	562	Not Covered
FetchNonceSt->FinishSt	529	Not Covered
FinishSt->ErrorSt	562	Not Covered
FinishSt->IdleSt	540	Not Covered
IdleSt->DigClrSt	402	Not Covered
IdleSt->ErrorSt	562	Not Covered
ResetSt->ErrorSt	562	Not Covered
ResetSt->IdleSt	395	Not Covered

---

Branch Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Line No.	Total	Covered	Percent
Branches		46	0	0.00
TERNARY	303	3	0	0.00
IF	260	2	0	0.00
IF	263	2	0	0.00
IF	266	2	0	0.00
CASE	390	31	0	0.00
IF	560	2	0	0.00
IF	571	2	0	0.00
IF	574	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	303	((data_sel == EntropyData)) ? 
-2-:	303	(req_bundle.seed_valid) ? 

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	260	if (key_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	263	if (nonce_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	266	if (seed_valid_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	390	case (state_q)
-2-:	394	if (kdi_en_i)
-3-:	401	if (req_valid)
-4-:	414	if ((scrmbl_mtx_gnt_i && scrmbl_ready_i))
-5-:	424	if (seed_cnt[0])
-6-:	426	if (scrmbl_ready_i)
-7-:	428	if (req_bundle.ingest_entropy)
-8-:	436	if (scrmbl_ready_i)
-9-:	445	if (edn_ack_i)
-10-:	448	if ((entropy_cnt == 2'b1))
-11-:	465	if (entropy_cnt[0])
-12-:	467	if (scrmbl_ready_i)
-13-:	472	if (scrmbl_ready_i)
-14-:	482	if (scrmbl_ready_i)
-15-:	492	if (scrmbl_valid_i)
-16-:	495	if ((seed_cnt == 2'b1))
-17-:	499	if (req_bundle.chained_digest)
-18-:	511	if (req_bundle.fetch_nonce)
-19-:	525	if (edn_ack_i)
-20-:	528	if ((entropy_cnt == req_bundle.nonce_size))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	Status	Tests
ResetSt	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ResetSt	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	1	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	0	-	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	1	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	0	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	1	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	0	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
FinishSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ErrorSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	560	if (((lc_ctrl_pkg::lc_tx_test_true_loose(escalate_en_i) || seed_cnt_err) || entropy_cnt_err))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	571	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	574	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered